PD - 95061A
IRFR18N15DPbF
IRFU18N15DPbF
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
l Lead-Free
Benefits
Low Gate to Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
VDSS
150V
RDS(on) max
ID
0.125Ω
18A
l
D-Pak
IRFR18N15DPbF
I-Pak
IRFU18N15DPbF
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
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Max.
18
13
72
110
0.71
± 30
3.3
-55 to + 175
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
1
12/9/04
IRFR/U18N15DPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
150
–––
–––
3.0
–––
–––
–––
–––
Typ.
–––
0.17
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, I D = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.125
Ω
VGS = 10V, ID = 11A
5.5
V
VDS = VGS, ID = 250µA
25
VDS = 150V, VGS = 0V
µA
250
VDS = 120V, VGS = 0V, TJ = 150°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
4.2
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
28
7.6
14
8.8
25
15
9.8
900
190
49
1160
88
95
Max. Units
Conditions
–––
S
VDS = 50V, ID = 11A
43
ID = 11A
11
nC
VDS = 120V
21
VGS = 10V,
–––
VDD = 75V
–––
I
D = 11A
ns
–––
RG = 6.8Ω
–––
VGS = 10V
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 120V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 120V
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
200
11
11
mJ
A
mJ
Typ.
Max.
Units
–––
–––
–––
1.4
50
110
°C/W
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
18
––– –––
showing the
A
G
integral reverse
72
––– –––
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 11A, VGS = 0V
––– 130 190
ns
TJ = 25°C, IF = 11A
––– 660 980
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFR/U18N15DPbF
100
100
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
BOTTOM 6.0V
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
BOTTOM 6.0V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
10
1
6.0V
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
10
6.0V
1
0.1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.0
TJ = 175 ° C
10
TJ = 25 ° C
V DS = 50V
20µs PULSE WIDTH
7
8
9
10
11
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
100
6
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
20µs PULSE WIDTH
TJ = 175 ° C
12
ID = 18A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U18N15DPbF
10000
20
VGS , Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
C, Capacitance(pF)
Coss = Cds + Cgd
1000
Ciss
Coss
100
Crss
10
1
10
100
ID = 11A
VDS = 120V
VDS = 75V
VDS = 30V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
1000
0
VDS , Drain-to-Source Voltage (V)
0
10
20
30
40
QG , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
100
100
10
TJ = 175 ° C
TJ = 25 ° C
1
0.1
0.2
V GS = 0 V
0.5
0.8
1.1
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.4
10us
100us
10
1ms
TC = 25 ° C
TJ = 175 ° C
Single Pulse
1
1
10ms
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U18N15DPbF
20
V DS
VGS
ID , Drain Current (A)
16
RD
D.U.T.
RG
+
-VDD
VGS
12
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
8
Fig 10a. Switching Time Test Circuit
4
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
PDM
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
DRIVER
L
VDS
D.U.T
RG
IAS
20V
+
V
- DD
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
IRFR/U18N15DPbF
500
TOP
400
BOTTOM
ID
4.4A
9.0A
11A
300
200
100
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
I AS
Fig 12b. Unclamped Inductive Waveforms
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
+
V
- DS
VGS
VG
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 13a. Basic Gate Charge Waveform
6
Fig 13b. Gate Charge Test Circuit
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IRFR/U18N15DPbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
+
-
-
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U18N15DPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
WITH ASSEMBLY
LOT CODE 1234
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line position
indicates "Lead-Free"
IRFU120
12
916A
34
ASSEMBLY
LOT CODE
DATE CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12
ASSEMBLY
LOT CODE
8
34
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
WEEK 16
A = ASSEMBLY SITE CODE
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IRFR/U18N15DPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
E XAMPLE: T HIS IS AN IRF U120
WIT H AS SEMBLY
LOT CODE 5678
AS SE MB LE D ON WW 19, 1999
IN T HE AS SE MBLY LINE "A"
PART NUMBER
INT E RNAT IONAL
RECT IF IE R
LOGO
IRF U120
919A
56
78
ASS EMBLY
LOT CODE
Note: "P" in as s embly line
pos ition indicates "Lead-F ree"
DAT E CODE
YE AR 9 = 1999
WEE K 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMB ER
IRF U120
56
AS S EMB LY
LOT CODE
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78
DAT E CODE
P = DESIGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = ASS EMBLY S IT E CODE
9
IRFR/U18N15DPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 3.3mH
R G = 25Ω, IAS = 11A.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 11A, di/dt ≤ 170A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
10
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