This version: Jan. 1998 MSM64422/64424 Previous version: Mar. 1996 Built-in 256/512-Bit EEPROM and LCD Driver 4-Bit Microcontroller GENERAL DESCRIPTION The MSM64422/64424 is a low power 4-bit microcontroller using OKI original CPU core nX-4/ 20. Integrated into a single chip are 64/128 nibbles of EEPROM, PWM generation circuit, 8-bit timer counter, 8-bit synchronous serial port, time base counter, low voltage detection circuit, watchdog timer, 4-bit input port, one or two input-output port(s). For the oscillator circuit, it is possible to choose from the crystal oscillation circuit or the 3-pin RC oscillation circuit (resistor R and capacitor C are externally connected). Most suitable for small-sized security systems such as the key-less entry. FEATURES • Operating range CPU operating voltage EEPROM write voltage Operating frequencies Operating temperature • Memory space <MSM64422> ROM (program memory) RAM (data memory) EEPROM <MSM64424> ROM (program memory) RAM (data memory) EEPROM : : : : : : 2.5 to 5.5V (crystal oscillation mode) 1.7 to 5.5V (RC oscillation mode) 2.2 to 5.5V fmax = 2.4 MHz (crystal oscillation mode) fmax = 1.2 MHz (RC oscillation mode) Ta=–40 to +85°C : 2048 bytes : 64 nibbles : 64 nibbles (Number of data rewriting cycles to EEPROM: 10,000) (EEPROM data retaining years: 10 Years) : 4096 bytes : 128 nibbles : 128 nibbles (Number of data rewriting cycles to EEPROM: 10,000) (EEPROM data retaining years: 10 Years) • Functions PWM generation circuit (each pulse width, and pulse period is set by a 4-bit counter) 8-bit timer counter (automatic reload timer) 8-bit synchronous serial port Standby functions Low voltage detection circuit built in. Watchdog timer • Interrupt sources : internal 5 sources : external 1 source 1/13 y ar ¡ Semiconductor MSM64422/64424 ¡ Semiconductor in im el Pr E2E0039-27-Y3 ¡ Semiconductor MSM64422/64424 • I/O Port Input port Input-output port : 1 port ¥ 4 bits : 1 port ¥ 4 bits (MSM64422) 2 ports ¥ 4 bits (MSM64424) (Two of them provide 10mA sink current when VDD ≥ 2.5V) • Package Options: <MSM64422> 16-pin plastic SOP (SOP16-P-300-1.27-K) (Product name: MSM64422-¥¥¥MS-K) <MSM64424> 20-pin plastic SSOP (SSOP20-P-250-0.95-K) (Product name: MSM64424-¥¥¥MS-K) 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name: MSM64424-¥¥¥GS-K) • MTP Version The MTP version MSM64Q424 (24-pin plastic SOP only) using EEPROM in place of the internal program memory is available. <MSM64Q424> 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name: MSM64Q424-N GS-K) 2/13 ¡ Semiconductor MSM64422/64424 BLOCK DIAGRAM OSC0/XT OSC1/XT OSC2 OSC/XT clock generation EEPROM 64N CPU core VDD GND TEST RESET Time base counter Interrupt control ROM 2Kbytes (nX-4/20) RAM 64N Watchdog timer Databus 8-bit synchronous serial port Low voltage detection circuit PORT0 PORT1 P0.0-P0.3 P1.0-P1.3 8-bit timer counter *SIN *SOUT*SCLK PWN generation circuit *PWM Note: * means the secondary function for each port. MSM64422 Block Diagram OSC0/XT OSC1/XT OSC2 OSC/XT clock generation EEPROM 128N CPU core VDD GND TEST RESET Time base counter Interrupt control ROM 4Kbytes (nX-4/20) RAM 128N Watchdog timer Databus PORT0 PORT1 PORT2 P0.0P0.3 P1.0P1.3 P2.0P2.3 Low voltage detection circuit 8-bit synchronous serial port *SIN *SOUT*SCLK 8-bit timer counter PWN generation circuit *PWM Note: * means the secondary function for each port. MSM64424 Block Diagram 3/13 ¡ Semiconductor MSM64422/64424 PIN CONFIGURATION (TOP VIEW) P0.2/XI2 1 16 P0.1/XI1 P0.2/XI2 1 20 P0.1/XI1 P0.3/XI3 2 15 P0.0/XI0 P0.3/XI3 2 19 P0.0/XI0 VDD 3 14 OSC2 VDD 3 18 OSC2 TEST 4 13 OSC1/XT TEST 4 17 OSC1/XT RESET 5 12 OSC0/XT RESET 5 16 OSC0/XT GND 6 11 NC GND 6 15 NC P1.0/PWM 7 10 P1.3/SCLK P2.0 7 14 P2.3 P1.1/SIN 8 9 P1.2/SOUT P2.1 8 13 P2.2 P1.0/PWM 9 12 P1.3/SCLK P1.1/SIN 10 11 P1.2/SOUT MSM64422 (16-Pin Plastic SOP) MSM64424 (20-Pin Plastic SSOP) P0.2/XI2 1 24 P0.1/XI1 P0.2/XI2 1 24 P0.1/XI1 NC 2 23 NC NC 2 23 NC P0.3/XI3 3 22 P0.0/XI0 VDD 4 21 OSC2 P0.3/XI3 3 22 P0.0/XI0 VDD 4 21 OSC2 TEST 5 20 OSC1/XT TEST 5 20 OSC1/XT RESET 6 19 OSC0/XT RESET 6 19 OSC0/XT GND 7 18 NC GND 7 18 PGM P2.0 8 17 P2.3 P2.0 8 17 P2.3 P2.1 9 16 P2.2 P2.1 9 16 P2.2 P1.0/PWM 10 15 P1.3/SCLK P1.0/PWM 10 15 P1.3/SCLK NC 11 14 NC NC 11 14 NC P1.1/SIN 12 13 P1.2/SOUT P1.1/SIN 12 13 P1.2/SOUT MSM64424 (24-Pin Plastic SOP) MSM64Q424 (24-Pin Plastic SOP) NC: No-connection pin 4/13 ¡ Semiconductor MSM64422/64424 PIN CONFIGURATIONS Basic Functions Function Symbol Type Description Power VDD — Pin (5V) Supply GND — Pin (0V) Test TEST I Input pin for IC test A system reset input pin. Reset RESET I When this pin changes to "L" level from "H", the internal condition is initialized, and with the level change to "H" from "L", the command execution is started from the address 000H. P0.0/XI0 I 4-bit input port (P0). P0.1/XI1 I Each bit can be configured to be a pull-down resistor input or high P0.2/XI2 I impedance input. P0.3/XI3 I As the secondary function, an external interrupt is allocated to each pin. P1.0/PWM I/O P1.1/SIN I/O P1.2/SOUT I/O P1.3/SCLK I/O P2.0 I/O P2.1 I/O P2.2 I/O P2.3 I/O Port* 4-bit input/output port (P1). At the time of input mode, each bit can be configured to be a pull-down resistor input or high impedance input. At the time of output mode, each bit can be configured to be an Nch open drain output or CMOS output. As the secondary function, it becomes an input-output pin that is related to serial port and PWM output. OSC0/XT I 4-bit input-output port (P2). At the time of input mode, each bit can be configured to be a pull-down resistor input or high impedance input. At the time of output mode, each bit can be configured to be an Nch open drain output or CMOS output. Pins for connectiong an oscillator or RC (capacitor C, resistor R is Oscillation OSC1/XT O externally connected). OSC2 O Pin for setting a EEPROM write/read mode. PGM PGM I/O The device enters a EEPROM write/read mode, when a logic "1" is input to this pin to release a reset. This pin is left open in a normal operating mode. * The P2.0-2.3 pins are only built into MSM64424. 5/13 ¡ Semiconductor MSM64422/64424 Secondary Functions Functions Symbol Type P0.0/XI0 External P0.1/XI1 Interrupt P0.2/XI2 Description This is an input pin for external interrupt. Interrupt by level change is I possible. Each bit can be configured to be an interrupt disable or enable by the port 0 interrupt enable register. P0.3/XI3 PWM Serial port P1.0/PWM O PWM output waveform pin P1.1/SIN I Receive data input pin of the serial port. P1.2/SOUT O Transmit data output pin of the serial port. P1.3/SCLK I/O Synchronous clock input-output pin for the serial port. 6/13 ¡ Semiconductor MSM64422/64424 MEMORY MAPS Program Memory The program memory is a memory area for the program data, the interrupt area, the CZP area, and the start address area. The data length is 8 bits. For the MSM64422 addresses 0 to 2047 are assigned to the program memory. For the MSM64424 address 0 to 4095 are assigned to the program memory. 7FFH (0FFFH) Program area 2048B (4096B) 030H Interrupt area 12B CZP area 16B 020H 010H Start address area 000H 8 bits Note : "B" means data length of 8 bits. Program Memory Address Space The address 000H is the instruction execution start address after system reset. The CZP area from address 010H to address 01FH is the start address for the CZP subroutine of 1-byte call instruction and a maximum of eight commands can be held. The interrupt address from address 020H to 02FH is assigned the start address of interrupt subroutines. 7/13 ¡ Semiconductor MSM64422/64424 Data Memory RAM, EEPROM and special function registers (SFRs) are assigned to the Data Memory Address Space. These Memory are located in a different address space from program memory. The data length of the Data Memory is 4 bits (1 nibble). The Data Memory uses two banks (256 nibbles/bank): one for the SFR and EEPROM areas using part of the bank 0 and the other for the RAM area, containing the stack in the bank 7. (MSM64424) 7FFH RAM area BANK7 Data/Stack area 128N 6FFH 5FFH 0FFH 4FFH 1FFH 0FFH 07FH 000H BANK0 EEPROM area SFR area 4 bits Note 128N BANK0 07FH Stack pointer 07EH HALT 07DH MIEF 07CH Other SFR area 124N 000H 4 bits 128N 080H 2FFH 64N (MSM64424) EEPROM area 128N Inaccessible area 3FFH 128N (MSM64422) Data/Stack area 64N (MSM64422) EEPROM area 64N 64N : "N" means data length of 4 bits. Data Memory Address Space The Data Memory Address Space configuration is shown in the figure alove. The stack area is a data save area for subroutines and interrupts from the address 7FFH toward the lower-order addresses (64N max. for MSM64422, 128N max. for MSM64424) by subroutine call instruction. For the bank 0, the special function register area from the addresses from 000H to 07FH and 64 nibble EEPROM area from the addresses 080H to 0BFH for MSM64422 or 128 nibble EEPROM area from the addresses 080H to 0FFH for MSM64424 are assigned. 8/13 ¡ Semiconductor MSM64422/64424 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Power Supply Voltage VDD Interrupt Voltage VIN Output Voltage VOUT Storage Temperature TSTG Condition Rating Ta=25°C –0.3 to VDD+0.3 Unit –0.3 to 6 V –0.3 to VDD+0.3 — –55 to +150 °C RECOMMENDED OPERATING CONDITIONS Parameter Symbol Power Supply Voltage 1 (RC oscillation mode) VDD Power Supply Voltage 3 Operating Frequency 1 Operating Frequency 2 1.7 to 5.5 V 2.2 to 5.5 (EEPROM write mode) (Crystal oscillation mode) Unit 2.5 to 5.5 (Crystal oscillation mode) Power Supply Voltage 2 Range 0.5 to 2.4 MHz 0.1 to 1.2 MHz fOSC (RC oscillation mode) RC Oscillation Resistance ROSC RC Oscillation Capacitance COSC pF RC Oscillation Time Constant C*R — Operating Temperature Ta kW –40 to +85 °C 9/13 ¡ Semiconductor MSM64422/64424 ELECTRICAL CHARACTERISTICS (Ta=–40 to +85°C) Parameter Input Voltage Input Current 1 *1 (P0.0 to P0.3) (P1.0 to P1.3) Symbol Condition Min. Max. VIH — 0.7 ¥ VDD — VIL — — 0.2 ¥ VDD IIH1 VIH=VDD — 1 V mA IIL1 VIL=GND –1 — Input Current 2 IIH2 VIH=VDD — 1 (RESET) IIL2 VIL=GND – 200 – 50 50 200 — – 0.5 10 — — – 0.5 (P2.0 to P2.3) Unit mA Pull-down Resistance (P0.0 to P0.3) (P1.0 to P1.3) VDD=2.5V RON VI=2.5V kW (P2.0 to P2.3) Output Current 1 (P1.0, P1.1) Output Current 2 (P1.2, P1.3) (P2.0 to P2.3) VDD=2.5V IOH1 VO=VDD–0.5V VDD=2.5V, VO=1.0V IOL1 VDD=2.5V IOH2 VO=VDD–0.5V IOL2 *2 Static Current Consumption IDDS IDD1 Dynamic Current Consumption IDD2 mA mA VDD=2.5V, VO=0.5V 0.5 — VDD=5.5V, fOSC=0Hz — 0.3 VDD=5.5V, fOSC=0Hz — 1.0 — 2.0 mA — 4.0 mA CPU in operation VDD=5.0V During write fOSC=500kHz to EEPROM mA *1 No pull-down resistor during input state. *2 Ta=–40 to +50°C 10/13 ¡ Semiconductor MSM64422/64424 PACKAGE DIMENSIONS (Unit : mm) SOP16-P-300-1.27-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin Cu alloy Solder plating 5 mm or more 0.21 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 11/13 ¡ Semiconductor MSM64422/64424 (Unit : mm) SSOP20-P-250-0.95-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.18 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 12/13 ¡ Semiconductor MSM64422/64424 (Unit : mm) SOP24-P-430-1.27-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.58 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 13/13