LTC1649 3.3V Input High Power Step-Down Switching Regulator Controller U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ The LTC®1649 is a high power, high efficiency switching regulator controller optimized for use with very low supply voltages. It operates from 2.7V to 5V input, and provides a regulated output voltage from 1.26V to 2.5V at up to 20A load current. A typical 3.3V to 2.5V application features efficiency above 90% from 1A to 10A load. The LTC1649 uses a pair of standard 5V logic-level N-channel external MOSFETs, eliminating the need for expensive P-channel or super-low-threshold devices. High Power 3.3V to 1.xV-2.xV Switching Regulator Controller: Up to 20A Output All N-Channel External MOSFETs Provides 5V MOSFET Gate Drive with 3.3V Input Excellent Output Regulation: ±1% Over Line, Load and Temperature Variations Constant Frequency Operation Minimizes Inductor Size High Efficiency: Over 90% Possible No Low-Value Sense Resistor Needed Available in 16-Lead SO Package The LTC1649 shares its internal switching architecture with the LTC1430, and features the same ±1% line, load and temperature regulation characteristics. Current limit is user-adjustable without requiring an external low-value sense resistor. The LTC1649 uses a 200kHz switching frequency and voltage mode control, minimizing external component count and size. Shutdown mode drops the quiescent current to below 10µA. U APPLICATIO S ■ ■ ■ ■ 3.3V Input Power Supply for Low Voltage Microprocessors and Logic Low Input Voltage Power Supplies High Power, Low Voltage Regulators Local Regulation for Multiple Voltage Distributed Power Systems The LTC1649 is available in the 16-pin narrow SO package. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO 3.3V to 2.5V, 15A Converter RIMAX 50k Q1, Q2 IRF7801 TWO IN PARALLEL 1µF MBR0530 PVCC1 + 100 CIN 3300µF 90 LEXT* 1.2µH VOUT 2.5V @15A G1 22Ω 1k PVCC2 IFB Q3 IRF7801 G2 VCC LTC1649 FB IMAX SHDN LTC1649 Efficiency SHDN + 10µF COMP + VIN C+ GND COUT 4400µF IRF7801 = INTERNATIONAL RECTIFIER MBR0530 = MOTOROLA *12TS-1R2HL = PANASONIC 0.1µF 70 60 50 40 0.1 R2 12.7k CPOUT CC 0.01µF C1 220pF 80 1µF C– SS RC 7.5k R1 12.4k EFFICIENCY (%) VIN 3.3V + MBR0530 1 LOAD CURRENT (A) 10 1649 TA02 10µF 0.33µF 1649 TA01 1 LTC1649 W W U W ABSOLUTE MAXIMUM RATINGS U W U PACKAGE/ORDER INFORMATION (Note 1) Supply Voltage VIN ........................................................................................... 6V VCC ........................................................................................... 9V PVCC1, 2 ................................................................................ 13V Input Voltage IFB ....................................................................... – 0.3V to 18V C +, C – ................................................ – 0.3V to (VIN + 0.3V) All Other Inputs ....................... – 0.3V to (VCC + 0.3V) Operating Temperature Range LTC1649C ............................................... 0°C to 70°C LTC1649I ............................................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW 16 G2 G1 1 15 PVCC2 PVCC1 2 LTC1649CS LTC1649IS 14 VCC GND 3 13 IFB FB 4 12 IMAX SHDN 5 SS 6 11 COMP VIN 7 10 CPOUT C– 8 C+ 9 S PACKAGE 16-LEAD PLASTIC SO TJMAX = 150°C, θJA = 110°C/ W Consult factory for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.3V (Note 2) MIN LTC1649CS TYP MAX MIN LTC1649IS TYP MAX SYMBOL PARAMETER CONDITIONS VIN Minimum Supply Voltage Figure 1 (Note 3) ● 2.7 VFB Feedback Voltage Figure 1 ● 1.25 1.265 1.28 1.23 1.265 1.29 VCPOUT Charge Pump Output Voltage Figure 1 ● 4.8 5 5.2 4.75 5 5.25 IIN Supply Current (VIN) VSHDN = VCC, ILOAD = 0 VSHDN = 0V ● 3 10 5 25 3 10 5 25 2.7 UNITS V V V mA µA IPVCC1, 2 Supply Current (PVCC1, 2) PVCC = 5V, VSHDN = VCC (Note 4) VSHDN = 0V 1.5 0.1 1.5 0.1 mA µA fCP Internal Charge Pump Frequency ICPOUT = 20mA (Note 5) 700 700 kHz fOSC Internal PWM Oscillator Frequency ● 140 VIH SHDN Input High Voltage ● 2.4 VIL SHDN Input Low Voltage ● IIN SHDN Input Current ● gmV Error Amplifier Transconductance gmI ILIM Amplifier Transconductance IIMAX IMAX Sink Current VIMAX = VCC ● 8 12 16 8 12 17 µA ISS Soft Start Source Current VSS = 0V ● –8 –12 –16 –8 –12 –17 µA tr, tf Driver Rise/Fall Time PVCC1 = PVCC2 = 5V (Note 7) 80 250 80 250 ns tNOV Driver Non-Overlap Time PVCC1 = PVCC2 = 5V 25 130 250 25 130 250 ns DCMAX Maximum Duty Cycle VCOMP = VCC 90.5 93 90.5 93 2 200 260 130 200 ±0.01 0.8 ±1 kHz V 0.8 (Note 6) 325 2.4 ±0.01 ±1 V µA 650 650 µMho 1300 1300 µMho % LTC1649 ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a part may be impaired. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 3: Maximum Duty Cycle limitations will limit the output voltage obtainable at very low supply voltages. Note 4: Supply current at PVCC1 and PVCC2 is dominated by the current needed to charge and discharge the external MOSFET gates. This current will vary with the operating voltage and the external MOSFETs used. Note 5: Under normal operating conditions, the charge pump will skip cycles to maintain regulation and the apparent frequency will be lower than 700kHz. Note 6: The ILIM amplifier can sink but not source current. Under normal (not current limited) operation, the ILIM output current will be zero. Note 7: Driver rise and fall times are measured from 10% to 90%. U W TYPICAL PERFOR A CE CHARACTERISTICS Oscillator Frequency vs Temperature IMAX Pin Current vs Temperature OSCILLATOR FREQUENCY (kHz) IMAX CURRENT (µA) 13.0 12.5 12.0 11.5 11.0 40 20 60 0 TEMPERATURE (°C) 80 230 95 220 210 200 190 170 – 40 –20 100 40 20 60 0 TEMPERATURE (°C) 80 3.5 – 0.2 – 0.4 – 0.6 450 – 0.8 400 – 20 20 0 60 40 TEMPERATURE (°C) 80 100 1649 G04 100 80 1649 G03 OUTPUT VOLTAGE (V) ∆VOUT (mV) TRANSCONDUCTANCE (µmho) 500 20 0 60 40 TEMPERATURE (°C) 4.0 0 550 – 20 Output Voltage vs Load Current with Current Limit TA = 25°C VOUT = 3.3V VCC = 5V FIGURE 1 0.2 700 350 – 40 70 – 40 100 0.4 ∆ICOMP ∆VFB VCC = 5V gm = 600 80 Load Regulation 850 650 85 1649 G02 Error Amplifier Transconductance vs Temperature 750 90 75 180 1649 G01 800 VCOMP = VCC VFB = 1.265V VCC = 5V VCC = 5V 13.5 10.5 – 40 –20 100 240 VCC = 5V DUTY CYCLE (%) 14.0 Maximum Duty Cycle vs Temperature 3.0 2.5 2.0 RIMAX = 16k 1.0 TA = 25°C VCC = 5V FIGURE 1 0.5 0 –1.0 0 1 2 3 4 5 6 7 LOAD CURRENT (A) 8 9 10 1649 G06 RIMAX = 33k 1.5 0 2 4 8 6 LOAD CURRENT (A) 10 12 1649 G07 3 LTC1649 U U U PIN FUNCTIONS G1 (Pin 1): Driver Output 1. Connect this pin to the gate of the upper N-channel MOSFET, Q1. This output will swing from PVCC1 to GND. G1 will always be low when G2 is high. In shutdown, G1 and G2 go low. PVCC1 (Pin 2): Power VCC for Driver 1. This is the power supply input for G1. G1 will swing from PVCC1 to GND. PVCC1 must be connected to a potential of at least VIN + VGS(ON)(Q1). This potential can be generated using a simple charge pump connected to the switching node between the two external MOSFETs as shown in Figure 1. GND (Pin 3): System Ground. Connect to a low impedance ground in close proximity to the source of Q2. The system signal and power grounds should meet at only one point, at the GND pin of the LTC1649. FB (Pin 4): Feedback. The FB pin is connected to the output through a resistor divider to set the output voltage. VOUT = VREF [1 + (R1/R2)]. SHDN (Pin 5): Shutdown, Active Low. A TTL compatible LOW level at SHDN for more than 50µs puts the LTC1649 into shutdown mode. In shutdown, G1, G2, COMP and SS go low, and the quiescent current drops to 25µA max. CPOUT remains at 5V in shutdown mode. A TTL compatible HIGH level at SHDN allows the LTC1649 to operate normally. C+ (Pin 9): Flying Capacitor, Positive Terminal. CPOUT (Pin 10): Charge Pump Output. CPOUT provides a regulated 5V output to provide power for the internal switching circuitry and gate drive for the external MOSFETs. CPOUT should be connected directly to PVCC2 in most applications. At least 10µF of reservoir capacitance to ground is required at CPOUT. This requirement can usually be met by the bypass capacitor at PVCC2. COMP (Pin 11): External Compensation. The COMP pin is connected directly to the output of the internal error amplifier and the input of the PWM generator. An RC network is used at this node to compensate the feedback loop to provide optimum transient response. IMAX (Pin 12): Current Limit Set. IMAX sets the threshold for the internal current limit comparator. If IFB drops below IMAX with G1 on, the LTC1649 will go into current limit. IMAX has an internal 12µA pull-down to GND. The voltage at IMAX can be set with an external resistor to the drain of Q1 or with an external voltage source. IFB (Pin 13): Current Limit Sense. Connect to the switched node at the source of Q1 and the drain of Q2 through a 1kΩ resistor. The resistor is required to prevent voltage transients at the switched node from damaging the IFB pin. IFB can be taken up to 18V above GND without damage. SS (Pin 6): Soft Start. An external capacitor from SS to GND controls the startup time and also compensates the current limit loop, allowing the LTC1649 to enter and exit current limit cleanly. VCC (Pin 14): Internal Power Supply. VCC provides power to the feedback amplifier and switching control circuits. VCC is designed to run from the 5V supply provided by CPOUT. VCC requires a 10µF bypass capacitor to GND. VIN (Pin 7): Charge Pump Input. This is the main low voltage power supply input. VIN requires an input voltage between 3V and 5V. Bypass VIN to ground with a 1µF ceramic capacitor located close to the LTC1649. PVCC2 (Pin 15): Power VCC for Driver 2. This is the power supply input for G2. G2 will swing from PVCC2 to GND. PVCC2 must be connected to a potential of at least VGS(ON)(Q2). This voltage is usually supplied by the CPOUT pin. PVCC2 requires a bypass capacitor to GND; this capacitor also provides the reservoir capacitance required by the CPOUT pin. C – (Pin 8): Flying Capacitor, Negative Terminal. Connect a 1µF ceramic capacitor from C – to C +. G2 (Pin 16): Driver Output 2. Connect this pin to the gate of the lower N-channel MOSFET, Q2. This output will swing from PVCC2 to GND. G2 will always be low when G1 is high. In shutdown, G1 and G2 go low. 4 LTC1649 W BLOCK DIAGRA C+ C– CHARGE PUMP VIN CPOUT DELAY SHDN INTERNAL SHUTDOWN 50µs PVCC1 G1 PWM COMP PVCC2 G2 VCC 12µA SS ILIM – FB + + MIN MAX – IMAX IFB 12µA FB + 40mV 40mV + + 1649 BD 1.26V TEST CIRCUIT VIN 3.3V RIMAX 50k Q1, Q2 IRF7801 TWO IN PARALLEL 1µF MBR0530 PVCC1 CIN 3300µF LEXT 1.2µH VOUT 2.5V G1 22Ω 1k PVCC2 IFB Q3 IRF7801 G2 VCC LTC1649 FB IMAX SHDN + SHDN + R1 12.4k + VIN + 10µF COMP 1µF C– SS RC 7.5k C GND COUT 4400µF R2 12.7k CPOUT CC 0.01µF C1 220pF 0.1µF + MBR0530 10µF 0.33µF 1649 TA03 Figure 1 5 LTC1649 U W U U APPLICATIONS INFORMATION OVERVIEW The LTC1649 is a voltage feedback PWM switching regulator controller (see Block Diagram) designed for use in high power, low input voltage step-down (buck) converters. It includes an onboard PWM generator, a precision reference trimmed to ±0.5%, two high power MOSFET gate drivers and all necessary feedback and control circuitry to form a complete switching regulator circuit. Also included is an internal charge pump which provides 5V gate drive to the external MOSFETs with input supply voltage as low as 2.7V. The LTC1649 runs at an internally fixed 200kHz clock frequency and requires an external resistor divider to set the output voltage. The LTC1649 includes a current limit sensing circuit that uses the upper external power MOSFET as a current sensing element, eliminating the need for an external sense resistor. Also included is an internal soft start feature that requires only a single external capacitor to operate. THEORY OF OPERATION Primary Feedback Loop The LTC1649 senses the output voltage of the circuit at the output capacitor through a resistor divider connected to the FB pin and feeds this voltage back to the internal transconductance amplifier FB. FB compares the resistordivided output voltage to the internal 1.26V reference and outputs an error signal to the PWM comparator. This is then compared to a fixed frequency sawtooth waveform generated by the internal oscillator to generate a pulse width modulated signal. This PWM signal is fed back to the external MOSFETs through G1 and G2, closing the loop. Loop compensation is achieved with an external compensation network at COMP, the output node of the FB transconductance amplifier. MIN, MAX Feedback Loops Two additional comparators in the feedback loop provide high speed fault correction in situations where the FB amplifier may not respond quickly enough. MIN compares the feedback signal to a voltage 40mV (3%) below the 6 internal reference. At this point, the MIN comparator overrides the FB amplifier and forces the loop to full duty cycle, set by the internal oscillator at about 93%. Similarly, the MAX comparator monitors the output voltage at 3% above the internal reference and forces the output to 0% duty cycle when tripped. These two comparators prevent extreme output perturbations with fast output transients, while allowing the main feedback loop to be optimally compensated for stability. Current Limit Loop The LTC1649 includes yet another feedback loop to control operation in current limit. The ILIM amplifier monitors the voltage drop across external MOSFET Q1 with the IFB pin during the portion of the cycle when G1 is high. It compares this voltage to the voltage at the IMAX pin. As the peak current rises, the drop across Q1 due to its RDS(ON) increases. When IFB drops below IMAX, indicating that Q1’s drain current has exceeded the maximum level, ILIM starts to pull current out of the external soft start capacitor, cutting the duty cycle and controlling the output current level. At the same time, the ILIM comparator generates a signal to disable the MIN comparator to prevent it from conflicting with the current limit circuit. If the internal feedback node drops below about 0.8V, indicating a severe output overload, the circuitry will force the internal oscillator to slow down by a factor of as much as 100. If desired, the turn on time of the current limit loop can be controlled by adjusting the size of the soft start capacitor, allowing the LTC1649 to withstand brief overcurrent conditions without limiting. By using the RDS(ON) of Q1 to measure the output current, the current limit circuit eliminates the sense resistor that would otherwise be required and minimizes the number of components in the external high current path. Because power MOSFET RDS(ON) is not tightly controlled and varies with temperature, the LTC1649 current limit is not designed to be accurate; it is meant to prevent damage to the power supply circuitry during fault conditions. The actual current level where the limiting circuit begins to take effect may vary from unit to unit, depending on the power MOSFETs used. See Soft Start and Current Limit for more details on current limit operation. LTC1649 U W U U APPLICATIONS INFORMATION MOSFET Gate Drive Synchronous Operation The LTC1649 is designed to operate from supplies as low as 2.7V while using standard 5V logic-level N-channel external MOSFETs. This poses somewhat of a challenge— from as little as 2.7V, the LTC1649 must provide a 0V to 5V signal to the lower MOSFET, Q2, while the upper MOSFET, Q1, requires a gate drive signal that swings from 0V to (VIN + 5V). The LTC1649 addresses this situation with two specialized circuits. An onboard charge pump boosts the input voltage at VIN to a regulated 5V at CPOUT. This 5V supply is used to power the PVCC2 pin, which in turn supplies 5V gate drive to Q2. This 5V supply is also used to power the VCC pin, which allows the internal drive circuitry to interface to the boosted driver supplies. The LTC1649 uses a synchronous switching architecture, with MOSFET Q2 taking the place of the diode in a classic buck circuit (Figure 3). This improves efficiency by reducing the voltage drop and the resultant power dissipation across Q2 to VON = (I)(RDS(ON)(Q2)), usually much lower than VF of the diode in the classical circuit. This more than offsets the additional gate drive required by the second MOSFET, allowing the LTC1649 to achieve efficiencies in the mid-90% range for a wide range of load currents. Gate drive for the top N-channel MOSFET, Q1, is supplied by PVCC1. This supply must reach VIN + 5V while Q1 is on. Conveniently, the switching node at the source of Q1 rises to VIN whenever Q1 is on. The LTC1649 uses this fact to generate the required voltage at PVCC1 with a simple external charge pump as shown in Figure 2. This circuit charges the flying capacitor C2 to the 5V level at CPOUT when the switching node is low. As the top MOSFET turns on, the switching node begins to rise to VIN, and the PVCC1 is pulled up to VIN + 5V by C2. The 93% maximum duty cycle (typical) means the switching node at the source of Q1 will return to ground during at least 7% of each cycle, ensuring that the charge pump will always provide adequate gate drive to Q1. Another feature of the synchronous architecture is that unlike a diode, Q2 can conduct current in either direction. This allows the output of a typical LTC1649 circuit to sink current as well as sourcing it while remaining in regulation. The ability to sink current at the output allows the LTC1649 to be used with reactive or other nonconventional loads that may supply current to the regulator as well as drawing current from it. VIN CONTROLLER Q1 VOUT D1 1649 F03a Figure 3a. Classical Buck Architecture DCP VIN + 10µF CPOUT PVCC2 PVCC1 G1 1µF VIN Q1 L1 VOUT G2 + Q2 COUT Q1 CONTROLLER VOUT Q2 LTC1649 Figure 2. PVCC1 Charge Pump 1649 F02 1649 F03b Figure 3b. Synchronous Buck Architecture 7 LTC1649 U W U U APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION Power MOSFETs Two N-channel power MOSFETs are required for most LTC1649 circuits. These should be selected primarily by on-resistance considerations; thermal dissipation is often a secondary concern in high efficiency designs. The LTC1649 is designed to be used with 5V logic-level MOSFETs; “standard” threshold MOSFETs with RDS(ON) specified at 10V only will not provide satisfactory performance. MOSFET RDS(ON) should be chosen based on input and output voltage, allowable power dissipation and maximum required output current. In a typical LTC1649 buck converter circuit operating in continuous mode, the average inductor current is equal to the output load current. This current is always flowing through either Q1 or Q2 with the power dissipation split up according to the duty cycle: DC (Q1) = VOUT VIN V DC (Q2) = 1 – OUT VIN (V – VOUT) = IN VIN The RON required for a given conduction loss can now be calculated by rearranging the relation P = I2R: RDS(ON) (Q1) = PMAX(Q1) DC(Q1)(IMAX2) V (P )(Q1) = IN MAX 2 VOUT(IMAX ) PMAX(Q2) RDS(ON) (Q2) = DC(Q2)(IMAX2) = VIN(PMAX)(Q2) (VIN – VOUT)(IMAX2) PMAX should be calculated based primarily on required efficiency. A typical high efficiency circuit designed for 3.3V in, 2.5V at 10A out might require no more than 3% 8 efficiency loss at full load for each MOSFET. Assuming roughly 90% efficiency at this current level, this gives a PMAX value of (2.5V)(10A/0.9)(0.03) = 833mW per FET and a required RDSON of: (3.3V)(833mW) = 0.011Ω (2.5V)(10A2) (3.3V)(833mW) RDS(ON) (Q2) = = 0.034Ω (3.3V – 2.5V)(10A2) RDS(ON) (Q1) = Note that while the required RDS(ON) values suggest large MOSFETs, the dissipation numbers are less than a watt per device— large TO-220 packages and heat sinks are not necessarily required in high efficiency applications. Siliconix Si4410DY and International Rectifier IRF7801 are two small, surface mount devices with RON values of 0.03Ω or below with 5V of gate drive; both work well in LTC1649 circuits. A higher PMAX value will generally decrease MOSFET cost and circuit efficiency and increase MOSFET heat sink requirements. Inductor The inductor is often the largest component in an LTC1649 design and should be chosen carefully. Inductor value and type should be chosen based on output slew rate requirements and expected peak current. Inductor value is primarily controlled by the required current slew rate. The maximum rate of rise of the current in the inductor is set by its value, the input-to-output voltage differential and the maximum duty cycle of the LTC1649. In a typical 3.3V to 2.5V application, the maximum rise time will be: 93% (VIN – VOUT) AMPS 0.744A I = µs L L SECOND where L is the inductor value in µH. A 2µH inductor would have a 0.37A/µs rise time in this application, resulting in a 14µs delay in responding to a 5A load current step. During this 14µs, the difference between the inductor current and the output current must be made up by the output capacitor, causing a temporary droop at the output. To minimize this effect, the inductor value should usually be in the 1µH to 5µH range for most typical 3.3V to 2.xV LTC1649 circuits. Different combinations of input and output volt- LTC1649 U W U U APPLICATIONS INFORMATION ages and expected loads may require different values. Once the required value is known, the inductor core type can be chosen based on peak current and efficiency requirements. Peak current in the inductor will be equal to the maximum output load current added to half the peakto- peak inductor ripple current. Ripple current is set by the inductor value, the input and output voltage and the operating frequency. If the efficiency is high and can be considered approximately equal to 1, the ripple current is approximately equal to: (VIN – VOUT) DC (fOSC)(L) V DC = OUT VIN ∆I = fOSC = LTC1649 oscillator frequency = 200kHz L = inductor value Solving this equation with our typical 3.3V to 2.5V application, we get: (0.8)(0.76) = 1.5AP–P (200kHz)(2µH) Peak inductor current at 10A load: 10A + 1.5A = 10.8A 2 The inductor core must be adequate to withstand this peak current without saturating, and the copper resistance in the winding should be kept as low as possible to minimize resistive power loss. Note that the current may rise above this maximum level in circuits under current limit or under fault conditions in unlimited circuits; the inductor should be sized to withstand this additional current. Input and Output Capacitors A typical LTC1649 design puts significant demands on both the input and output capacitors. Under normal steady load operation, a buck converter like the LTC1649 draws square waves of current from the input supply at the switching frequency, with the peak value equal to the output current and the minimum value near zero. Most of this current must come from the input bypass capacitor, since few raw supplies can provide the current slew rate to feed such a load directly. The resulting RMS current flow in the input capacitor will heat it up, causing premature capacitor failure in extreme cases. Maximum RMS current occurs with 50% PWM duty cycle, giving an RMS current value equal to IOUT/2. A low ESR input capacitor with an adequate ripple current rating must be used to ensure reliable operation. Note that capacitor manufacturers’ ripple current ratings are often based on only 2000 hours (3 months) lifetime; further derating of the input capacitor ripple current beyond the manufacturer’s specification is recommended to extend the useful life of the circuit. The output capacitor in a buck converter sees much less ripple current under steady-state conditions than the input capacitor. Peak-to-peak current is equal to that in the inductor, usually a fraction of the total load current. Output capacitor duty places a premium not on power dissipation but on low ESR. During an output load transient, the output capacitor must supply all of the additional load current demanded by the load until the LTC1649 can adjust the inductor current to the new value. ESR in the output capacitor results in a step in the output voltage equal to the ESR value multiplied by the change in load current. A 5A load step with a 0.05Ω ESR output capacitor will result in a 250mV output voltage shift; this is a 10% output voltage shift for a 2.5V supply! Because of the strong relationship between output capacitor ESR and output load transient response, the output capacitor is usually chosen for ESR, not for capacitance value; a capacitor with suitable ESR will usually have a larger capacitance value than is needed to control steady-state output ripple. Electrolytic capacitors rated for use in switching power supplies with specified ripple current ratings and ESR can be used effectively in LTC1649 applications. OS-CON electrolytic capacitors from Sanyo give excellent performance and have a very high performance/size ratio for an electrolytic capacitor. Surface mount applications can use either electrolytic or dry tantalum capacitors. Tantalum capacitors must be surge tested and specified for use in switching power supplies; low cost, generic tantalums are known to have very short lives followed by explosive deaths in switching power supply applications. AVX TPS series surface mount devices are popular tantalum capaci- 9 LTC1649 U U W U APPLICATIONS INFORMATION tors that work well in LTC1649 applications. A common way to lower ESR and raise ripple current capability is to parallel several capacitors. A typical LTC1649 application might require an input capacitor with a 5A ripple current capacity and 2% output shift with a 10A output load step, which requires a 0.005Ω output capacitor ESR. Sanyo OSCON part number 10SA220M (220µF/10V) capacitors feature 2.3A allowable ripple current at 85°C and 0.035Ω ESR; three in parallel at the input and seven at the output will meet the above requirements. PVCC2 requires a 10µF bypass to ground; this capacitor can double as the CPOUT reservoir capacitor, allowing a typical application with CPOUT and PVCC2 connected together to get away with only a single 10µF capacitor at this node, located close to the PVCC2 pin. VCC can also be powered from CPOUT, but is somewhat sensitive to noise. PVCC2 happens to be a significant noisemaker, so most applications require an RC filter from CPOUT/PVCC2 to VCC. 22Ω and 10µF are typical filter values that work well in most applications. Input Supply Considerations/Charge Pump PVCC1 needs to be boosted to a level higher than CPOUT to provide gate drive to Q1. The LTC1649 initially used a charge pump from VIN to create CPOUT; the typical application uses a second charge pump to generate the PVCC1 supply. This second charge pump consists of a Schottky diode (DCP) from CPOUT to PVCC1, and a 1µF capacitor from PVCC1 to the source of Q1. While Q2 is on, the diode charges the capacitor to CPOUT. When Q1 comes on, its source rises to VIN, and the cap hauls PVCC1 up to (CPOUT + VIN), adequate to fully turn on Q1. When Q1 turns back off, PVCC1 drops back down to CPOUT; fortunately, we’re not interested in turning Q1 on at this point, so the lower voltage doesn’t cause problems. The next time Q1 comes on, PVCC1 bounces back up to (CPOUT + VIN), keeping Q1 happy. Figure 4 shows a complete power supply circuit for the LTC1649. The LTC1649 requires four supply voltages to operate: VIN, VCC, PVCC1 and PVCC2. VIN is the primary high power input, supplying current to the drain of Q1 and the input to the internal charge pump at the VIN pin. This supply must be between 2.7V and 6V for the LTC1649 to operate properly. An internal charge pump uses the voltage at VIN to generate a regulated 5V output at CPOUT. This charge pump requires an external 1µF capacitor connected between the C + and C – pins, and an external 10µF reservoir capacitor connected from CPOUT to ground. The voltage at CPOUT must always be greater than or equal to VIN. If VIN is expected to rise above 5V, an additional Schottky diode (D5) should be added from VIN to CPOUT. CPOUT is typically connected to PVCC2 directly, providing the 5V supply that the G2 driver output uses to drive Q2. VIN *OPTIONAL FOR VIN ≥ 5V D5* DCP 22Ω + + CIN 1µF 10µF + 10µF VIN CPOUT VCC C+ PVCC2 PVCC1 G1 Q1 L1 1µF CHARGE PUMP C– DRIVE CIRCUITRY VOUT G2 LTC1649 COUT 1649 F04 Figure 4. LTC1649 Power Supplies 10 + Q2 LTC1649 U W U U APPLICATIONS INFORMATION The CPOUT pin can typically supply 50mA at 5V, adequate to power the VCC and PVCC pins. This supply can also be used to power external circuitry, but any additional current drawn from CPOUT subtracts from the current available to drive the external MOSFETs. Circuits with small external MOSFETs can draw as much as 20mA or 30mA from CPOUT without hindering performance. High output current circuits with large or multiple external MOSFETs may need every milliamp they can get from CPOUT, and external loads should be minimized. The charge pump at PVCC1 is more limited in its abilities, and should not be connected to anything except PVCC1. In particular, do not connect a bypass capacitor from PVCC1 to ground—it will steal charge from the charge pump and actually degrade performance. Output transient response is set by three major factors: the time constant of the inductor and the output capacitor, the ESR of the output capacitor, and the loop compensation components. The first two factors usually have much more impact on overall transient recovery time than the third; unless the loop compensation is way off, more improvement can be had by optimizing the inductor and the output capacitor than by fiddling with the loop compensation components. In general, a smaller value inductor will improve transient response at the expense of ripple and inductor core saturation rating. Minimizing output capacitor ESR will also help optimize output transient response. See Input and Output Capacitors for more information. Soft Start and Current Limit Compensation and Transient Response The LTC1649 voltage feedback loop is compensated at the COMP pin; this is the output node of the internal gm error amplifier. The loop can generally be compensated properly with an RC network from COMP to GND and an additional small C from COMP to GND (Figure 5). Loop stability is affected by inductor and output capacitor values and by other factors. Optimum loop response can be obtained by using a network analyzer to find the loop poles and zeros; nearly as effective and a lot easier is to empirically tweak the RC values until the transient recovery looks right with an output load step. The LTC1649 includes a soft start circuit at the SS pin; this circuit is used both for initial start-up and during current limit operation. SS requires an external capacitor to GND with the value determined by the required soft start time. An internal 12µA current source is included to charge the external capacitor. Soft start functions by clamping the maximum voltage that the COMP pin can swing to, thereby controlling the duty cycle (Figure 6). The LTC1649 will begin to operate at low duty cycle as the SS pin rises to about 2V below the VCC pin. As SS continues to rise, the duty cycle will increase until the error amplifier takes over and begins to regulate the output. When SS reaches 1V below VCC the LTC1649 will be in full operation. An internal switch shorts the SS pin to GND during shutdown. LTC1649 LTC1649 COMP COMP FB VCC 12µA RC CC SS C1 1659 F05 Figure 5. Compensation Pin Hook-Up CSS 1649 F06 Figure 6. Soft Start Clamps COMP Pin 11 LTC1649 U U W U APPLICATIONS INFORMATION The LTC1649 detects the output current by watching the voltage at IFB while Q1 is ON. The ILIM amplifier compares this voltage to the voltage at IMAX (Figure 7). In the ON state, Q1 has a known resistance; by calculating backwards, the voltage generated at IFB by the maximum output current in Q1 can be determined. As IFB falls below IMAX, ILIM will begin to sink current from the soft start pin, causing the voltage at SS to fall. As SS falls, it will limit the output duty cycle, limiting the current at the output. Eventually the system will reach equilibrium, where the pull-up current at the SS pin matches the pull-down current in the ILIM amplifier; the LTC1649 will stay in this state until the overcurrent condition disappears. At this time IFB will rise, ILIM will stop sinking current and the internal pull-up will recharge the soft start capacitor, restoring normal operation. Note that the IFB pin requires an external 1k series resistor to prevent voltage transients at the drain of Q2 from damaging internal structures. will generate a larger overdrive at ILIM, allowing it to pull SS down more quickly and preventing damage to the output components. The ILIM amplifier pulls current out of SS in proportion to the difference between IFB and IMAX. Under mild overload conditions, the SS pin will fall gradually, creating a time delay before current limit takes effect. Very short, mild overloads may not trip the current limit circuit at all. Longer overload conditions will allow the SS pin to reach a steady level, and the output will remain at a reduced voltage until the overload is removed. Serious overloads Under extreme output overloads or short circuits, the ILIM amplifier will pull the SS pin more than 2V below VCC in a single switching cycle, cutting the duty cycle to zero. At this point all switching stops, the output current decays through Q2 and the LTC1649 runs a partial soft start cycle and restarts. If the short is still present the cycle will repeat. Peak currents can be quite high in this condition, but the average current is controlled and a properly designed circuit can withstand short circuits indefinitely with only moderate heat rise in the output FETs. In addition, the soft start cycle repeat frequency can drop into the low kHz range, causing vibrations in the inductor which provide an audible alarm that something is wrong. 0.1µF VIN RIMAX Q1 IMAX IFB + 12µA 1k – Q2 ILIM VCC 12µA SS CSS LTC1649 1649 F07 Figure 7. Current Limit Operation 12 The ILIM amplifier output is disabled when Q1 is OFF to prevent the low IFB voltage in this condition from activating the current limit. It is re-enabled a fixed 170ns after Q1 turns on; this allows for the IFB node to slew back high and the ILIM amplifier to settle to the correct value. As the LTC1649 goes deeper into current limit, it will reach a point where the Q1 on-time needs to be cut to below 170ns to control the output current. This conflicts with the minimum settling time needed for proper operation of the ILIM amplifier. At this point, a secondary current limit circuit begins to reduce the internal oscillator frequency, lengthening the off-time of Q1 while the on-time remains constant at 170ns. This further reduces the duty cycle, allowing the LTC1649 to maintain control over the output current. Shutdown The LTC1649 includes a low power shutdown mode, controlled by the logic at the SHDN pin. A high at SHDN allows the part to operate normally. A low level at SHDN stops all internal switching, pulls COMP and SS to ground internally and turns Q1 and Q2 off. In shutdown, the LTC1649 itself will drop below 25µA quiescent current typically, although off-state leakage in the external MOSFETs may cause the total VIN current to be somewhat higher, especially at elevated temperatures. When SHDN rises again, the LTC1649 will rerun a soft start cycle and LTC1649 U W U U APPLICATIONS INFORMATION resume normal operation. The CPOUT pin remains regulated at 5V in shutdown, and can be used as a keep-alive supply for external circuitry if desired. Note that any current drawn from the CPOUT pin adds to the quiescent current in shutdown, and subtracts from the current available to drive the external MOSFETs if the load remains connected while the LTC1649 is active. External Clock Synchronization The LTC1649 SHDN pin can double as an external clock input for applications that require a synchronized clock or a faster switching speed. The SHDN pin terminates the internal sawtooth wave and resets the oscillator immediately when it goes low, but waits 50µs before shutting down the rest of the internal circuitry. A clock signal applied directly to the SHDN pin will force the LTC1649 internal oscillator to lock to its frequency as long as the external clock runs faster than the internal oscillator frequency. The LTC1649 can be synchronized to frequencies between 250kHz and about 350kHz. An easy way to simplify the math is to choose R2 = 12.65kΩ. This simplifies the equation to: VOUT = R1 + 1.265V 10kΩ A typical 2.5V output application might use R1 = 12.35kΩ, R2 = 12.65kΩ. The nearest standard 1% values are R1 = 12.4kΩ, R2 = 12.7kΩ, which gives an output voltage of 2.5001V—pretty close to 2.5V. Note that using 1% resistors can cause as much as 1% error in the output voltage in a typical LTC1649 application—a significant fraction of the total output error. 0.1% or 0.25% feedback resistors are recommended for applications which require the output voltage to be controlled to better than 3%. VOUT R1 LTC1649 + FB COUT R2 Frequencies above 350kHz can cause erratic current limit operation and are not recommended. GND 1659 F08 Setting the Output Voltage The LTC1649 feedback loop senses the output voltage at the FB pin. The loop regulates FB to 1.265V; to set the output voltage, FB should be connected to the output node through a resistor divider, set up so the voltage at FB is 1.265V when the output is at the desired voltage (see Figure 8). The upper end of R1 should be connected to the output voltage as close to the load as possible, to minimize errors caused by resistance in the output leads. The bottom of R2 should be connected to the high power ground node, at the GND pin of the LTC1649. R1 and R2 should be chosen so that: VOUT = R1 + R2 R + R2 VREF = 1 (1.265V) R2 R2 Figure 8. Resistor Divider at FB Pin LAYOUT CONSIDERATIONS Grounding Proper grounding is critical for the LTC1649 to obtain specified output regulation. Extremely high peak currents (as high as several amps) can flow between the bypass capacitors and the PVCC1, PVCC2 and GND pins. These currents can generate significant voltage differences between two points that are nominally both “ground.” As a general rule, power and signal grounds should be totally separated on the layout, and should be brought together at only one point, right at the LTC1649 GND pin. This helps minimize internal ground disturbances in the LTC1649, while preventing excessive current flow from disrupting the operation of the circuits connected to GND. The high power GND node should be as compact and low impedance as possible, with the negative terminals of the input 13 LTC1649 U U W U APPLICATIONS INFORMATION and output capacitors, the source of Q2, the LTC1649 GND pin, the output return and the input supply return all clustered at one point. Figure 9 is a modified schematic showing the common connections in a proper layout. Note that at 10A current levels or above, current density in the PC board itself can become a concern; traces carrying high currents should be as wide as possible. Power Component Hook-Up/Heat Sinking As current levels rise much above 1A, the power components supporting the LTC1649 start to become physically large (relative to the LTC1649, at least) and can require special mounting considerations. Input and output capacitors need to carry high peak currents and must have low ESR; this mandates that the leads be clipped as short as possible and PC traces be kept wide and short. The power inductor will generally be the most massive single component on the board; it can require a mechanical holddown in addition to the solder on its leads, especially if it is a surface mount type. The power MOSFETs used require some care to ensure proper operation and reliability. Depending on the current levels and required efficiency, the MOSFETs chosen may be as large as TO-220s or as small as SO-8s. High efficiency circuits may be able to avoid heat sinking the power devices, especially with TO-220 type MOSFETs. As an example, a 90% efficient converter working at a steady 2.5V/10A output will dissipate only (25W/90%)10% = 2.8W. The power MOSFETs generally account for the majority of the power lost in the converter; even assuming that they consume 100% of the power used by the converter, that’s only 2.8W spread over two or three devices. A typical SO-8 MOSFET with a RON suitable to provide 90% efficiency in this design can commonly dissipate 2W when soldered to an appropriately sized piece of copper trace on a PC board. Slightly less efficient or higher output current designs can often get by with standing a TO-220 MOSFET straight up in an area with some airflow; such an arrangement can dissipate as much as 3W without a heat sink. Designs which must work in high ambient temperatures or which will be routinely overloaded will generally fare best with a heat sink. VIN DCP + PVCC2 VIN CIN PVCC1 Q1 G1 CPOUT + 22Ω 10µF VCC 1µF L1 1k IFB VOUT 0.1µF LTC1649 + 10µF C+ RIMAX C1 RC CC R1 IMAX 1µF C– G2 COMP FB SS Q2 COUT SHDN GND CSS R2 1649 F09 SHDN Figure 9. Typical Schematic Showing Layout Considerations 14 + LTC1649 U PACKAGE DESCRIPTIO S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) 0.386 – 0.394* (9.804 – 10.008) 16 15 14 13 12 11 10 9 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 2 3 4 5 6 0.053 – 0.069 (1.346 – 1.752) 0.008 – 0.010 (0.203 – 0.254) 0.014 – 0.019 (0.355 – 0.483) TYP 8 0.004 – 0.010 (0.101 – 0.254) 0° – 8° TYP 0.016 – 0.050 (0.406 – 1.270) 7 0.050 (1.270) BSC S16 1098 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC1649 U TYPICAL APPLICATIO SSTL Logic Termination Supply VIN 3.3V MBR0530 + Q1 1/2 Si9802 1µF CERAMIC 1500µF LEXT 1.5µH PVCC1 G1 PVCC2 IFB VOUT = 0.45VIN AT ±5A = 1.48V AT VIN = 3.3V 22Ω NC VCC G2 LTC1649 IMAX FB SHDN SHDN 10µF CERAMIC COMP R1 18.2k + 1500µF R2 15k VIN C+ 1µF CERAMIC C– SS 7.5k Q2 1/2 Si9802 GND CPOUT 0.01µF 220pF + 0.1µF MBR0530 10µF 50pF 2200pF 4.7k 10k 0.1µF 10k – + – 1/2 LT1211 + 1/2 LT1211 10k 1649 TA04 Si9802 = SILICONIX RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1430A High Power Step-Down Switching Regulator Controller 5V to 1.xV @10A, Maximum Duty cycle > 90% Permits 3.3V to 2.xV Conversion LTC1517-5 Micropower, Regulated 5V Charge Pump in a 5-Pin SOT-23 Package Low Power 3.3V to 5V Step-Up Converter LTC1702 2-Phase, Dual Output DC/DC Step-Down Controller 3.3V Input to As Low As 0.8V Conversion, Minimum CIN and COUT LTC1772 SOT-23 Step-Down DC/DC Controller 550kHz Operation for Small Circuit LTC1773 3.3V Input DC/DC Synchronous Step-Down Controller 550kHz Operation, Up to 6A Output, 10-Lead MSOP LTC1874 Dual Output DC/DC Step-Down Controller 550kHz Operation, Up to 4A Output, 16-Lead SSOP LTC1876 Triple Ouput 2-Phase DC/DC Controller Converts 3.3VIN to Two Output Voltages Using 5V Logic N-Channel MOSFETS, Eliminates Need for Auxiliary 5V Supply, >90% Efficiency 16 Linear Technology Corporation 1649fa LT/TP 0501 REV A 2K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com LINEAR TECHNOLOGY CORPORATION 1998