LINER LTC3552 Standalone linear li-ion battery charger and dual synchronous buck converter Datasheet

LTC3552
Standalone Linear Li-Ion
Battery Charger and Dual
Synchronous Buck Converter
DESCRIPTIO
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FEATURES
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Programmable Charge Current Up to 950mA
Complete Linear Charger and Dual DC/DC
Regulator
Buck Converter Output Voltage from 0.6V to 5V
No MOSFET, Sense Resistor or Blocking Diode
Required
Thermal Regulation Maximizes Charge Rate
Without Risk of Overheating*
Charges Directly from a USB Port
Programmable Charge Current Termination
Preset 4.2V Charge Voltage with ±1% Accuracy
Charge Current Monitor Output for Gas Gauging*
Automatic Recharge
Charge Status Output
“Power Present” Output
2.9V Trickle Charge Threshold
Soft-Start Limits Inrush Current
Low Quiescent Current Buck Converter (40µA)
Current Mode Operation, Constant Frequency (2.25MHz)
Low Profile (5mm × 3mm × 0.75mm) DFN Package
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APPLICATIO S
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The LTC®3552 is a complete constant-current/constantvoltage linear charger with a dual DC/DC converter for
single cell lithium-ion batteries. Its DFN package and low
external component count make the LTC3552 ideally suited
for portable applications. Furthermore, the LTC3552 is
designed to work within USB power specifications.
No external sense resistor or external blocking diode is
required due to the internal MOSFET architecture. The
charge voltage is fixed at 4.2V and the charge current is
programmed with a resistor. The charge cycle terminates
when the charge current drops below the programmed
termination threshold after the final float voltage is reached.
When the input supply (wall adapter or USB supply) is
removed, the LTC3552 enters a low current state dropping
the battery drain current to less than 2µA. Thermal regulation maximizes charge rate without risk of overheating.
The synchronous step-down switching regulators generate adjustable output voltages from 5V down to 0.6V.
The switching frequency is set at 2.25MHz, allowing the
use of small surface mount inductors and capacitors.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Protected by U.S. patents, including 6522118, 6700364, 5481178, 6580258, 6304066,
6127815, 6498466, 6611131.
Cellular Telephones, PDAs, MP3 Players
Bluetooth Applications
U
TYPICAL APPLICATIO
Efficiency Curve/
Power Loss of Regulators
Single Cell Li-Ion Battery Charger with
C/5 Termination and Dual DC/DC Converter
100
1000
95
LTC3552
619Ω
1.24k
COUT2
4.7µF
CER
CFF2
68pF
RUN1
ITERM
RUN2
PROG
BAT
CHRG
VCC
PWR
POR
EN
4.7µH
VOUT2
2.5V/
400mA
VIN
R4
887k
R3
280k
90
800mA
10µF
MODE/SYNC
SW2
SW1
VFB2
VFB1
GND
+
2.2µH
R2
604k
CFF1
33pF
4.2V
1-CELL
Li-Ion
BATTERY
VOUT1
1.8V/
800mA
COUT1
10µF
CER
R1
301k
EFFICIENCY (%)
1µF
100
EFFICIENCY
85
80
10
POWER LOSS
75
70
POWER LOSS (mW)
VIN
4.5V TO
6.5V
1
65
60
1
0.1
1000
10
100
LOAD CURRENT (mA)
3552 TA01b
3552 TA01
VCC = 3.3V, VOUT = 1.8V
Burst Mode OPERATION
REGULATOR 1, NO LOAD ON REGULATOR 2
3552f
1
LTC3552
U
W W
W
ABSOLUTE
AXI U RATI GS
U
W
U
PACKAGE/ORDER I FOR ATIO
(Note 1)
Charger Input Supply (VIN) ........................ –0.3V to 10V
PROG, ITERM .................................. –0.3V to VIN + 0.3V
BAT .............................................................. –0.3V to 7V
⎯C⎯H⎯R⎯G, ⎯P⎯W⎯R, ⎯E⎯N......................................... –0.3V to 10V
BAT Short-Circuit Duration............................Continuous
BAT Pin Current ..........................................................1A
PROG Pin Current ....................................................1mA
Converter Input Supply (VCC)....................... –0.3V to 6V
VFB1, VFB2, RUN1, RUN2 ...................–0.3V to VCC +0.3V
MODE/SYNC ....................................–0.3V to VCC + 0.3V
SW1, SW2 .......................................–0.3V to VCC + 0.3V
⎯P⎯O⎯R ............................................................. –0.3V to 6V
Ambient Operating Temperature
Range (Note 2) .................................... –40°C to 85°C
Maximum Junction Temperature (Note 8) ............ 125°C
Storage Temperature Range................... –65°C to 125°C
TOP VIEW
ITERM
1
16 EN
BAT
2
15 PWR
CHRG
3
14 VIN
MODE/SYNC
4
SW2
5
12 SW1
POR
6
11 VCC
RUN2
7
10 RUN1
VFB2
8
9
17
13 PROG
VFB1
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 40°C/W (Note 3)
EXPOSED PAD IS GROUND (PIN 17)
MUST BE SOLDERED TO PCB
ORDER PART NUMBER
DHC PART MARKING
LTC3552EDHC
3552
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VCC = 3.6V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Battery Charger
●
VIN
Input Supply Voltage
IIN
Input Supply Current
Charge Mode (Note 4)
Standby Mode
Shutdown Mode
RPROG = 10k
Charge Terminated
⎯E⎯N = 5V, VIN < VBAT or VIN < VUV
VFLOAT
Regulated Output (Float) Voltage
0°C ≤ TA ≤ 85°C, 4.3V < VIN < 8V
IBAT
BAT Pin Current
RPROG = 10k, Current Mode
RPROG = 2k, Current Mode
Standby Mode, VBAT = 4.2V
Shutdown Mode (⎯E⎯N = 5V, VIN < VBAT or
VIN < VUV)
Sleep Mode, VIN = 0V
●
●
●
●
ITRIKL
Trickle Charge Current
VBAT < VTRIKL, RPROG = 2k
VTRIKL
Trickle Charge Threshold Voltage
RPROG = 10k, VBAT Rising
VTRHYS
Trickle Charge Hysterisis Voltage
RPROG = 10k
VUV
VIN Undervoltage Lockout Voltage
From VIN Low to High
VUVHYS
VIN Undervoltage Lockout Hysteresis
4.25
●
●
●
8
V
0.4
200
25
1
500
50
4.158
4.2
4.242
92
465
100
500
–2.5
±1
105
535
–6
±2
mA
mA
µA
µA
±1
±2
µA
30
45
60
mA
2.8
2.9
3
V
●
3.7
3.8
3.92
V
●
150
200
300
mV
80
mA
µA
µA
V
mV
3552f
2
LTC3552
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VCC = 3.6V unless otherwise noted.
SYMBOL
PARAMETER
V⎯E⎯N(IL)
⎯E⎯N Pin Input Low Voltage
CONDITIONS
●
V⎯E⎯N(IH)
⎯E⎯N Pin Input High Voltage
●
R⎯E⎯N
⎯EN Pin Pull-Down Resistor
●
VASD
VIN – VBAT Lockout Threshold Voltage
VIN from Low to High
VIN from High to Low
ITERM
Charge Termination Current Threshold
RTERM = 1k
RTERM = 5k
VPROG
PROG Pin Voltage
RPROG = 10k, Current Mode
V⎯C⎯H⎯R⎯G
⎯C⎯H⎯R⎯G Pin Output Low Voltage
V⎯P⎯W⎯R
MIN
TYP
0.4
0.7
MAX
UNITS
V
0.7
1
V
1.2
2
5
MΩ
70
5
100
30
140
50
mV
mV
90
17.5
100
20
110
22.5
mA
mA
0.93
1
1.07
V
I⎯C⎯H⎯R⎯G = 5mA
0.35
0.6
V
⎯P⎯W⎯R Pin Output Low Voltage
I⎯P⎯W⎯R = 5mA
0.35
0.6
V
ΔVRECHRG
Recharge Battery Threshold Voltage
VFLOAT – VRECHRG, 0°C < TA < 85°C
100
140
mV
TLIM
Junction Temperature in ConstantTemperature Mode
120
°C
RON-CHRG
Charger’s Power FET On-Resistance
(Between VIN and BAT)
600
mΩ
●
●
60
tSS-CHRG
Charger Soft-Start Time
IBAT = 0 to IBAT = 1000V/RPROG
tRECHRG
Recharge Comparator Filter Time
VBAT High to Low
0.75
100
2
4.5
ms
µs
tTERM
Termination Comparator Filter Time
IBAT Drops Below Charge Termination
Threshold
0.4
1
2.5
ms
5.5
V
30
nA
0.6
0.6
0.612
0.612
V
V
0.5
Switching Regulator
VCC
Operating Voltage Range for Regulator
●
IFB
Feedback Pin Input Current
●
VFB
Feedback Voltage (Note 5)
0°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
●
2.5
0.588
0.585
ΔVLINE_REG
Reference Voltage Line Regulation
VCC = 2.5V to 5.5V (Note 5)
0.3
ΔVLOAD_REG
Output Voltage Load Regulation
(Note 5)
0.5
IS
Input DC Supply Current
Active Mode
Sleep Mode
Shutdown
VFB1 = VFB2 = 0.5V
VFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6V
RUN = 0V, VCC = 5.5V, MODE/SYNC = 0V
700
40
0.1
950
60
1
µA
µA
µA
fOSC
Oscillator Frequency
VFB = 0.6V
2.25
2.7
MHz
fSYNC
Synchronization Frequency
ILIM
Peak Switch Current Limit Regulator 1
Peak Switch Current Limit Regulator 2
VCC = 3V, VFB = 0.5V, Duty Cycle < 35%
VCC = 3V, VFB = 0.5V, Duty Cycle < 35%
RDS(ON)
Top Switch On-Resistance
Bottom Switch On-Resistance
ISW(LKG)
POR
●
1.8
%
2.25
0.95
0.6
%/V
MHz
1.2
0.7
1.6
0.9
A
A
(Note 6)
(Note 6)
0.35
0.30
0.45
0.45
Ω
Ω
Switch Leakage Current
VCC = 5V, VRUN = 0V, VFB = 0V
0.01
1
µA
Power-On Reset Threshold
VFB Ramping Down, MODE/SYNC = 0V
–8.5
Power-On Reset On-Resistance
100
Power-On Reset Delay
%
200
262,144
VRUN
RUN Threshold Voltage
●
IRUN
RUN Leakage Current
●
0.3
Ω
Cycles
1
1.5
V
0.01
1
µA
3552f
3
LTC3552
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Pins of regulators should not exceed 6V.
Note 2: The LTC3552E is guaranteed to meet performance specifications
from 0°C to 85°C Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Failure to solder the exposed backside of the package to the PC
board will result in a thermal resistance much higher than 40°C/W. See
Thermal Considerations.
Note 4: Supply current includes PROG pin current and ITERM pin current
(approximately 100µA each) but does not include any current delivered to
the battery through the BAT pin (approximately 100mA).
Note 5: The regulator is tested in a proprietary test mode that connects
VFB to the output of the error amplifier.
Note 6: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 7: The regulator power switch on-resistances are guaranteed by
correlation to wafer level measurements.
Note 8: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • θJA)
U W
TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified.
Battery Charger
PROG Pin Voltage vs VIN
(Constant-Current Mode)
1.015
1.0100
VBAT = 4V
RPROG = 10k
1.010
Charge Current
vs PROG Pin Voltage
PROG Pin Voltage
vs Temperature
1.0075
600
VIN = 5V
VBAT = 4V
RPROG = 10k
VIN = 5V
RPROG = 2k
RITERM = 2k
500
1.0050
1.000
0.995
400
1.0025
IBAT (mA)
VPROG (V)
VPROG (V)
1.005
1.0000
0.9975
300
200
0.9950
0.990
0.985
100
0.9925
4
4.5
5
5.5
6.5
6
VIN (V)
7
7.5
8
0.9900
–50
0
–25
0
50
25
TEMPERATURE (°C)
75
3552 G01
100
0
0.4
0.2
1
0.6
0.8
VPROG (V)
3552 G03
3552 G02
Regulated Output (Float) Voltage
vs Charge Current
Regulated Output (Float) Voltage
vs Temperature
4.215
4.26
VIN = 5V
4.24 RPROG = 1.25k
4.210
1.2
Regulated Output (Float)
Voltage vs VIN
4.215
VIN = 5V
RPROG = 10k
RPROG = 10k
4.210
4.18
4.16
4.205
VFLOAT (V)
4.205
4.20
VFLOAT (V)
VFLOAT (V)
4.22
4.200
4.200
4.195
4.195
4.190
4.190
4.14
4.12
4.10
0
100
200
300 400
IBAT (mA)
500
600
700
3552 G04
4.185
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
3552 G05
4.185
4
4.5
5
5.5
6.5
6
VIN (V)
7
7.5
8
3552 G06
3552f
4
LTC3552
U W
TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified.
Battery Charger
⎯C⎯H⎯R⎯G Pin I-V Curve
(Pull-Down State)
⎯P⎯W⎯R Pin I-V Curve
(Pull-Down State)
30
TA = –40°C
TA = –40°C
TA = 25°C
25
TA = 25°C
500
20
TA = 90°C
20
TA = 90°C
400
15
10
IBAT (mA)
25
IPWR (mA)
ICHRG (mA)
Charge Current vs Battery Voltage
600
30
15
200
10
5
5
VIN = 5V
VBAT = 4V
0
1
2
4
3
VCHRG (V)
5
6
7
0
1
4
3
VPWR (V)
2
3552 G07
6
5
VIN = 5V
θJA = 40°C/W
RPROG = 2k
100
VIN = 5V
VBAT = 4V
0
2.4
0
0
300
7
2.7
3
3552 G08
3.3 3.6
VBAT (V)
3.9
4.2
4.5
3552 G09
Trickle Charge Current
vs Temperature
60
60
VIN = 5V
VBAT = 2.5V
3.000
VBAT = 2.5V
2.975
50
50
RPROG = 2k
RPROG = 2k
VTRKL (V)
ITRKL (mA)
30
RPROG = 10k
10
0
25
50
TEMPERATURE (°C)
75
100
2.900
2.850
RPROG = 10k
10
0
2.825
4
5
4.5
5.5
VIN (V)
6.5
6
2.800
–50
7
–25
0
50
25
TEMPERATURE (°C)
3552 G09b
3552 G09a
75
100
3552 G09c
Charge Current
vs Ambient Temperature
Charge Current vs VIN
600
600
ONSET OF THERMAL REGULATION
RPROG = 2k
500
500
RPROG = 2k
400
400
IBAT (mA)
–25
2.925
2.875
20
20
IBAT (mA)
ITRKL (mA)
30
VIN = 5V
RPROG = 10k
2.950
40
40
0
–50
Trickle Charge Threshold Voltage
vs Temperature
Trickle Charge Current vs VIN
VBAT = 4V
θJA = 40°C/W
300
200
VIN = 5V
VBAT = 4V
θJA = 40°C/W
200
RPROG = 10k
100
0
300
4
4.5
5
5.5
6
6.5
VIN (V)
RPROG = 10k
100
7
7.5
8
3552 G10
0
–50
–25
50
25
75
0
TEMPERATURE (°C)
100
125
3552 G11
3552f
5
LTC3552
U W
TYPICAL PERFOR A CE CHARACTERISTICS
TA = 25°C Unless Otherwise Specified.
Battery Charger
Power FET On-Resistance
vs Temperature
Recharge Threshold Voltage
vs Temperature
4.16
700
VIN = 4.2V
= 100mA
I
650 BAT
RPROG = 2k
4.14
4.12
VRECHRG (V)
RDS(ON) (mΩ)
600
VIN = 5V
RPROG = 10k
550
500
4.10
4.08
450
4.06
400
350
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
4.04
–50
125
–25
3552 G12
0
25
50
TEMPERATURE (°C)
75
100
3552 G13
Switching Regulator
Burst Mode Operation
Load Step
SW
5V/DIV
Pulse-Skipping Mode
SW
5V/DIV
VOUT
200mV/DIV
IL
200mA/
DIV
VOUT
RIPPLE
20mV/DIV
VOUT
10mV/
DIV
IL
500mA/DIV
VCC = 3.6V
2µs/DIV
VOUT1 = 1.8V
ILOAD = 60mA, MODE/SYNC = 3.6V
REGULATOR 1; CIRCUIT OF FIGURE 2
3552 G14
ILOAD:
80mA800mA
500mA/DIV
IL
200mA
/DIV
20µs/DIV
VCC = 3.6V
VOUT1 = 1.8V
ILOAD = 80mA TO 800mA
REGULATOR 1; CIRCUIT OF FIGURE 2
3552 G15
VCC = 3.6V
1µs/DIV
VOUT1 = 1.8V
ILOAD = 30mA, MODE/SYNC = 0V
REGULATOR 1; CIRCUIT OF FIGURE 2
Oscillator Frequency
vs Temperature
Efficiency vs VCC
2.5
100
Oscillator Frequency
Error vs VCC
10
VCC = 3.6V
8
95
FREQUENCY DEVIATION (%)
2.4
100mA
FREQUENCY (MHz)
EFFICIENCY (%)
90
10mA
85
1mA
80
800mA
75
70
60
2
3
4
VCC (V)
2.3
2.2
2.1
VOUT = 1.8V, REGULATOR 1
Burst Mode OPERATION
CIRCUIT OF FIGURE 2
65
3552 G16
6
4
2
0
–2
–4
–6
–8
5
6
3552 G17
2.0
–50 –25
–10
50
25
75
0
TEMPERATURE (°C)
100
125
3552 G18
2
3
4
VCC (V)
5
6
3552 G19
3552f
6
LTC3552
U W
TYPICAL PERFOR A CE CHARACTERISTICS
TA = 25°C Unless Otherwise Specified.
Switching Regulator
Reference Voltage
vs Temperature
RDS(ON) vs VCC
0.615
VCC = 3.6V
0.610
550
VCC = 2.7V
500
450
VCC = 4.2V
450
0.600
0.595
400
MAIN
SWITCH
RDS(ON) (mΩ)
0.605
RDS(ON) (mΩ)
REFERENCE VOLTAGE (V)
RDS(ON) vs Junction Temperature
500
350
300
0.590
250
0.585
–50 –25
200
SYNCHRONOUS
SWITCH
400
350
300
250
200
150
50
25
75
0
TEMPERATURE (°C)
100
125
1
4
VCC (V)
5
100
–50 –25
7
6
3552 G21
Load Regulation
0.5
95
1.5
0.4
80
PULSE-SKIPPING MODE
70
60
1
10
100
LOAD CURRENT (mA)
0
PULSE-SKIPPING MODE
–0.5
–1.0
VCC = 3.6V, VOUT = 1.8V
NO LOAD ON OTHER
REGULATOR; REGULATOR 1;
CIRCUIT OF FIGURE 2
65
0.5
–2.0
1
1000
3552 G23
VCC = 3.6V
VCC = 2.7V
90
VOUT = 2.5V, REGULATOR 1
50 Burst Mode OPERATION, MODE/SYNC = 3.6V
NO LOAD ON OTHER REGULATOR
CIRCUIT OF FIGURE 2
40
1
10
100
1000
LOAD CURRENT (mA)
3552 G26
EFFICIENCY (%)
VCC = 4.2V
60
–0.1
–0.2
–0.5
1000
2
3552 G25
Efficiency vs Load Current
95
VCC = 3.6V
VCC = 2.7V
VCC = 4.2V
75
70
6
5
4
VCC (V)
100
85
80
3
3552 G24
95
70
0
–0.4
100
90
80
0.1
Efficiency vs Load Current
Efficiency vs Load Current
100
10
100
LOAD CURRENT (mA)
0.2
–0.3
VCC = 3.6V, VOUT = 1.8V
NO LOAD ON OTHER REGULATOR
REGULATOR 1; CIRCUIT OF FIGURE 2
–1.5
VOUT = 1.5V, REGULATOR 1
Burst Mode OPERATION, MODE/SYNC = 3.6V
65
NO LOAD ON OTHER REGULATOR
CIRCUIT OF FIGURE 2
60
1
10
100
1000
LOAD CURRENT (mA)
3552 G27
90
EFFICIENCY (%)
75
VOUT ERROR (%)
85
VOUT = 1.8V
IOUT = 200mA
0.3
Burst Mode OPERATION
VOUT ERROR (%)
1.0
25 50 75 100 125 150
0
JUNCTION TEMPERATURE (°C)
Line Regulation
2.0
Burst Mode OPERATION
MAIN SWITCH
SYNCHRONOUS SWITCH
3552 G22
100
90
EFFICIENCY (%)
3
3552 G20
Efficiency vs Load Current
EFFICIENCY (%)
2
VCC = 3.6V
85
VCC = 3.6V
VCC = 2.7V
80
VCC = 4.2V
75
70
65
60
VOUT = 1.2V, REGULATOR 1
Burst Mode OPERATION, MODE/SYNC = 3.6V
NO LOAD ON OTHER REGULATOR
CIRCUIT OF FIGURE 2
1
10
100
LOAD CURRENT (mA)
1000
3552 G28
3552f
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ITERM (Pin 1): Charge Termination Program. The charge
termination current threshold is programmed by connecting a 1% resistor, RTERM, to ground. The current threshold
ITERM, is set by the following formula:
100 V
100 V
ITERM =
, R TERM =
R TERM
ITERM
BAT (Pin 2): Charge Current Output. Provides charge current to the battery from the internal P-channel MOSFET,
and regulates the final float voltage to 4.2V. An internal
precision resistor divider from this pin sets the float voltage. This divider is disconnected in shutdown mode to
minimize current drain from the battery.
⎯C⎯H⎯R⎯G (Pin 3): Charge Status Open-Drain Output. When
the battery is charging, the ⎯C⎯H⎯R⎯G pin is pulled low by an
internal N-channel MOSFET. When the charge cycle is
completed, ⎯C⎯H⎯R⎯G becomes high impedance.
MODE/SYNC (Pin 4): Combination Mode Selection and
Oscillator Synchronization. This pin controls the operation
of the buck regulators. When tied to VCC or GND, Burst
Mode operation or pulse-skipping mode is selected, respectively. Do not float this pin. The oscillation frequency
can be synchronized to an external oscillator applied to this
pin and pulse-skipping mode is automatically selected.
SW2 (Pin 5): Regulator 2 Switch Node Connection to the
Inductor. This pin swings from VCC to GND.
⎯ O
⎯ R
⎯ (Pin 6): Power-On Reset. This open-drain logic output
P
is pulled to GND when either output voltage drops 8.5%
from the regulated voltage and goes high after 262,144
clock cycles when both regulators are within regulation.
RUN2 (Pin 7): Regulator 2 Enable. Forcing this pin to
VCC enables regulator 2, while forcing it to GND causes
regulator 2 to shut down. This pin must be driven; do
not float.
RUN1 (Pin 10): Regulator 1 Enable. Forcing this pin to
VCC enables regulator 1, while forcing it to GND causes
regulator 1 to shut down. This pin must be driven; do
not float.
VCC (Pin 11): Buck Regulators Input Supply. Provides
power to the switchers. Must be closely decoupled
to GND.
SW1 (Pin 12): Regulator 1 Switch Node Connection to the
Inductor. This pin swings from VCC to GND.
PROG (Pin 13): Charge Current Program and Charge
Current Monitor. Charge current is programmed by connecting a 1% resistor, RPROG, to ground. When charging
in constant-current mode, this pin servos to 1V. In all
modes, the voltage on this pin can be used to measure
the charge current using the following formula:
V
IBAT = PROG • 1000
IPROG
This pin is clamped to approximately 2.4V. Driving this pin to
voltages beyond the clamp voltage should be avoided.
VIN (Pin 14): Charger Input Supply. Provides power to
the charger. VIN can range from 4.25V to 8V. This pin
should be bypassed with at least a 1µF capacitor. When
VIN is within 100mV of the BAT pin voltage, the charger
enters shutdown mode dropping the battery drain current
to less than 2µA.
⎯ ⎯W⎯R (Pin 15): Charger Power Supply Status Open-Drain
P
Output. When VIN is greater than the undervoltage lockout threshold and at least 100mV above VBAT, the
⎯P⎯W⎯R pin is pulled to ground; otherwise, the pin is high
impedance.
VFB2 (Pin 8): Output Feedback for Regulator 2. Receives
the feedback voltage from the external resistive divider
across the output. Normal voltage for this pin is 600mV.
E⎯ ⎯N (Pin 16): Enable Input. A logic high on the ⎯E⎯N pin will
put the charger into shutdown mode where the battery
drain current is reduced to less than 2µA and the supply
current is reduced to less than 50µA. A logic low or floating
the ⎯E⎯N pin (allowing an internal 2MΩ pull-down resistor
to pull this pin low) enables charging.
VFB1 (Pin 9): Output Feedback for Regulator 1. Receives
the feedback voltage from the external resistive divider
across the output. Normal voltage for this pin is 600mV.
Exposed Pad (GND) (Pin 17): Ground. The exposed
backside of the package (Pin 17) is ground and must be
soldered to the PCB for maximum heat transfer.
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VIN
14
120°C
TA
1×
1×
1000×
TDIE
–
+
2 BAT
5µA
MA
R1
PWR 15
+
VA
R2
–
CHRG
3
CA
REF
1.21V
+
–
R3
1V
CHARGE
R4
PWR
–
TERM
LOGIC
0.1V
C1
SHDN
R5
+
EN
C2
EN 16
RENABLE
1
–
+
2.9V
TO BAT
13
17
REGULATOR 1
MODE/SYNC
4
BURST
CLAMP
ITERM
RTERM
PROG
GND
RPROG
VCC
SLOPE
COMP
0.6V
EA
VFB1
ITH
BURST
SLEEP
–
+
5Ω
ICOMP
+
0.35V
–
9
EN
–
+
S
Q
RS
LATCH
R
Q
0.55V
–
UVDET
UV
+
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTI
SHOOTTHRU
12 SW1
+
OVDET
–
+
0.65V
OV
IRCMP
SHUTDOWN
–
VCC
11 VCC
PGOOD1
6 POR
RUN1 10
0.6V REF
RUN2
POR
COUNTER
OSC
7
OSC
PGOOD2
8
REGULATOR 2 (IDENTICAL TO REGULATOR 1)
5 SW2
3552 BD
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OPERATIO
The LTC3552 is made up of two parts: a standalone
constant-current/constant-voltage linear charger for a
single-cell lithium-ion battery and a high efficiency dual
DC/DC switching regulator. The charger can deliver up to
950mA of charge current (using a good thermal PCB layout) with a final float voltage accuracy of ±1%. An internal
P-channel power MOSFET and thermal regulation circuitry
are included. No blocking diode or external current sense
resistor is required; furthermore, the charger is capable
of operating from a USB power source.
The switching regulators use a constant frequency, current mode step-down architecture. Both main (P-channel
MOSFET) and synchronous (N-channel MOSFET) switches
are internal.
LITHIUM-ION BATTERY CHARGER
Normal Charge Cycle
A charge cycle begins when the voltage at the VIN pin
rises above the UVLO threshold level and a 1% program
resistor is connected from the PROG pin to ground. If the
BAT pin is less than 2.9V, the charger enters trickle charge
mode. In this mode, the charger supplies approximately
one-tenth the programmed charge current to bring the battery voltage up to a safe level for full current charging.
When the BAT pin voltage rises above 2.9V, the charger
enters constant-current mode where the programmed
charge current is supplied to the battery. When the BAT
pin approaches the final float voltage (4.2V), the charger
enters constant-voltage mode and the charge current
begins to decrease. When the charge current drops to the
programmed termination threshold (set by the external
resistor RTERM), the charge cycle ends. Figure 1 shows
the state diagram of a typical charge cycle.
Charge Status Indicator (⎯C⎯H⎯R⎯G)
The open drain charge status output has two states: pulldown and high impedance. The pull-down state indicates
that the charger is in a charge cycle. Once the charge
cycle has terminated or the charger is disabled, the pin
becomes high impedance.
Automatic Recharge
Once the charge cycle terminates, the charger continuously
monitors the voltage on the BAT pin using a comparator
with a 2ms filter time (tRECHARGE). A charge cycle restarts
when the battery voltage falls below 4.10V (which corresponds to approximately 80% to 90% battery capacity).
This ensures that the battery is kept at, or near, a fully
charged condition and eliminates the need for periodic
charge cycle initiations. The ⎯C⎯H⎯R⎯G output enters a pulldown state during recharge cycles. If the battery is removed
from the charger, a sawtooth waveform of approximately
100mV appears at the charger output. This is caused by
the repeated cycling between termination and recharge
events. This cycling results in pulsing at the ⎯C⎯H⎯R⎯G output;
an LED connected to this pin will exhibit a pulsing pattern,
indicating to the user that a battery is not present. The
frequency of the sawtooth is dependent on the amount
of output capacitance.
Power Supply Status Indicator (⎯P⎯W⎯R)
The power supply status output has two states: pull-down
and high impedance. The pull-down state indicates that
VIN is above the UVLO threshold (3.8V) and is also 100mV
above the battery voltage. If these conditions are not met,
the ⎯P⎯W⎯R pin is high impedance indicating that the charger
is unable to charge the battery.
POWER ON
BAT < 2.9V
TRICKLE CHARGE
MODE
EN DRIVEN LOW
OR
UVLO CONDITION
STOPS
1/10TH FULL CURRENT
CHRG: STRONG
PULL-DOWN
BAT > 2.9V
SHUTDOWN MODE
CHARGE MODE
IIN DROPS TO <25µA
FULL CURRENT
CHRG: Hi-Z
BAT > 2.9V
CHRG: STRONG
PULL-DOWN
ITERM < 100mV
STANDBY MODE
NO CHARGE CURRENT
EN DRIVEN HIGH
OR
UVLO CONDITION
CHRG: Hi-Z
3552 F01
2.9V < BAT < 4.1V
Figure 1. State Diagram of a Typical Charge Cycle
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OPERATIO
Charge Current Soft-Start
DUAL SWITCHING REGULATOR
The charger includes a soft-start circuit to minimize the
inrush current at the start of a charge cycle. When a charge
cycle is initiated, the charge current ramps from zero to
full-scale current over a period of approximately 100µs.
This has the effect of minimizing the transient current load
on the power supply during start-up.
The regulators use a current mode architecture with a
constant operating frequency of 2.25MHz. Both regulators share the same clock and run in-phase. To suit a
variety of applications, the MODE/SYNC pin allows the
user to choose between low noise or high efficiency.
The output voltages are set by external resistive dividers
returned to the VFB pins. An error amplifier compares the
divided output voltage (VFB) with a reference voltage of
0.6V and adjusts the peak inductor current accordingly.
An undervoltage comparator will pull the ⎯P⎯O⎯R output
low if VFB is less than 91.5% of the reference voltage.
The ⎯P⎯O⎯R output will go high after 262,144 clock cycles
(about 117ms in pulse-skipping mode) of achieving
regulation.
Thermal Limiting
An internal thermal feedback loop reduces the programmed charge current if the die temperature attempts
to rise above a preset value of approximately 120°C. This
feature protects the charger from excessive temperature
and allows the user to push the limits of the power handling
capability of a given circuit board without risk of damaging the charger. The charge current can be set according
to typical (not worst case) ambient temperature with the
assurance that the charger will automatically reduce the
current in worst-case conditions. DFN package power
considerations are discussed further in the Applications
Information section.
Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors the input voltage and keeps the charger in shutdown mode
until VIN rises above the undervoltage lockout threshold. The UVLO circuit has a hysteresis of 200mV.
Also, to protect against reverse current in the power
MOSFET, the UVLO circuit keeps the charger in shutdown
mode if VIN falls to within 30mV of the BAT voltage. If the
UVLO comparator is tripped, the charger will not come
out of shutdown mode until VIN rises 100mV above the
BAT voltage.
Manual Shutdown
At any point in the charge cycle, the charger can be put
into shutdown mode by driving the ⎯E⎯N pin high. This reduces the battery drain current to less than 2µA and the
VIN supply current to less than 50µA. When in shutdown
mode, the ⎯C⎯H⎯R⎯G pin is in the high impedance state. A new
charge cycle can be initiated by driving the ⎯E⎯N pin low. An
internal resistor pull-down on this pin forces the charger
to be enabled if the pin is allowed to float.
Main Regulator Control Loop
During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock
cycle when the feedback voltage is below the reference
voltage. The current into the inductor and the load increases until the current limit is reached. The switch turns
off and energy stored in the inductor flows through the
bottom switch (N-channel MOSFET) into the load until the
next clock cycle. The peak inductor current is controlled
by the internally compensated ITH voltage, which is the
output of the error amplifier. This amplifier compares
VFB to the 0.6V reference (see Block Diagram). When
the load current increases, the VFB voltage decreases
slightly below the reference. This decrease causes the
error amplifier to increase the ITH voltage until the average inductor current matches the new load current. The
main control loop can be shut down by pulling the RUN
pin to ground.
Low Load Current Operation
The MODE/SYNC pin provides two modes of operation
at low currents. Both modes automatically switch from
continuous operation to the selected mode when the load
current is low. For highest efficiency at low current,
connecting the MODE/SYNC pin to VCC makes the regulator operate in Burst Mode, where the PMOS switch
operates intermittently based on load demand with a
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OPERATIO
fixed peak inductor current. By running cycles periodically,
the switching losses which are dominated by the gate
charge losses of the power MOSFETs are minimized. The
main control loop is interrupted when the output voltage
reaches the desired regulated value. A voltage comparator
trips when ITH is below 0.35V, shutting off the switch and
reducing the power. The output capacitor and the inductor supply the power to the load until ITH exceeds 0.65V,
turning on the switch and the main control loop which
starts another cycle.
For lower ripple noise at low currents, the pulse-skipping
mode can be selected by grounding the MODE/SYNC pin. In
this mode, the regulator continues to switch at a constant
frequency down to very low currents, where it will begin
skipping pulses. The efficiency in pulse-skipping mode can
be improved slightly by connecting the SW node to the
MODE/SYNC input which reduces the clock frequency by
approximately 30%. Do not float the MODE/SYNC pin.
Dropout Operation
When the VCC input supply voltage decreases toward the
output voltage, the duty cycle increases to 100% which
is the dropout condition. In dropout, the PMOS switch is
turned on continuously with the output voltage being equal
to the input voltage minus the voltage drops across the
internal P-channel MOSFET and the inductor. An important design consideration is that the RDS(ON) of the
P-channel switch increases with decreasing input supply
voltage (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when
the regulator is used at 100% duty cycle with low input
voltage (see Thermal Considerations in the Applications
Information section).
Low Supply Voltage Operation
To prevent unstable operation, the regulators incorporate
an undervoltage lockout circuit which shuts them down
when the VCC voltage drops below approximately 1.65V.
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A typical LTC3552 application circuit is shown in
Figure 2. External component selection is driven by
the charging requirements and the switching regulators
load requirements.
the ITERM pin to ground. The charge termination current
threshold (ITERM) is set by the following equation:
100 V ICHG RPROG
•
,
=
R TERM
10 R TERM
100 V
R TERM =
ITERM
ITERM =
Programming Charge Current
The charge current is programmed using a single resistor
from the PROG pin to ground. The charge current out of
the BAT pin is 1000 times the current out of the PROG
pin. The program resistor and the charge current are
calculated using the following equations:
RPROG =
The termination condition is detected by using an internal
filtered comparator to monitor the ITERM pin. When the
ITERM pin voltage drops below 100mV* for longer than
tTERM (typically 1ms), charging is terminated. The charge
current is latched off and the charger enters standby mode
where the input supply current drops to 200µA. (Note:
Termination is disabled in trickle charging and thermal
limiting modes).
1000 V
1000 V
, ICHG =
ICHG
RPROG
Charge current out of the BAT pin can be determined
anytime by monitoring the PROG pin voltage and using
the following equation:
IBAT =
ITERM can be set to one tenth of ICHG by shorting the
ITERM pin to the PROG pin, thus eliminating the need
for external resistor RTERM. When configured in this way,
ITERM is always set to ICHG/10, and the programmed charge
current is set by the equation:
500 V **
500 V
ICHG =
,RPROG =
RPROG
ICHG
VPROG
• 1000
RPROG
Programming Charge Termination
The charge cycle terminates when the charge current falls
below the programmed termination threshold. This threshold is set by connecting an external resistor, RTERM, from
* Any external sources that hold the ITERM pin above 100mV will prevent the LTC3552
from terminating a charge cycle.
** These equations apply only when the ITERM pin is shorted to the PROG pin.
VIN
4.5V TO 6.5V
LTC3552
1µF
619Ω
1.24k
VIN
RUN1
ITERM
RUN2
PROG
BAT
CHRG
VCC
PWR
EN
4.7µH
VOUT2
2.5V/400mA
SW2
COUT2
4.7µF
CER
CFF2
68pF
R4
887k
R3
280k
800mA
10µF
+
4.2V
1-CELL Li-Ion
BATTERY
POR
MODE/SYNC
SW1
VFB2
VFB1
GND
2.2µH
R2
604k
CFF1
33pF
VOUT1
1.8V/800mA
COUT1
10µF
CER
R1
301k
3552 F02
Figure 2. LTC3552 Basic Application Circuit
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When charging, transient loads on the BAT pin can cause
the ITERM pin to fall below 100mV for short periods of
time before the DC charge current has dropped to 10%
of the programmed value. The 1ms filter time (tTERM) on
the termination comparator ensures that transient loads
of this nature do not result in premature charge cycle
termination. Once the average charge current drops below the programmed termination threshold, the charger
terminates the charge cycle and stops providing current
out of the BAT pin. In this state, any load on the BAT pin
must be supplied by the battery.
The inductor value will also have an effect on Burst Mode
operation. The transition from low current operation begins when the peak inductor current falls below a level
set by the burst clamp. Lower inductor values result in
higher ripple current which causes this to occur at lower
load currents. This causes a dip in efficiency in the upper
range of low current operation. In Burst Mode operation,
lower inductance values will cause the burst frequency
to increase.
The charger constantly monitors the BAT pin voltage in
standby mode. If this voltage drops below the 4.1V recharge threshold (VRECHRG), another charge cycle begins
and charge current is once again supplied to the battery.
To manually restart a charge cycle when in standby mode,
the input voltage must be removed and reapplied, or the
⎯ pin.
charger must be shut down and restarted using the E⎯ N
Different core materials and shapes will change the
size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy
materials are small and do not radiate much energy, but
generally cost more than powdered iron core inductors
with similar electrical characteristics. The choice of which
style inductor to use often depends more on the price vs
size requirements and any radiated field/EMI requirements
than on what the LTC3552 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3552 applications.
Switching Regulator Inductor Selection
The inductor value has a direct effect on inductor ripple
current ΔIL, which decreases with higher inductance and
increases with higher VCC or VOUT :
∆ IL =
⎞
VOUT ⎛
V
1 − OUT ⎟
⎜
fO • L ⎝
VCC ⎠
Accepting larger values of ΔIL allows the use of low
inductances, but results in higher output ripple voltage,
greater core losses, and lower output current capability.
A reasonable starting point for setting ripple current is
ΔIL = 0.3 • IOUT(MAX),
where IOUT(MAX) is 800mA for regulator 1 and 400mA for
regulator 2. The largest ripple current ΔIL occurs at the
maximum input voltage. To guarantee that the ripple current stays below a specified maximum, the inductor value
should be chosen according to the following equation:
L=
Inductor Core Selection
Table 1. Representative Surface Mount Inductors
PART
NUMBER
VALUE
(µH)
DCR
(Ω MAX)
MAX DC
CURRENT (A)
SIZE
W × L × H (mm)
Sumida
CDRH3D16
2.2
3.3
4.7
0.075
0.110
0.162
1.20
1.10
0.90
3.8 × 3.8 × 1.8
Sumida
CDRH2D11
1.5
2.2
0.068
0.170
0.900
0.780
3.2 × 3.2 × 1.2
Sumida
CMD4D11
2.2
3.3
0.116
0.174
0.950
0.770
4.4 × 5.8 × 1.2
Murata
LQH32CN
1.0
2.2
0.060
0.097
1.00
0.79
2.5 × 3.2 × 2.0
Toko
D312F
2.2
3.3
0.060
0.260
1.08
0.92
2.5 × 3.2 × 2.0
Murata
ELT5KT
3.3
4.7
0.17
0.20
1.00
0.95
4.5 × 5.4 × 1.2
VOUT ⎛
VOUT ⎞
⎜ 1−
⎟
fO • ∆ IL ⎝
VCC(MAX ) ⎠
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Input Capacitor (CIN) Selection
In continuous mode, the input current of the converter is a
square wave with a duty cycle of approximately VOUT/VCC.
To prevent large voltage transients, a low equivalent series
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
IRMS ≈ IMAX
VOUT ( VCC − VOUT )
VCC
where the maximum average output current IMAX equals
the peak current minus 1/2 the peak-to-peak ripple current, IMAX = ILIM – ΔIL/2. This formula has a maximum at
VCC = 2 • VOUT, where IRMS= IOUT/2. This simple worstcase is commonly used to design because even significant
deviations do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based
on only 2000 hours life-time. This makes it advisable to
further derate the capacitor, or choose a capacitor rated at
a higher temperature than required. Several capacitors may
also be paralleled to meet the size or height requirements
of the design. An additional 0.1µF to 1µF ceramic capacitor
is also recommended on VCC for high frequency decoupling,
when not using an all ceramic capacitor solution.
Output Capacitor (COUT) Selection
The selection of COUT is driven by the required ESR to
minimize ripple voltage and load step transients. Typically,
once the ESR requirement is satisfied, the capacitance
is adequate for filtering. The output ripple (ΔVOUT) is
determined by
⎛
1 ⎞
∆ VOUT ≈ ∆ IL ⎜ ESR +
8 fOCOUT ⎟⎠
⎝
where fO = operating frequency, COUT = output capacitance
and ΔIL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ΔIL increases
with input voltage. With ΔIL = 0.3 • IOUT(MAX) the output
ripple will be less than 100mV at maximum VCC and fO =
2.25MHz with ESRCOUT < 150mΩ.
Once the ESR requirements for COUT have been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement, except for an all ceramic solution. In surface
mount applications, multiple capacitors may have to be
paralleled to meet the capacitance, ESR or RMS current handling requirement of the application. Aluminum
electrolytic, special polymer, ceramic and solid tantalum
capacitors are all available in surface mount packages.
The OSCON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of
any aluminum electrolytic at a somewhat higher price.
Special polymer capacitors, such as Sanyo POSCAP,
Panasonic Special Polymer (SP), and Kemet A700, offer very low ESR, but have a lower capacitance density
than other types. Tantalum capacitors have the highest
capacitance density, but they have a larger ESR and it
is critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Aluminum electrolytic
capacitors have a significantly larger ESR, and are often
used in extremely cost-sensitive applications provided
that consideration is given to ripple current ratings and
long term reliability. Ceramic capacitors have the lowest ESR and cost, but also have the lowest capacitance
density, a high voltage and temperature coefficient, and
exhibit audible piezoelectric effects. In addition, the high
Q of ceramic capacitors along with trace inductance can
lead to significant ringing. In most cases, 0.1µF to 1µF of
X5R dielectric ceramic capacitors should also be placed
close to the LTC3552 in parallel with the main capacitors
for high frequency decoupling.
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Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. These are tempting
for switching regulator use because of their very low ESR.
Unfortunately, the ESR is so low that it can cause loop
stability problems. Solid tantalum capacitor ESR generates
a loop “zero” at 5kHz to 50kHz that is instrumental in giving
acceptable loop phase margin. Ceramic capacitors remain
capacitive to beyond 300kHz and usually resonate with their
ESL before ESR becomes effective. Also, ceramic caps are
prone to temperature effects which requires the designer
to check loop stability over the operating temperature
range. To minimize their large temperature and voltage
coefficients, only X5R or X7R ceramic capacitors should
be used. A good selection of ceramic capacitors is available
from Taiyo Yuden, AVX, Kemet, TDK, and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the VCC pin. At best, this ringing can
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is very low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and
the output capacitor size. Typically, 3-4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, VDROOP, is
usually about 2-3 times the linear drop of the first cycle.
Thus, a good place to start is with the output capacitor
size of approximately:
More capacitance may be required depending on the duty
cycle and load step requirements. In most applications,
the input capacitor is merely required to supply high
frequency bypassing, since the impedance to the supply
is very low. A 10µF ceramic capacitor is usually enough
for these conditions.
Setting the Output Voltage
The switching regulator develops a 0.6V reference voltage
between the feedback pin, VFB, and the ground as shown
in Figure 2. The output voltage is set by a resistive divider
according to the following formula:
⎛ R2 ⎞
VOUT = 0 . 6 V ⎜ 1 + ⎟
⎝
R1⎠
Keeping the current low (< 5µA) in these resistors maximizes efficiency, but making it too low may allow stray
capacitance to cause noise problems and reduce the phase
margin of the error amplifier loop.
To improve the frequency response, a feed-forward capacitor, CFF, may also be used. Great care should be taken to
route the VFB line away from noise sources, such as the
inductor or the SW line.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD • ESR, where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or discharge COUT, generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problem.
The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the
⎛ ∆ IOUT ⎞
COUT ≈ 2 . 5 ⎜
⎝ fO • VDROOP ⎟⎠
3552f
16
LTC3552
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actual overall supply performance. A feedforward capacitor,
CFF, is added to improve the high frequency response. Capacitor CFF provides phase lead by creating a high frequency
zero with the top feedback resistor, which improves the
phase margin. For a detailed explanation of optimizing the
compensation components, including a review of control
loop theory, refer to Application Note 76.
In some applications, a more severe transient can be
caused by switching loads with large (>1µF) input capacitors. The discharged load input capacitors are effectively
put in parallel with COUT, causing a rapid drop in VOUT. No
regulator can deliver enough current to prevent this problem, if the switch connecting the load has low resistance
and is driven quickly. The solution is to limit the turn-on
speed of the load switch driver. A Hot Swap™ controller
is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and
soft-starting.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It
is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3552 circuits: 1) VCC quiescent current, 2)
switching losses, 3) I2R losses, 4) other losses.
1) The VCC current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET driver and control currents. VCC current results in a small
(< 0.1%) loss that increases with VCC, even at no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current
results from switching the gate capacitance of the
power MOSFETs. Each time a MOSFET gate is switched
from low to high to low again, a packet of charge dQ
moves from VCC to ground. The resulting dQ/dt is a
current out of VCC that is typically much larger than
the DC bias current. In continuous mode, IGATECHG =
fO(QT + QB), where QT and QB are the gate charges of
the internal top and bottom MOSFET switches. The
gate charge losses are proportional to VCC and thus
their effects will be more pronounced at higher supply voltages.
3) I2R losses are calculated from the DC resistances
of the internal switches, RSW, and external inductor,
RL. In continuous mode, the average output current
flows through inductor L, but is “chopped” between
the internal top and bottom switches. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(D) as follows:
RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses:
I2R losses = IOUT2(RSW + RL)
4) Other “hidden” losses such as copper trace and internal battery resistances can account for additional
efficiency degradations in portable systems. It is very
important to include these “system” level losses in
the design of a system. The internal battery and fuse
resistance losses can be minimized by making sure
that CIN has adequate charge storage and very low
ESR at the switching frequency. Other losses include
diode conduction losses during dead-time and inductor
core losses generally account for less than 2% total
additional loss.
Hot Swap is a trademark of Linear Technology Corporation.
3552f
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Thermal Considerations
The battery charger’s thermal regulation feature and the
switching regulator’s high efficiency make it unlikely that
the LTC3552 will dissipate enough power to exceed its
maximum junction temperature. However, in applications
where the LTC3552 is running at high ambient temperature
with low supply voltage and high duty cycles, the power
dissipated may result in excessive junction temperatures.
To prevent the LTC3552 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated will raise the
junction temperature above the maximum rating. The
temperature rise is given by:
TRISE = PD • θJA
where PD is the power dissipated and θJA is the thermal resistance from the junction of the die to the
ambient temperature. The junction temperature, TJ, is
given by:
TJ = TRISE + TAMBIENT
As an example, consider the case when the battery charger is idle, and both regulators are operating at an input
voltage of 2.7V with a load current of 400mA and 800mA
and an ambient temperature of 70°C. From the Typical
Performance Characteristics graph of Switch Resistance,
the RDS(ON) resistance of the main switch is 0.425Ω.
Therefore, power dissipated by each regulator is:
PD = I2 • RDS(ON) = 272mW and 68mW
The DHC16 package junction-to-ambient thermal resistance, θJA, is 40°C/W. Therefore, the junction temperature
of the regulator operating in a 70°C ambient temperature
is approximately:
TJ = (0.272 + 0.068) • 40 + 70 = 83.6°C
which is below the absolute maximum junction temperature of 125°C.
The majority of the LTC3552 power dissipation comes from
the battery charger. Fortunately, the LTC3552 automatically
reduces the charge current during high power conditions
using a patented thermal regulation circuit. Thus, it is
not necessary to design for worst-case power dissipation scenarios. The conditions that cause the LTC3552 to
reduce charge current through thermal feedback can be
approximated by considering the power dissipated in the
IC. The approximate ambient temperature at which the
thermal feedback begins to protect the IC is:
TA = 120°C – PDθJA
TA = 120°C – (PD(CHARGER) + PD(REGULATOR)) • θJA
Most of the charger’s power dissipation is generated from
the internal charger MOSFET. Thus, the power dissipation
is calculated to be:
PD(CHARGER) = (VIN – VBAT) • IBAT
VIN is the charger supply voltage, VBAT is the battery voltage and IBAT is the charge current.
Example: An LTC3552 operating from a 5V supply is
programmed to supply 800mA full-scale current to a
discharged Li-Ion battery with a voltage of 3.3V. For simplicity, assume the regulators are disabled and dissipate
no power.
The charger power dissipation is calculated to be:
PD(CHARGER) = (5V – 3.3V) • 800mA = 1.36W
Thus, the ambient temperature at which the LTC3552
charger begins to reduce the charge current is approximately:
TA = 120°C – 1.36W • 40°C/W
TA = 120°C – 54.4°C
TA = 65.6°C
The LTC3552 can be used above 65°C ambient but the
charge current will be reduced from the programmed
800mA. The approximate current at a given ambient
temperature can be approximated by:
120 °C – TA
IBAT =
( VIN – VBAT ) • θ JA
Using the previous example with an ambient temperature
of 70°C (and no heat dissipation from the regulator), the
charge current will be reduced to approximately:
IBAT =
120 °C – 70 °C
50 °C
=
(5V – 3 . 3V) • 40 °C/W 68 °C/A
IBAT = 735mA
3552f
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LTC3552
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The previous analysis can be repeated to take into account
the power dissipation of the regulator by:
IBAT =
120 °C – TA − TRISE(REGULATOR)
( VIN – VBAT ) • θ JA
However, the regulator typically dissipates significantly less
heat than the charger (even in worst-case situations), the
calculations here should work well as an approximation.
Moreover, when thermal feedback reduces the charge
current, the voltage at the PROG pin is also reduced
proportionally. It is important to remember that LTC3552
applications do not need to be designed for worst-case
thermal conditions since the IC will automatically reduce
charge current when the junction temperature reaches
approximately 120°C.
In order to deliver maximum charge current under all
conditions, it is critical that the exposed metal pad on
the backside of the LTC3552 package is soldered to relatively large areas of PC board copper with vias to inner
copper layers. Failure to make thermal contact between
the exposed pad on the backside of the package and
the copper board will result in thermal resistances far
greater than 40°C/W. As an example, a correctly soldered
LTC3552 can deliver over 800mA to a battery from a 5V
supply at room temperature. Without a good backside
thermal connection, this number will drop considerably.
Battery Charger Stability Considerations
The constant-voltage mode feedback loop is stable without an output capacitor, provided a battery is connected
to the charger output. With no battery present, an output
capacitor on the BAT pin is recommended to reduce ripple
voltage. When using high value, low ESR ceramic capacitors, it is recommended to add a 1Ω resistor in series
with the capacitor. No series resistor is needed if tantalum
capacitors are used. In constant-current mode, the PROG
pin is in the feedback loop, not the battery. The constantcurrent mode stability is affected by the impedance at the
PROG pin. With no additional capacitance on the PROG
pin, the charger is stable with program resistor values as
high as 20k; however, additional capacitance on this node
reduces the maximum allowed program resistor. The pole
frequency at the PROG pin should be kept above 100kHz.
Therefore, if the PROG pin is loaded with a capacitance,
CPROG, the following equation can be used to calculate
the maximum resistance value for RPROG:
1
RPROG ≤
5
2π • 10 • CPROG
Average, rather than instantaneous charge current may be
of interest to the user. For example, if a switching power
supply operating in low current mode is connected in
parallel with the battery, the average current being pulled
out of the BAT pin is typically of more interest than the
instantaneous current pulses. In such a case, a simple RC
filter can be used on the PROG pin to measure the average
battery current, as shown in Figure 3. A 10k resistor has
been added between the PROG pin and the filter capacitor
to ensure stability.
LTC3552
10k
PROG
GND
RPROG
CFILTER
CHARGE
CURRENT
MONITOR
CIRCUITRY
3552 F03
Figure 3. Isolating Capacitive Load on
PROG Pin and Filtering
VIN Bypass Capacitor
Many types of capacitors can be used for input bypassing;
however, caution must be exercised when using multilayer
ceramic capacitors. Because of the self-resonant and high
Q characteristics of some types of ceramic capacitors, high
voltage transients can be generated under some start-up
conditions such as connecting the charger input to a live
power source. Adding a 1.5Ω resistor in series with an X5R
ceramic capacitor will minimize start-up voltage transients.
For more information, see Application Note 88.
3552f
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Reverse Polarity Input Voltage Protection
In some applications, protection from reverse polarity
voltage on VIN is desired. If the supply voltage is high
enough, a series blocking diode can be used. In other cases,
where the voltage drop must be kept low, a P-regulator
MOSFET can be used (as shown in Figure 4).
DRAIN-BULK
DIODE OF FET
still needs power in standby, Burst Mode operation is selected for good low load efficiency (connect MODE/SYNC
to VCC). First, calculate the inductor value for about 30%
ripple current at maximum VCC:
L=
1 . 8V
⎛ 1 . 8V ⎞
1−
= 1 . 9 µH
2 . 25MHz • 240mA ⎜⎝
4 . 2V ⎟⎠
Choosing a vendor’s closest inductor value of 2.2µH,
results in a maximum ripple current of:
LTC3552
VIN
∆IL =
VIN
3552 F04
Figure 4. Low Loss Input Reverse
Polarity Protection
Design Example
As a design example, assume the LTC3552 is used in
a single lithium-ion battery-powered cellular phone application.
Starting with the charger, choosing RPROG to be 1.24k
programs the charger for 806mA. A good rule of thumb
for ITERMINATE is one tenth the full charge current, so RITERM
is picked to be 1.24k (ITERMINATE = 80mA).
For the switching regulator, VCC will be operating from a
maximum of 4.2V down to about 2.7V. The load requires
a maximum of 800mA in active mode and 2mA in standby
mode. Regulator 1 output voltage is 1.8V. Since the load
1 . 8V
⎛ 1 . 8V ⎞
1−
= 208mA
2 . 25MHz • 2 . 2 µ H ⎜⎝
4 . 2V ⎟⎠
For cost reasons, a ceramic capacitor will be used. COUT
selection is then based on load step droop instead of ESR
requirements. For a 5% output droop:
800mA
COUT = 2 . 5
= 7 . 1µ F
2 . 25MHz • ( 5 % • 2 . 5V )
A good standard value is 10µF. Since the impedance of a
Li-Ion battery is very low, CIN is typically 10µF. The output
voltage can now be programmed by choosing the values
of R1 and R2. To maintain high efficiency, the current in
these resistors should be kept small. Choosing 2µA with
0.6V feedback voltage makes R1 ~300k. A close standard
1% resistor is 301k, and R2 is then 604k. The ⎯P⎯O⎯R pin
is an open-drain output and requires a pull-up resistor. A
100k resistor is used for adequate speed. Figure 2 shows
the complete schematic for this design example.
3552f
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Board Layout Considerations
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GND pin at one
point and should not share the high current path of
CS or COUT.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3552. These items are also illustrated graphically
in the layout diagram of Figure 5. Check the following in
your layout:
6. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. These copper areas should be connected
to VCC or GND.
1. Does the capacitor CS connect to the power VCC and GND
(exposed pad) as closely as possible? This capacitor
provides the AC current to the internal power MOSFETs
and their drivers.
VIN
VIN
CIN
VCC
POR
2. The feedback signals VFB should be routed away from
noisy components and traces, such as the SW line, and
its trace should be minimized.
CS
MODE/SYNC
LTC3552
L2
VOUT2
SW2
L1
SW1
C5
3. Are the COUT and L1 closely connected? The (–)
plate of COUT returns current to GND and the (–) plate
of CS.
VFB1
VFB2
R4
GND
R3
COUT2
4. Keep sensitive components away from the SW pins.
The input capacitor CS should be routed away from the
SW traces and the inductors.
VOUT1
C4
R1
R2
COUT1
3552 F05
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 5. Layout Diagram
L1
VOUT1
COUT1
C4
R2
GND
VFB1
VIA TO VFB1
9
10 RUN1
11 VCC
12 SW1
13 PROG
R1
GND
17
GND
14 VIN
15 PWR
16 EN
2
3
4
5
6
7
8
BAT
CHRG
MODE/SYNC
SW2
POR
RUN2
VFB2
R3
C5
L2
1
ITERM
VIA TO VFB2
COUT2
CIN
CS
VIN
R4
VOUT2
3552 F06
Figure 6. Suggested Layout
3552f
21
LTC3552
TYPICAL APPLICATION
Full-Featured Single-Cell Li-Ion
Charger Plus Dual Step-Down Converter
LTC3552
VIN
5V
RUN1
VIN
RUN2
1µF
1k
CHRG
1k
+
VCC
PWR
EN
500mA
BAT
10µF
MODE/SYNC
4.2V
1-CELL
Li-Ion
BATTERY
100k
POR
4.7µH
VOUT2
2.5V/400mA
SW2
COUT2
4.7µF
CER
CFF2
68pF
R4
887k
R3
280k
VFB1
VFB2
GND
2.2µH
VOUT1
1.8V/800mA
SW1
ITERM
1k
PROG
R4
604k
CFF1
33pF
COUT1
10µF
CER
R3
301k
2k
3552 TA02
3552f
22
LTC3552
U
PACKAGE DESCRIPTIO
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
5.00 ±0.10
(2 SIDES)
R = 0.20
TYP
3.00 ±0.10
(2 SIDES)
9
0.40 ± 0.10
16
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
0.200 REF
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3552f
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23
LTC3552
TYPICAL APPLICATION
Li-Ion Charger and Step-Down Converters with PowerPath™
VIN
5V
1k
RUN1
RUN2
VCC
VIN
10µF
LTC3552
1µF
1k
1k
CHRG
BAT
PWR
POR
EN
MODE/SYNC
4.7µH
VOUT2
2.5V/400mA
COUT2
4.7µF
CER
CFF2
68pF
+
800mA
2.2µH
SW2
SW1
VFB2
VFB2
604k
887k
GND
ITERM
PROG
280k
1k
4.2V
1-CELL
Li-Ion BATTERY
VOUT1
1.8V/800mA
CFF1
33pF
COUT1
10µF
CER
301k
2k
3552 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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Charges Single-Cell Li-Ion Batteries Directly From USB Port, Thermal
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Standalone 950mA Lithium-Ion Charger in DFN
C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy
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Low-Loss PowerPathTM Controller in ThinSOT
VIN: 3V to 28V, Automatic Switching Between DC Sources
PowerPath and ThinSOT are registered trademarks of Linear Technology Corporation.
3552f
24 Linear Technology Corporation
LT 0406 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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© LINEAR TECHNOLOGY CORPORATION 2006