LINER LTC4360CSC8-1TRMPBF Overvoltage protection controller Datasheet

LTC4360-1/LTC4360-2
Overvoltage Protection
Controller
FEATURES
DESCRIPTION
n
The LTC®4360 overvoltage protection controller safeguards
2.5V to 5.5V systems from power supply overvoltage. It is
designed for portable devices with multiple power supply
options including wall adaptors, car battery adaptors and
USB ports.
n
n
n
n
n
n
n
n
n
n
2.5V to 5.5V Operation
Overvoltage Protection Up to 80V
No Input Capacitor or TVS Required for Most
Applications
2% Accurate 5.8V Overvoltage Threshold
Controls N-Channel MOSFET
<1μs Overvoltage Turn-Off, Gentle Shutdown
Adjustable Power-Up dV/dt Limits Inrush
Reverse Voltage Protection (LTC4360-2)
Power Good Output
Low Current Shutdown (LTC4360-1)
Available in a Tiny 8-Lead SC70 Package
APPLICATIONS
n
n
n
n
n
USB Protection
Handheld Computers
Cell/Smart Phones
MP3/MP4 Players
Digital Cameras
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT, PowerPath, How Swap and No RSENSE are trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners.
The LTC4360 controls an external N-channel MOSFET in
series with the input power supply. During overvoltage
transients, the LTC4360 turns off the MOSFET within 1μs,
isolating downstream components from the input supply.
Inductive cable transients are absorbed by the MOSFET
and load capacitance. In most applications, the LTC4360
provides protection from transients up to 80V without
requiring transient voltage suppressors or other external
components.
The LTC4360 has a delayed start-up and an adjustable dV/dt
ramp-up for inrush current limiting. A PWRGD pin provides
power good monitoring for VIN. Following an overvoltage condition, the LTC4360 automatically restarts with a
start-up delay. The LTC4360-1 features a soft shutdown
controlled by the ON pin, while the LTC4360-2 controls an
optional external P-channel MOSFET for negative voltage
protection.
TYPICAL APPLICATION
Protection from Overvoltage
Si1470DH
VIN
5V
COUT
Output Protected from Overvoltage at Input
VIN
VOUT
5V
1.5A
GATE
IN
OUT
LTC4360-1
ON
VGATE
10V/DIV
PWRGD
GND
VOUT
VIN, VOUT
5V/DIV
436012 TA01a
Si1470DH
COUT = 10μF
0.5μs/DIV
436012 TA01b
436012f
1
LTC4360-1/LTC4360-2
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Bias Supply Voltage (IN) ............................ –0.3V to 85V
Input Voltages
OUT, ON ................................................... –0.3V to 9V
Output Voltages
PWRGD.................................................... –0.3V to 9V
GATE (Note 3) ........................................ –0.3V to 15V
GATEP.................................................... –0.3V to 85V
IN to GATEP ........................................... –0.3V to 10V
Operating Temperature Range
LTC4360C ................................................ 0°C to 70°C
LTC4360I .............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
PIN CONFIGURATION
LTC4360-1
LTC4360-2
TOP VIEW
IN 1
GND 2
GND 3
GND 4
TOP VIEW
8 GATE
7 OUT
6 ON
5 PWRGD
IN 1
GND 2
GND 3
GND 4
SC8 PACKAGE
8-LEAD PLASTIC SC70
8 GATEP
7 GATE
6 OUT
5 PWRGD
SC8 PACKAGE
8-LEAD PLASTIC SC70
TJMAX = 125°C, θJA = 270°C/W
TJMAX = 125°C, θJA = 270°C/W
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4360CSC8-1#TRMPBF
LTC4360CSC8-1#TRPBF
LDXN
8-Lead Plastic SC70
0°C to 70°C
LTC4360CSC8-2#TRMPBF
LTC4360CSC8-2#TRPBF
LDXP
8-Lead Plastic SC70
0°C to 70°C
LTC4360ISC8-1#TRMPBF
LTC4360ISC8-1#TRPBF
LDXN
8-Lead Plastic SC70
–40°C to 85°C
LTC4360ISC8-2#TRMPBF
LTC4360ISC8-2#TRPBF
LDXP
8-Lead Plastic SC70
–40°C to 85°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
436012f
2
LTC4360-1/LTC4360-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VON = 0V (LTC4360-1) unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Supplies
VIN
Input Voltage Range
VIN(UVL)
Input Undervoltage Lockout
IIN
Input Supply Current
l
2.5
VIN Rising
l
1.8
2.1
2.45
V
LTC4360-1 VON = 0V, LTC4360-2
l
220
400
μA
LTC4360-1 VON = 2.5V
l
1.5
10
μA
VIN Rising
l
5.684
5.8
5.916
V
l
25
100
200
mV
l
l
3.5
4.5
4.5
6
6
7.9
V
V
80
V
Thresholds
VIN(OV)
IN Pin Overvoltage Threshold
ΔVOV
Overvoltage Hysteresis
External Gate Drive
ΔVGATE
External N-Channel MOSFET Gate Drive
(VGATE – VOUT)
VGATE(TH)
GATE High Threshold for PWRGD Status VIN = 3.3V
VIN = 5V
l
l
5.7
6.7
6.3
7.2
6.8
7.8
V
V
IGATE(UP)
GATE Pull-Up Current
VGATE = 1V
l
–5
–10
–15
μA
VGATE(UP)
GATE Ramp-Up
VGATE = 1V to 7V
l
1.5
3
4.5
V/ms
IGATE(FST)
GATE Fast Pull-Down Current
Fast Turn-Off, VIN = 6V, VGATE = 9V
l
15
30
60
mA
IGATE(DN)
GATE Pull-Down Current
VON = 2.5V, VGATE = 9V (LTC4360-1)
l
10
40
80
μA
IOUT(IN)
OUT Input Current
VOUT = 5V, VON = 0V
VOUT = 5V, VON = 2.5V
l
l
5
10
0
20
±3
μA
μA
VON(TH)
ON Input Threshold
(LTC4360-1)
l
0.4
1.5
V
ION
ON Pull-Down Current
VON = 2.5V (LTC4360-1)
l
2.5
5
10
μA
VGATEP(CLP)
IN to GATEP Clamp Voltage
(LTC4360-2)
l
5
5.8
7.5
V
RGATEP
GATEP Resistive Pull-down
VGATEP = 3V (LTC4360-2)
l
0.8
2
3.2
MΩ
VPWRGD(OL)
PWRGD Output Low Voltage
VIN = 5V, IPWRGD = 3mA
l
RPWRGD
PWRGD Pull-Up Resistance to OUT
VIN = 6.5V, VPWRGD = 1V
l
250
tON
GATE On Delay
VIN High to IGATE = –5μA
l
50
tOFF
GATE Off Propagation Delay
VIN = Step 5V to 6.5V
l
tPWRGD
PWRGD Delay
VIN = Step 5V to 6.5V
VGATE > VGATE(TH) to PWRGD Low
l
l
VON = Step 0V to 2.5V (LTC4360-1)
l
2.5V ≤ VIN < 3V, IGATE = –1μA
3V ≤ VIN < 5.5V, IGATE = –1μA
Input Pins
Output Pins
0.23
0.4
V
500
800
kΩ
Delay
tON(OFF)
ON High to GATE Off
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
25
130
200
ms
0.25
1
μs
0.25
65
1
100
μs
ms
2
5
μs
Note 3: An internal clamp limits VGATE to a minimum of 4.5V above VOUT.
Driving this pin to voltages beyond this clamp may damage the device.
436012f
3
LTC4360-1/LTC4360-2
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VIN = 5V, VON = 0V (LTC4360-1) unless otherwise noted.
Input Supply Current
vs Input Voltage
1000
40
8
LTC4360-1 VON = 0V, LTC4360-2)
7
6
$VGATE (V)
VON = 2.5V
(LTC4360-1)
10
1
5
VIN = 3V
4
VIN = 2.5V
3
VIN = 6V
VGATE = 9V
35
VIN = 5V
IGATE(FST) (mA)
100
IIN (μA)
GATE Fast Pull-Down Current
vs Temperature
GATE Drive vs GATE Current
30
25
2
1
0.1
1
0
2
4
6
8
IGATE (μA)
10
436012 G01
8
tOFF (μs)
200
7
11
6
10
5
4
3
IPWRGD (mA)
4
5
0
0.5
1
1.5
VOVDRV (V)
2
2.5
Normal Start-Up Sequence
4
2.5
3
3.5
4
4.5
VIN (V)
5
5.5
6
436012 G06
GATE Slow Ramp-Up
Entering Sleep Mode (LTC4360-1)
VON
5V/DIV
VIN
5V/DIV
VOUT
5V/DIV
VIN
5V/DIV
VOUT
5V/DIV
VOUT
5V/DIV
VGATE
10V/DIV
VGATE
10V/DIV
VGATE
10V/DIV
ICABLE
0.5A/DIV
ICABLE
0.5A/DIV
ICABLE
0.5A/DIV
436012 G07
VGATE(TH)
436012 G05
436012 G04
20ms/DIV
FIGURE 5 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
VGATE
7
1
5
VIN = VOUT
8
6
0
2
100
75
9
2
100
1
12
VIN = STEP 5V TO (VIN(OV) + VOVDRV)
3
0
0
25
50
TEMPERATURE (°C)
436012 G03
VGATE /VGATE(TH) (V)
400
300
–25
GATE Voltage and GATE High
Threshold (for PWRGD Status)
vs Input Voltage
GATE Off Propagation Delay
vs Overdrive (VOVDRV)
500
VPWRGD(OL) (mV)
12
436012 G02
PWRGD Voltage
vs PWRGD Current
0
20
–50
0
100
10
VIN (V)
1ms/DIV
FIGURE 5 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
436012 G08
50μs/DIV
FIGURE 5 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
436012 G09
436012f
4
LTC4360-1/LTC4360-2
PIN FUNCTIONS
GATE: Gate Drive for External N-Channel MOSFET. An
internal charge pump provides a 10μA pull-up current
to charge the gate of the external N-channel MOSFET. An
additional ramp circuit limits the GATE ramp rate when
turning on to 3V/ms. For slower ramp rates, connect an
external capacitor from GATE to GND. An internal clamp
limits GATE to 6V above the OUT pin voltage. An internal
GATE high comparator controls the PWRGD pin.
GATEP (LTC4360-2): Gate Drive for External P-Channel
MOSFET. GATEP connects to the gate of an optional external
P-channel MOSFET to protect against negative voltages
at IN. This pin is internally clamped to 5.8V below VIN. An
internal 2M resistor connects this pin to ground. Connect
to IN if not used.
GND: Device Ground.
IN: Supply Voltage Input. Connect this pin to the input
power supply. This pin has an overvoltage threshold of
5.8V. After an overvoltage event, this pin must fall below
VIN(OV) – ΔVOV to release the overvoltage lockout. During lockout, GATE is held low and the PWRGD pull-down
releases.
ON (LTC4360-1): On Control Input. A logic low at ON
enables the LTC4360-1. A logic high at ON activates a
low current pull-down at the GATE pin and causes the
LTC4360-1 to enter a low current sleep mode. An internal
5μA current pulls ON down to ground. Connect to ground
or leave open if unused.
OUT: Output Voltage Sense Input for Gate Clamp. Connect
to the source of the external N-channel MOSFET to sense
the output voltage for GATE to OUT clamp.
PWRGD: Power Good Status. Open-drain output with
internal 500k resistive pull-up to OUT. Pulls low 65ms
after GATE ramps above VGATE(TH).
BLOCK DIAGRAM
GATEP
(LTC4360-2)
200k
IN
5.8V
1.8M
CHARGE
PUMP
10μA
GATE
GATE HIGH
COMPARATOR
ON
(LTC4360-1)
1V
+
–
+
–
OVERVOLTAGE
COMPARATOR
CONTROL
5.8V
OUT
VGATE(TH)
+
5μA
5.8V
–
500k
5.7V
PWRGD
GND
436012 BD
436012f
5
LTC4360-1/LTC4360-2
OPERATION
Mobile devices like cell phones and MP3/MP4 players have
highly integrated subsystems fabricated from deep submicron CMOS processes. The small form factor is accompanied
by low absolute maximum voltage ratings. The sensitive
electronics are susceptible to damage from transient or DC
overvoltage conditions from the power supply.
Failures or faults in the power adaptor can cause an overvoltage event. So can hot-plugging an AC adaptor into the
power input of the mobile device (see LTC Application Note
88). Today’s mobile devices derive their power supply or
recharge their internal batteries from multiple alternative
inputs like AC wall adaptors, car battery adaptors and USB
ports. A user may unknowingly plug in the wrong adaptor,
damaging the device with a high or even a negative power
supply voltage.
The LTC4360 protects low voltage electronics from these
overvoltage conditions by controlling a low cost external
N-channel MOSFET configured as a pass transistor. At
power-up (VIN > 2.1V), a start-up delay cycle begins. Any
overvoltage condition causes the delay cycle to continue
until a safe voltage is present. When the delay cycle
completes, an internal high side switch driver slowly
ramps up the MOSFET gate, powering up the output at
a controlled rate and limiting the inrush current to the
output capacitor.
If the voltage at the IN pin exceeds 5.8V (VIN(OV)),
GATE is pulled low quickly to protect the load. The
incoming power supply must remain below 5.7V
(VIN(OV) – ΔVOV) for the duration of the start-up delay to
restart the GATE ramp-up.
The LTC4360-1 has a CMOS compatible ON input. When
driven low, the part is enabled. When driven high, the
external N-channel MOSFET is turned off and the supply
current of the LTC4360-1 drops to 1.5μA. The PWRGD
pull-down releases during this low current sleep mode,
UVLO or overvoltage and the subsequent 130ms start-up
delay. After the start-up delay, GATE starts its slow rampup and ramps higher than VGATE(TH) to trigger a 65ms
delay cycle. When that completes, PWRGD pulls low.
The LTC4360-2 has a GATEP pin that drives an optional
external P-channel MOSFET to provide protection against
negative voltages at IN.
APPLICATIONS INFORMATION
The typical LTC4360 application protects 2.5V to 5.5V systems in portable devices from power supply overvoltage.
The basic application circuit is shown in Figure 1. Device
operation and external component selection is discussed
in detail in the following sections.
M1
Si1470DH
VIN
5V
COUT
10μF
VOUT
5V
1.5A
GATE
OUT
IN
LTC4360-1
ON
When VIN is less than the undervoltage lockout level of
2.1V, the GATE driver is held low and the PWRGD pulldown is high impedance. When VIN rises above 2.1V and
ON (LTC4360-1) is held low, a 130ms delay cycle starts.
Any undervoltage or overvoltage event at IN (VIN < 2.1V or
VIN > 5.7V) restarts the delay cycle. This delay allows the
N-channel MOSFET to isolate the output from any input
transients that occur at start-up. When the delay cycle
completes, GATE starts its slow ramp-up.
GATE Control
PWRGD
GND
Start-Up
436012 F01
Figure 1. Protection from Input Overvoltage
An internal charge pump enhances the external MOSFET
with 6V from GATE to OUT. This allows the use of logiclevel N-channel MOSFETs. An internal 6V clamp between
GATE and OUT protects the MOSFET gate.
436012f
6
LTC4360-1/LTC4360-2
APPLICATIONS INFORMATION
The GATE ramp rate is limited to 3V/ms. VOUT follows at
a similar rate which results in an inrush current into the
load capacitor COUT of:
IINRUSH = COUT •
dVGATE
= COUT • 3 [mA/µF ]
dt
The servo loop is compensated by the parasitic capacitance of the external MOSFET. No further compensation
components are normally required. In the case where
the parasitic capacitance is less than 100pF, a 100pF
compensation capacitor between GATE and ground may
be required.
An even slower GATE ramp and lower inrush current
can be achieved by connecting an external capacitor, CG,
from GATE to ground. The voltage at GATE then ramps
up with a slope equal to 10μA/CG [V/s]. Choose CG using
the formula:
CG =
10µA
IINRUSH
resistor from PWRGD to the I/O rail with a resistance
low enough to override the internal 500k pull-up to OUT.
Figure 2 details PWRGD behavior for a LTC4360-1 with
1k pull-up to 5V at PWRGD.
START-UP
FROM UVLO
OV
VIN(OV)
RESTART
FROM OV
ON
RESTART
FROM ON
VIN(OV)–$VOV
VIN(UVL)
IN
OUT
VGATE(TH)
VGATE(TH)
VGATE(TH)
VGATE(TH)
GATE
ON
PWRGD
• COUT
Overvoltage
When power is first applied, VIN must remain below 5.7V
(VIN(OV) – ΔVOV) for more than 130ms before GATE is
ramped up to turn on the MOSFET. If VIN then rises above
5.8V (VIN(OV)), the overvoltage comparator activates the
30mA fast pull-down on GATE within 1μs. After an overvoltage condition, the MOSFET is held off until VIN once
again remains below 5.7V for 130ms.
PWRGD Output
PWRGD is an active low output with a MOSFET pulldown to ground and a 500k resistive pull-up to OUT. The
PWRGD pin pull-down releases during the low current
sleep mode (invoked by ON high), UVLO or overvoltage and the subsequent 130ms start-up delay. After the
start-up delay, GATE starts its slow ramp-up and control
of the PWRGD pull-down passes on to the GATE high
comparator. VGATE > VGATE(TH) for more than 65ms asserts
the PWRGD pull-down and VGATE < VGATE(TH) releases
the pull-down. The PWRGD pull-down is capable of sinking up to 3mA of current allowing it to drive an optional
LED. To interface PWRGD to another I/O rail, connect a
130ms
130ms
65ms
65ms
130ms
65ms
Figure 2. PWRGD Behavior
ON Input (LTC4360-1)
ON is a CMOS compatible, active low enable input. It has
a default 5μA pull-down to ground. Connect this pin to
ground or leave open to enable normal device operation.
If it is driven high while the external MOSFET is turned on,
GATE is pulled low with a weak pull-down current (40μA)
to turn off the external MOSFET gradually, minimizing input
voltage transients. The LTC4360-1 then goes into a low current sleep mode, drawing only 1.5μA at IN. When ON goes
back low, the part restarts with a 130ms delay cycle.
GATEP Control (LTC4360-2)
GATEP has a 2M resistive pull-down to ground and a 5.8V
Zener clamp in series with a 200k resistor to IN. It controls the gate of an optional external P-channel MOSFET
to provide negative voltage protection. The 2M resistive
pull-down turns on the MOSFET once VIN – VGATEP is
more than the MOSFET gate threshold voltage. The IN to
GATEP Zener protects the MOSFET from gate overvoltage
by clamping its VGS to 5.8V when VIN goes high.
436012f
7
LTC4360-1/LTC4360-2
APPLICATIONS INFORMATION
MOSFET Configurations and Selection
The LTC4360 can be used with various external MOSFET
configurations (see Figure 3). The simplest configuration is
a single N-channel MOSFET. It has the lowest RDS(ON) and
voltage drop and is thus the most power efficient solution.
When GATE is pulled to ground, the MOSFET can isolate
OUT from a positive voltage at IN up to the BVDSS of the
MOSFET. However, reverse current can still flow from OUT
to IN via the parasitic body diode of the MOSFET.
For near zero reverse leakage current protection when GATE
is pulled to ground, back-to-back N-channel MOSFETs can
be used. Adding an additional P-channel MOSFET controlled
by GATEP (LTC4360-2) provides negative input voltage
protection down to the BVDSS of the P-channel MOSFET.
Another configuration consists of a P-channel MOSFET
controlled by GATEP and a N-channel MOSFET controlled
by GATE. This provides protection against overvoltage and
negative voltage but not reverse current.
OVERVOLTAGE
PROTECTION
M1
SUPPLY
IN
OUT
GATE
OVERVOLTAGE, REVERSE
CURRENT PROTECTION
M1
M3
SUPPLY
IN
OUT
GATE
SUPPLY
NEGATIVE
VOLTAGE
PROTECTION
M2
OVERVOLTAGE, REVERSE
CURRENT PROTECTION
M1
M3
IN
SUPPLY
OUT
GATEP
GATE
NEGATIVE
VOLTAGE
PROTECTION
M2
OVERVOLTAGE
PROTECTION
M1
Input Transients
IN
GATEP
Figure 4 shows a typical setup when an AC wall adaptor
charges a mobile device. The inductor LIN represents the
lumped equivalent inductance of the cable and the EMI filter
found in some wall adaptors. RIN is the lumped equivalent
resistance of the cable, adaptor output capacitor ESR and
the connector contact resistance.
LIN and RIN form an LC tank circuit with any capacitance
at IN. If the wall adaptor is powered up first, plugging the
wall adaptor output to IN does the equivalent of applying
WALL ADAPTOR
AC/DC
RIN
LIN
OUT
GATE
436012 F03
Figure 3. MOSFET Configurations
a voltage step to this LC circuit. The resultant voltage
overshoot at IN can rise to twice the DC output voltage
of the wall adaptor as shown in Figure 4. Figure 5 shows
the 20V adaptor output applied to the LTC4360. Due to
the low capacitance at the IN pin, the plug-in transient has
been brought down to a manageable level.
MOBILE
DEVICE
IN
ICABLE
+
COUT
CABLE
VIN
10V/DIV
LOAD
ICABLE
20A/DIV
436012 F04a
5μs/DIV
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
436012 F04b
Figure 4. 20V Hot-Plug into a 10μF Capacitor
436012f
8
LTC4360-1/LTC4360-2
APPLICATIONS INFORMATION
WALL ADAPTOR
AC/DC
RIN
LIN
IN
M1
Si1470DH
OUT
MOBILE
DEVICE
ICABLE
COUT
+
GATE
IN OUT
LTC4360
CABLE
VIN
10V/DIV
LOAD
VOUT
1V/DIV
GND
ICABLE
20A/DIV
436012 F04a
5μs/DIV
436012 F04b
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
Figure 5. 20V Hot-Plug into the LTC4360
VIN
20V/DIV
VADAPTOR
VIN
20V/DIV
VOUT
VADAPTOR/VOUT
5V/DIV
VOUT
1V/DIV
ICABLE
5A/DIV
ICABLE
5A/DIV
5μs/DIV
436012 F05
FDC5612
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
2μs/DIV
436012 F06
FIGURE 5 CIRCUIT
RIN = 150μΩ, LIN = 2μH
LOAD = 10Ω, COUT = 10μF
Figure 6. 50V Hot-Plug into the LTC4360
Figure 7. Input Transient After Overvoltage
As the IN pin can withstand up to 80V, a high voltage Nchannel MOSFET can be used to protect the system against
rugged abuse from high transient or DC voltages up to the
BVDSS of the MOSFET. Figure 6 shows a 50V input plugged
into the LTC4360 controlling a 60V rated MOSFET.
This is well below the 85V absolute maximum voltage
rating of the LTC4360. The single, nonrepetitive, pulse of
energy (EAS) absorbed by the MOSFET during this avalanche breakdown with a peak current IAS is approximated
by the formula:
Input transients also occur when the current through the
cable inductance changes abruptly. This can happen when
the LTC4360 turns off the N-channel MOSFET rapidly in an
overvoltage event. Figure 7 shows the effects of a voltage
transient at the wall adaptor output VADAPTOR. The current in LIN will cause VIN to overshoot and avalanche the
N-channel MOSFET to COUT . Typically, IN will be clamped
to a voltage of VOUT + 1.3•(BVDSS of Si1470DH) = 45V.
EAS = 0.5 • LIN • IAS2
For LIN = 2μH and IAS = 4A, then EAS = 16μJ. This is within
the IAS and EAS capabilities of most MOSFET’s including
the Si1470DH. So in most instances, the LTC4360 can
ride through such transients without a bypass capacitor,
transient voltage suppressor or other external components
at IN.
436012f
9
LTC4360-1/LTC4360-2
APPLICATIONS INFORMATION
Figure 8 shows a particularly severe situation which can
occur in a mobile device with dual power inputs. A 20V wall
adaptor is mistakenly hot-plugged into the 5V device with
the USB input already live. As shown in Figure 9, a large
current can build up in LIN to charge up COUT . When the
N-channel MOSFET shuts off, the energy stored in LIN is
dumped into COUT, causing a large 40V input transient. The
LTC4360 limits this to a 1V rise in the output voltage.
RIN
+
20V
WALL
ADAPTER
LIN
ICABLE
IN
–
D1
B160
+
5V
USB
–
M1
Si1470DH
OUT
GATE
IN
OUT
R1
100k
COUT
LOAD
LTC4360
GND
436012 F07
Figure 8. Setup for Testing 20V Plugged into 5V System
If the voltage rise at VOUT due to the discharge of the
energy in LIN into COUT is not acceptable or the avalanche
capability of the MOSFET is exceeded, an additional external clamp such as the SMAJ24A can be placed between
IN and GND. COUT is the decoupling capacitor of the
protected circuits and its value will largely be determined
by their requirements. Using a larger COUT will work with
LIN to slow down the dV/dt at OUT, allowing time for the
LTC4360 to shut off the MOSFET before VOUT overshoots
to a dangerous voltage. A larger COUT also helps to lower
the ΔVOUT due to the discharge of the energy in LIN if the
MOSFET BVDSS is used as an input clamp.
Layout Considerations
Figure 10 shows example PCB layouts for the single
N-channel MOSFET (SC70 package) configuration and the
P-channel MOSFET/N-channel MOSFET (Complementary
P, N MOSFET in TSOP-6 package) configuration. Keep the
traces to the MOSFETs wide and short. The PCB traces
associated with the power path through the MOSFETs
should have low resistance.
4
SUPPLY/IN
5
VOUT
5V/DIV
6
4
IN
5
VIN
20V/DIV
6
SUPPLY
OUT
Si3590DV
OUT
1μs/DIV
436012 F08
FIGURE 8 CIRCUIT
RIN = 150mΩ, LIN = 2μH
LOAD = 10Ω, COUT = 10μF (16V, SIZE 1210)
Figure 9. Overvoltage Protection Waveforms
When 20V Plugged into 5V System
1
2
3
4
3
1
ICABLE
10A/DIV
2
8
7
6
5
LTC4360-1
GND
3
2
1
Si1470DH
VGATE
10V/DIV
GND
1
2
3
4
8
7
6
5
LTC4360-2
436012 F09
Figure 10. Recommended Layout for N-Channel MOSFET
and P-/N-Channel MOSFET Configurations
436012f
10
LTC4360-1/LTC4360-2
PACKAGE DESCRIPTION
SC8 Package
8-Lead Plastic SC70
(Reference LTC DWG # 05-08-1639 Rev Ø)
0.30
MAX
0.50
REF
PIN 8
1.80 – 2.20
(NOTE 4)
1.00 REF
INDEX AREA
(NOTE 6)
1.80 – 2.40 1.15 – 1.35
(NOTE 4)
2.8 BSC 1.8 REF
PIN 1
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.10 – 0.40
0.50 BSC
0.15 – 0.27
8 PLCS (NOTE 3)
0.80 – 1.00
0.00 – 0.10
REF
1.00 MAX
GAUGE PLANE
0.15 BSC
0.26 – 0.46
0.10 – 0.18
(NOTE 3)
SC8 SC70 0905 REV Ø
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE INDEX AREA
7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70 AND JEDEC MO-203 VARIATION BA
436012f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC4360-1/LTC4360-2
TYPICAL APPLICATION
5V System Protected from ±24V Power Supplies
5V System Protected from ±24V Power
Supplies and Reverse Current
Si3590DV
M2
VIN
5V
M1
COUT
10μF
VIN
5V
VOUT
5V
0.5A
FDC6561AN
M2
Si1471DH
M1
COUT
10μF
VOUT
5V
0.5A
GATE
GATE
VIO
5V
OUT
IN
IN
R1
1k
LTC4360-2
VIO
5V
OUT
R1
1k
LTC4360-2
D1
LN1351CTR
PWRGD
GATEP
M3
GND
GND
436012 TA02
D1
LN1351CTR
PWRGD
GATEP
436012 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC2935
Ultralow Power Supervisor with Eight Pin-Selectable
Thresholds
500nA Quiescent Current, 2mm × 2mm 8-Lead DFN and TSOT-23 Packages
LT3008
20mA, 45V, 3μA IQ Micropower LDO
280mV Dropout Voltage, Low IQ: 3μA, VIN = 2.0V to 45V, VOUT = 0.6V to 39.5V;
ThinSOT™ and 2mm × 2mm DFN-6 Packages
LT3009
20mA, 3μA IQ Micropower LDO
280mV Dropout Voltage, Low IQ: 3μA, VIN = 1.6V to 20V, VOUT = 0.6V to 19.5V;
ThinSOT and SC-70 Packages
LTC3576/
LTC3576-1
Switching USB Power Manager with USB OTG + Triple Complete Multifunction PMIC: Bi-Directional Switching Power Manager + 3
Step-Down DC/DCs
Bucks + LDO
LTC4090/
LTC4090-5
High Voltage USB Power Manager with Ideal Diode
Controller and High Efficiency Li-Ion Battery Charger
High Efficiency 1.2A Charger from 6V to 38V (60V Max) Input Charges Single
Cell Li-Ion Batteries Directly from a USB Port
LTC4098
USB-Compatible Switchmode Power Manager with
OVP
High VIN: 38V operating, 60V transient; 66V OVP. 1.5A Max Charge Current
from Wall, 600mA Charge Current from USB
LTC4210
Single Channel, Low Voltage Hot Swap™ Controller
Operates from 2.7V to 16.5V, Active Current Limiting, SOT23-6
LTC4213
No RSENSE™ Electronic Circuit Breaker
Controls Load Voltages from 0V to 6V. 3 Selectable Circuit Breaker Thresholds.
Dual Level Overcurrent Fault Protection
LT4356
Surge Stopper Overvoltage/Overcurrent Protection
Regulator
Wide Operation Range: 4V to 80V. Reverse Input Protection to –60V.
Adjustable Output Clamp Voltage
LTC4411
SOT-23 Ideal Diode
2.6A Forward Current, 28mV Regulated Forward Voltage
LTC4412
2.5V to 28V, Low Loss PowerPath™ Controller in
ThinSOT
More Efficient than Diode-ORing, Automatic Switching Between DC Sources,
Simplified Load Sharing
LTC4413-1/
LTC4413-2
Dual 2.6A, 2.5V to 5.5V Fast Ideal Diodes in
3mm × 3mm DFN
130mΩ On Resistance, Low Reverse Leakage Current, 18mV Regulated
Forward Voltage (LTC4413-2 with Overvoltage Protection Sensor)
436012f
12 Linear Technology Corporation
LT 0410 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2010
Similar pages