TI1 INA2128UG4 Dual, low power instrumentation amplifier Datasheet

INA2128
INA
212
8
INA
212
8
SBOS035A – DECEMBER 1995 – REVISED APRIL 2007
Dual, Low Power
INSTRUMENTATION AMPLIFIER
DESCRIPTION
FEATURES
●
●
●
●
●
●
●
●
LOW OFFSET VOLTAGE: 50µV max
LOW DRIFT: 0.5µV/°C max
LOW INPUT BIAS CURRENT: 5nA max
HIGH CMR: 120dB min
INPUTS PROTECTED TO ±40V
WIDE SUPPLY RANGE: ±2.25V to ±18V
LOW QUIESCENT CURRENT: 700µA / IA
16-PIN PLASTIC DIP, SOL-16
The INA2128 is a dual, low power, general purpose instrumentation amplifier offering excellent accuracy. Its versatile
3-op amp design and small size make it ideal for a wide range
of applications. Current-feedback input circuitry provides wide
bandwidth even at high gain (200kHz at G = 100).
A single external resistor sets any gain from 1 to 10,000.
Internal input protection can withstand up to ±40V without
damage.
The INA2128 is laser-trimmed for very low offset voltage
(50µV), drift (0.5µV/°C) and high common-mode rejection
(120dB at G ≥ 100). It operates with power supplies as low as
±2.25V, and quiescent current is only 700µA per IA—ideal for
battery-operated and multiple-channel systems.
APPLICATIONS
● SENSOR AMPLIFIER
THERMOCOUPLE, RTD, BRIDGE
● MEDICAL INSTRUMENTATION
● MULTIPLE-CHANNEL SYSTEMS
● BATTERY OPERATED EQUIPMENT
The INA2128 is available in SOL-16 packages, specified
for the –40°C to +85°C temperature range.
V+
9
–
VINA
1
Over-Voltage
Protection
INA2128
7
A1A
40kΩ
3
40kΩ
25kΩ
A3A
RGA
4
2
Over-Voltage
Protection
–
16
Over-Voltage
Protection
VINB
14
5
A2A
40kΩ
40kΩ
40kΩ
40kΩ
13
15
GB = 1 +
25kΩ
A3B
+
RefA
10
A1B
RGB
VINB
VOA
25kΩ
+
VINA
6
GA = 1 + 50kΩ
RGA
11
50kΩ
RGB
VOB
25kΩ
Over-Voltage
Protection
12
A2B
40kΩ
RefB
40kΩ
8
V–
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 1995-2007, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage .................................................................................. ±18V
Analog Input Voltage Range ............................................................. ±40V
Output Short-Circuit (to ground) .............................................. Continuous
Operating Temperature .................................................. –40°C to +125°C
Storage Temperature ..................................................... –55°C to +125°C
Junction Temperature .................................................................... +150°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
PIN CONFIGURATION
Top View
2
SOIC
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION(1)
–
VINA
1
–
16 VINB
+
VINA
2
+
15 VINB
RGA
3
14 RGB
PRODUCT
PACKAGE-LEAD
RGA
4
13 RGB
INA2128UA
INA2128U
SOIC-16
SOIC-16
RefA
5
12 RefB
VOA
6
11 VOB
SenseA
7
10 SenseB
V–
8
9
PACKAGE
TEMPERATURE
DESIGNATOR
RANGE
DW
DW
–40°C to +85°C
–40°C to +85°C
NOTES: (1) For the most current package and ordering information, see the
Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
V+
INA2128
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SBOS035A
ELECTRICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, RL = 10kΩ, unless otherwise noted.
INA2128U
PARAMETER
CONDITIONS
INPUT
Offset Voltage, RTI
Initial
TA = +25°C
vs Temperature
TA = TMIN to TMAX
vs Power Supply
VS = ±2.25V to ±18V
Long-Term Stability
Impedance, Differential
Common-Mode
VO = 0V
Common-Mode Voltage Range(1)
Safe Input Voltage
Common-Mode Rejection
VCM = ±13V, ∆RS = 1kΩ
G=1
G=10
G=100
G=1000
TYP
MAX
±50 ±500/G
±0.5 ± 20/G
±1 ±100/G
(V+) – 2
(V–) + 2
±10 ±100/G
±0.2 ± 2/G
±0.2 ±20/G
±0.1 ±3/G
1010 || 2
1011 || 9
(V+) – 1.4
(V–) + 1.7
80
100
120
120
86
106
125
130
±2
±30
±1
±30
BIAS CURRENT
vs Temperature
Offset Current
vs Temperature
NOISE VOLTAGE, RTI
f = 10Hz
f = 100Hz
f = 1kHz
fB = 0.1Hz to 10Hz
Noise Current
f=10Hz
f=1kHz
fB = 0.1Hz to 10Hz
±40
MIN
✻
✻
73
93
110
110
±5
±5
G=1
G=10
G=100
G=1000
G=1
VO = ±13.6V, G=1
G=10
G=100
G=1000
OUTPUT
Voltage: Positive
Negative
Load Capacitance Stability
Short-Circuit Current
RL = 10kΩ
RL = 10kΩ
(V+) – 1.4
(V–) + 1.4
MAX
±25 ±100/G ±125 ±1000/G
±0.2 ± 5/G
±1 ± 20/G
✻
±2 ±200/G
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
UNITS
µV
µV/°C
µV/V
µV/mo
Ω || pF
Ω || pF
V
V
V
dB
dB
dB
dB
±10
±10
nA
pA/°C
nA
pA/°C
10
8
8
0.2
✻
✻
✻
✻
nV/√Hz
nV/√Hz
nV/√Hz
µVPP
0.9
0.3
30
✻
✻
✻
pA/√Hz
pA/√Hz
pAPP
✻
1 + (50kΩ/RG)
1
TYP
✻
✻
✻
✻
G = 1000, RS = 0Ω
GAIN
Gain Equation
Range of Gain
Gain Error
Gain vs Temperature(2)
50kΩ Resistance(2, 3)
Nonlinearity
INA2128UA
MIN
±0.01
±0.02
±0.05
±0.5
±1
±25
±0.0001
±0.0003
±0.0005
±0.001
10000
±0.024
±0.4
±0.5
±1
±10
±100
±0.001
±0.002
±0.002
(Note 4)
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
(V+) – 0.9
(V–) + 0.8
1000
+6/–15
✻
±0.1
±0.5
±0.7
±2
✻
✻
±0.002
±0.004
±0.004
✻
V/V
V/V
%
%
%
%
ppm/°C
ppm/°C
% of FSR
% of FSR
% of FSR
% of FSR
✻
✻
✻
✻
V
V
pF
mA
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
MHz
kHz
kHz
kHz
V/µs
µs
µs
µs
µs
µs
FREQUENCY RESPONSE
Bandwidth, –3dB
Overload Recovery
G=1
G=10
G=100
G=1000
VO = ±10V, G=10
G=1
G=10
G=100
G=1000
50% Overdrive
POWER SUPPLY
Voltage Range
Current, Total
VIN = 0V
Slew Rate
Settling Time, 0.01%
TEMPERATURE RANGE
Specification
Operating
θJA
1.3
700
200
20
4
7
7
9
80
4
±2.25
±15
±1.4
–40
–40
±18
±1.5
✻
85
125
✻
✻
80
✻
✻
✻
✻
✻
V
mA
✻
✻
°C
°C
°C/W
✻ Specification same as INA2128P, U.
NOTE: (1)
(2)
(3)
(4)
Input common-mode range varies with output voltage—see Electrical Characteristics.
Ensured by wafer test.
Temperature coefficient of the 50kΩ term in the gain equation.
Nonlinearity measurements in G = 1000 are dominated by noise. Typical nonlinearity is ±0.001%.
INA2128
SBOS035A
www.ti.com
3
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, unless otherwise noted.
COMMON-MODE REJECTION vs FREQUENCY
GAIN vs FREQUENCY
140
60
G = 1000V/V
G = 100V/V
G = 1000V/V
Common-Mode Rejection (dB)
50
40
Gain (dB)
G = 100V/V
30
20
G = 10V/V
10
0
G = 1V/V
–10
1k
10k
100k
1M
G = 1V/V
80
60
40
20
10
10M
100
100k
10k
Frequency (Hz)
POSITIVE POWER SUPPLY REJECTION
vs FREQUENCY
NEGATIVE POWER SUPPLY REJECTION
vs FREQUENCY
1M
140
G = 1000V/V
Power Supply Rejection (dB)
120
120
G = 1000V/V
100
G = 100V/V
80
60
G = 10V/V
40
G = 1V/V
G = 100V/V
100
80
60
40
G = 10V/V
20
20
0
0
G = 1V/V
10
15
100
1k
10k
100k
100
100k
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE, VS = ±15V
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE, VS = ±5, ±2.5V
G=1
VD/2
0
VD/2
+
VCM
+15V
–
VO
+
–
Ref
+
–15V
–10
–5
0
5
10
3
2
G=1
G=1
G ≥ 10
1
0
G=1
–1
–2
–3
–5
–5
15
G ≥ 10
G ≥ 10
4
Common-Mode Voltage (V)
G=1
1M
5
G ≥ 10
5
–10
10k
Frequency (Hz)
10
–15
–15
1k
Frequency (Hz)
G ≥ 10
–5
10
1M
VS = ±5V
VS = ±2.5V
–4
–4
–3
–2
–1
0
1
2
3
4
5
Output Voltage (V)
Output Voltage (V)
4
1k
Frequency (Hz)
140
Power Supply Rejection (dB)
G = 10V/V
100
0
–20
Common-Mode Voltage (V)
120
INA2128
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SBOS035A
TYPICAL CHARACTERISTICS
(Continued)
At TA = +25°C, VS = ±15V, unless otherwise noted.
CROSSTALK vs FREQUENCY
120
G = 10V/V
Crosstalk (dB)
100
G = 1V/V
G = 1000V/V
80
G = 100V/V
60
40
20
0
G = 1V/V
100
10
G = 10V/V
10
1
G = 100, 1000V/V
Current Noise
1
10
100
1k
100k
10k
1M
0.1
1
10
1k
10k
Frequency (Hz)
SETTLING TIME vs GAIN
QUIESCENT CURRENT and SLEW RATE
vs TEMPERATURE
Quiescent Current (µA)
0.01%
0.1%
10
1.7
6
1.6
5
1.5
4
Slew Rate
1.4
3
IQ
1.3
2
1.2
1
1
10
100
–75
1000
–50
–25
Gain (V/V)
4
8
Flat region represents
normal linear operation.
Offset Voltage Change (µV)
10
2
G = 1000V/V
1
G = 1V/V
0
–1
+15V
G = 1V/V
1/2
INA2128
–2
–3
VIN
G = 1000V/V
–4
25
50
75
100
IIN
6
4
2
0
–2
–4
–6
–8
–15V
–5
–10
–50 –40 –30
–20 –10
0
10
20
30
40
50
0
Input Voltage (V)
10
20
30
40
50
Time (ms)
INA2128
SBOS035A
1
125
OFFSET VOLTAGE WARM-UP
5
3
0
Temperature (°C)
INPUT OVER-VOLTAGE V/I CHARACTERISTICS
Input Current (mA)
100
Frequency (Hz)
100
Settling Time (µs)
100
Input Bias Current Noise (pA/√ Hz)
G = 100V/V
1k
Slew Rate (V/µs)
G = 1000V/V
INPUT- REFERRED NOISE vs FREQUENCY
Input-Referred Voltage Noise (nV/√ Hz)
140
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5
TYPICAL CHARACTERISTICS
(Continued)
At TA = +25°C, VS = ±15V, unless otherwise noted.
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
INPUT BIAS CURRENT vs TEMPERATURE
(V+)
2
IB
1
Output Voltage (V)
Input Bias Current (nA)
(V+)–0.4
IOS
0
Typical IB and IOS
Range ±2nA at 25°C
–1
(V+)–0.8
(V+)–1.2
(V–)+1.2
(V–)+0.8
(V–)+0.4
–2
V–
–50
–25
0
25
50
75
100
0
125
14
+25°C +85°C
(V+)–0.8
–40°C
RL = 10kΩ
(V–)+1.2
+25°C
–40°C
+85°C
–40°C
+85°C
12
10
8
6
4
+ISC
0
0
5
10
15
20
–75
–25
0
25
50
75
100
Temperature (°C)
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
125
1
G = 10, 100
25
–50
Power Supply Voltage (V)
30
VO = 1Vrms
500kHz Measurement
Bandwidth
G=1
G=1
RL = 10kΩ
G = 1000
20
THD+N (%)
Peak-to-Peak Output Voltage (Vpp)
–ISC
2
V–
15
10
0.1
G = 100, RL = 100kΩ
0.01
G = 1, RL = 100kΩ
5
Dashed Portion
is noise limited.
0
1k
10k
100k
1M
Frequency (Hz)
6
4
SHORT-CIRCUIT OUTPUT CURRENT
vs TEMPERATURE
(V+)–0.4
(V–)+0.4
3
OUTPUT VOLTAGE SWING
vs POWER SUPPLY VOLTAGE
16
(V–)+0.8
2
Temperature (°C)
V+
(V+)–1.2
1
Output Current (mA)
Short Circuit Current (mA)
Output Voltage Swing (V)
–75
0.001
100
1k
10k
G = 10V/V
RL = 100kΩ
100k
Frequency (Hz)
INA2128
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SBOS035A
TYPICAL CHARACTERISTICS
(Continued)
At TA = +25°C, VS = ±15V, unless otherwise noted.
SMALL-SIGNAL STEP RESPONSE
(G = 1, 10)
SMALL-SIGNAL STEP RESPONSE
(G = 100, 1000)
G=1
G = 100
20mV/div
20mV/div
G = 10
G = 1000
5µs/div
20µs/div
LARGE-SIGNAL STEP RESPONSE
(G = 1, 10)
LARGE-SIGNAL STEP RESPONSE
(G = 100, 1000)
G=1
G = 100
5V/div
5V/div
G = 10
G = 1000
5µs/div
5µs/div
VOLTAGE NOISE 0.1Hz to 10Hz
INPUT-REFERRED, G ≥ 100
0.1µV/div
1s/div
INA2128
SBOS035A
www.ti.com
7
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the INA2128. Applications with noisy or high impedance
power supplies may require decoupling capacitors close to
the device pins as shown.
The output is referred to the output reference (Ref) terminals
(RefA and RefB) which are normally grounded. These must
be low-impedance connections to assure good commonmode rejection. A resistance of 8Ω in series with a Ref pin
will cause a typical device to degrade to approximately
80dB CMR (G = 1).
The INA2128 has separate output sense feedback connections, SenseA and SenseB. These must be connected to their
respective output terminals for proper operation. The output
sense connection can be used to sense the output voltage
directly at the load for best accuracy.
SETTING THE GAIN
Gain of the INA2128 is set by connecting a single external
resistor, RG, connected as shown:
G = 1+
50kΩ
RG
(1)
Commonly-used gains and resistor values are shown in
Figure 1.
The 50kΩ term in Equation 1 comes from the sum of the two
internal feedback resistors, A1 and A2. These on-chip metal
film resistors are laser-trimmed to accurate absolute values.
The accuracy and temperature coefficient of these resistors
are included in the gain accuracy and drift specifications of
the INA2128.
The stability and temperature drift of the external gain
setting resistor, RG, also affects gain. RG’s contribution to
gain accuracy and drift can be directly inferred from the gain
equation (1). Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring
resistance which will contribute additional gain error in
gains of approximately 100 or greater.
DYNAMIC PERFORMANCE
The typical performance curve “Gain vs Frequency” shows
that despite its low quiescent current, the INA2128 achieves
wide bandwidth, even at high gain. This is due to its currentfeedback topology. Settling time also remains excellent at
high gain—see “Settling Time vs Gain.”
NOISE PERFORMANCE
The INA2128 provides very low noise in most applications.
Low frequency noise is approximately 0.2µVPP measured
from 0.1 to 10Hz (G ≥ 100). This provides dramatically
improved noise when compared to state-of-the-art chopperstabilized amplifiers.
V+
0.1µF
Pin numbers for
Channel B shown
in parentheses.
–
VIN
1
(16)
9
INA2128
Over-Voltage
Protection
40kΩ
3
1
2
5
10
20
50
100
200
500
1000
2000
5000
10000
RG
(Ω)
NC
50.00k
12.50k
5.556k
2.632k
1.02k
505.1
251.3
100.2
50.05
25.01
10.00
5.001
NC
49.9k
12.4k
5.62k
2.61k
1.02k
511
249
100
49.9
24.9
10
4.99
G=1+
+
4
25kΩ
Load VO
(13)
+
VIN
2
(15)
50kΩ
RG
6
(11)
A3
RG
NEAREST 1% RG
(Ω)
40kΩ
25kΩ
(14)
DESIRED
GAIN
7 Sense
+
–
(10)
)
VO = G • (VIN – VIN
A1
–
Ref
A2
Over-Voltage
Protection
40kΩ
8
40kΩ
5
(12)
0.1µF
V–
Also drawn in simplified form:
–
VIN
NC: No Connection.
RG
+
VIN
INA2128
Ref
VO
NOTE: If channel is unused,
connect inputs to ground, sense
to VO, and leave Ref open-circuit.
FIGURE 1. Basic Connections.
8
INA2128
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SBOS035A
OFFSET TRIMMING
The INA2128 is laser-trimmed for low offset voltage and
offset voltage drift. Most applications require no external
offset adjustment. Figure 2 shows an optional circuit for
trimming the output offset voltage. The voltage applied to
Ref terminal is summed with the output. The op amp buffer
provides low impedance at the Ref terminal to preserve good
common-mode rejection.
Microphone,
Hydrophone
etc.
1/2
INA2128
47kΩ
47kΩ
1/2
INA2128
Thermocouple
–
VIN
RG
V+
1/2
INA2128
10kΩ
VO
100µA
1/2 REF200
Ref
+
VIN
OPA177
10kΩ
100Ω
(For other
channel)
1/2
INA2128
±10mV
Adjustment Range
100Ω
Center-tap provides
bias current return.
100µA
1/2 REF200
FIGURE 3. Providing an Input Common-Mode Current Path.
V–
FIGURE 2. Optional Trimming of Output Offset Voltage.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA2128 is extremely high—
approximately 1010Ω. However, a path must be provided for
the input bias current of both inputs. This input bias current
is approximately ±2nA. High input impedance means that
this input bias current changes very little with varying input
voltage.
Input circuitry must provide a path for this input bias current
for proper operation. Figure 3 shows various provisions for
an input bias current path. Without a bias current path, the
inputs will float to a potential which exceeds the commonmode range of the INA2128 and the input amplifiers will
saturate.
If the differential source resistance is low, the bias current
return path can be connected to one input (see the thermocouple example in Figure 3). With higher source impedance,
using two equal resistors provides a balanced input with
possible advantages of lower input offset voltage due to bias
current and better high-frequency common-mode rejection.
INPUT COMMON-MODE RANGE
The linear input voltage range of the input circuitry of the
INA2128 is from approximately 1.4V below the positive
supply voltage to 1.7V above the negative supply. As a
differential input voltage causes the output voltage increase,
however, the linear input range will be limited by the output
voltage swing of amplifiers A1 and A2. So the linear common-mode input range is related to the output voltage of the
complete amplifier. This behavior also depends on supply
voltage—see performance curves “Input Common-Mode
Range vs Output Voltage.”
Input-overload can produce an output voltage that appears
normal. For example, if an input overload condition drives
both input amplifiers to their positive output swing limit, the
difference voltage measured by the output amplifier will be
near zero. The output of the INA2128 will be near 0V even
though both inputs are overloaded.
LOW VOLTAGE OPERATION
The INA2128 can be operated on power supplies as low as
±2.25V. Performance remains excellent with power supplies ranging from ±2.25V to ±18V. Most parameters vary
only slightly throughout this supply voltage range—see
typical performance curves. Operation at very low supply
voltage requires careful attention to assure that the input
voltages remain within their linear range. Voltage swing
requirements of internal nodes limit the input commonmode range with low power supply voltage. Typical performance curves, “Input Common-Mode Range vs Output
Voltage,” show the range of linear operation for ±15V, ±5V,
and ±2.5V supplies.
INA2128
SBOS035A
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9
INPUT PROTECTION
The inputs of the INA2128 are individually protected for
voltages up to ±40V. For example, a condition of –40V on
one input and +40V on the other input will not cause
damage. Internal circuitry on each input provides low series
impedance under normal signal conditions. To provide
equivalent protection, series input resistors would contribute
excessive noise. If the input is overloaded, the protection
circuitry limits the input current to a safe value of approximately 1.5mA to 5mA. The typical performance curve
“Input Bias Current vs Common-Mode Input Voltage” shows
this input current limit behavior. The inputs are protected
even if the power supplies are disconnected or turned off.
VEX
CHANNEL CROSSTALK
The two channels of the INA2128 are completely independent, including all bias circuitry. At DC and low frequency
there is virtually no signal coupling between channels.
Crosstalk increases with frequency and is dependent on
circuit gain, source impedance and signal characteristics.
As source impedance increases, careful circuit layout will
help achieve lowest channel crosstalk. Most crossstalk is
produced by capacitive coupling of signals from one channel
to the input section of the other channel. To minimize
coupling, separate the input traces as far as practical from
any signals associated with the opposite channel. A grounded
guard trace surrounding the inputs helps reduce stray coupling between channels. Run the differential inputs of each
channel parallel to each other or directly adjacent on top and
bottom side of a circuit board. Stray coupling then tends to
produce a common-mode signal which is rejected by the
IA’s input.
X-axis
X-axis
VO
1/2
INA2128
V1
VO = GA (V2 – V1) + GB (V4 – V3)
1/2
INA2128
RGA
VEX
Ref
V2
V3
Y-axis
Y-axis
VO
1/2
INA2128
1/2
INA2128
RGB
Ref
V4
FIGURE 5. Sum of Differences Amplifier.
FIGURE 4. Two-Axis Bridge Amplifier.
RG = 5.6kΩ
2.8kΩ
LA
RA
RG/2
1/2
INA2128
VO
Ref
2.8kΩ
390kΩ
1/2
OPA2604
RL
VG
1/2
OPA2604
10kΩ
390kΩ
G = 10
VG
NOTE: Due to the INA2128’s current-feedback
topology, VG is approximately 0.7V less than
the common-mode input voltage. This DC offset
in this guard potential is satisfactory for many
guarding applications.
FIGURE 6. ECG Amplifier With Right-Leg Drive.
10
INA2128
www.ti.com
SBOS035A
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA2128U
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
-40 to 85
INA2128U/1K
ACTIVE
SOIC
DW
16
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
INA2128U
INA2128U/1KE4
ACTIVE
SOIC
DW
16
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
INA2128U
INA2128UA
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
INA2128U
A
INA2128UA/1K
ACTIVE
SOIC
DW
16
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
INA2128U
A
INA2128UA/1KG4
ACTIVE
SOIC
DW
16
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
INA2128U
A
INA2128UAG4
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
INA2128U
A
INA2128UG4
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU-DCC
Level-3-260C-168 HR
-40 to 85
INA2128U
A
INA2128U
A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
11-Apr-2015
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
INA2128U/1K
SOIC
DW
16
1000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
INA2128UA/1K
SOIC
DW
16
1000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA2128U/1K
SOIC
DW
16
1000
367.0
367.0
38.0
INA2128UA/1K
SOIC
DW
16
1000
367.0
367.0
38.0
Pack Materials-Page 2
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