C8051F912 Ultra-Low Power, High-Performance MCU High-Speed 8051 µC Core - Pipe-lined instruction architecture; executes 70% of instructions Ultra-Low Power - 160 µA/MHz active current from 1.8–3.6 V @ 25 MHz - 10 nA sleep current with data retention; BOD disabled - 50 nA sleep current with data retention; BOD enabled - 300 nA sleep current with smaRTClock (internal oscillator) - 600 nA sleep current with smaRTClock (external crystal) - 2 µs wake up from sleep - 1.5 µs analog settling time in 1 or 2 system clocks - 25 MIPS peak throughput with 25 MHz clock - Expanded interrupt handler Memory - 768 bytes internal data RAM (256 + 512) - 16 kB Flash; In-system programmable; Full read/write/erase Supply Voltage: 0.9 to 3.6 V - One-cell mode supports 0.9–3.6 V operation; bypass feature automatically shuts off the dc-dc converter when not needed - Two-cell mode supports 1.8–3.6 V operation - Built-in dc-dc converter with 1.8 –3.3 V output (65 mW max) for use in one-cell mode; can supply external devices 12-Bit Analog to Digital Converter - Up to 75 ksps 12-bit mode or 300 ksps 10-bit mode - Up to 15 external inputs - External pin or internal VREF (no external capacitor required) - On-chip PGA allows measuring voltages up to twice the - reference voltage Autonomous Burst Mode with 16-bit automatic averaging accumulator Built-in temperature sensor Two Comparators - Programmable hysteresis and response time - Configurable as interrupt or reset source - Low current (400 nA typical) - Up to 15 Capacitive Touch Sense inputs C2CK/RST Debug / Programming Hardware Power Net Analog Power GND/DC- DCEN VBAT GND XTAL1 XTAL2 XTAL3 XTAL4 Can switch between clock sources on-the-fly; useful in power saving modes Port I/O Configuration Digital Peripherals 16k Byte ISP Flash Program Memory UART 256 Byte SRAM Timers 0, 1, 2, 3 Digital Power Port 0 Drivers Priority Crossbar Decoder PCA/ WDT CRC Engine SMBus SPI 0,1 SYSCLK Precision 24.5 MHz Oscillator DC/DC Converter smaRTClock oscillator: 32.768 kHz crystal or 16.4 kHz LFO Package Options - 24-pin QFN (4x4 mm), RoHS compliant - 24-pin QSOP (easy to hand solder), RoHS compliant 512 Byte XRAM VREG External oscillator: Crystal, RC, C, CMOS clock Temperature Range: –40 to +85 °C C2D VDD/DC+ ports UART operation; spread-spectrum mode for reduced EMI Low power internal oscillator: 20 MHz - system debug (no emulator required) CIP-51 8051 Controller Core Reset pare modules and watchdog timer Clock Sources - Precision internal oscillators: 24.5 MHz with ±2% accuracy sup- - Provides 4 breakpoints, single stepping Development Kit: C8051F912DK Wake available concurrently - Low power 32-bit smaRTClock operates down to 0.9 V - Four general purpose 16-bit counter/timers - 16-bit programmable counter array (PCA) with six capture/com- On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in- Internal 6-Bit Current Reference - Up to ±500 µA; source and sink capability - Enhanced resolution via PWM interpolation Power On Reset/PMU functionality over the entire supply range Digital Peripherals - 16 port I/O; All 5 V tolerant with programmable drive strength - Hardware enhanced UART, 2 SPI and SMBus™ serial ports Low Power 20 MHz Oscillator External Oscillator Circuit smaRTClock Oscillator Crossbar Control SFR Bus Low-Voltage/Low-Power P1.0/SCK1 P1.1/MISO1 P1.2/MOSI1 P1.3/NSS1 P1.4 P1.5 P1.6 Analog Peripherals 6-bit IREF IREF0 Internal External VREF VREF Port 2 Drivers A M U X 12-bit ADC VDD VREF Temp Sensor P2.7/C2D GND CP0, CP0A System Clock Configuration Port 1 Drivers P0.0/VREF P0.1/AGND P0.2/XTAL1/RTCOUT P0.3/XTAL2/WAKEOUT P0.4/TX P0.5/RX P0.6/CNVSTR P0.7/IREF0 CP1, CP1A + - + - Comparators Copyright © 2009 by Silicon Laboratories 10.1.2009 C8051F912 Ultra-Low Power, High-Performance MCU Selected Electrical Specifications (At 25 C°) Parameter Supply Input Voltage two-cell mode one-cell mode Supply Current with CPU Active Supply Current (shutdown) (VBAT = 1.8 V) Conditions Min Typ Max Units DC-DC converter disabled DC-DC converter enabled VDD = 1.8–3.6 V Clock = 24.5 MHz (±2% internal precision oscillator) Sleep mode; BOD off Sleep mode; BOD on Sleep mode; smaRTClock running 1.8 0.9 — — 3.6 3.6 V V — 160 — µA/MHz — — — DC — — — .010 .050 .300 — 2 10 1.5 — — — 25 — — — µA µA µA MHz µs µs µs 24 18 24.5 20 25 22 MHz MHz — — 12/10 75/300 bits ksps Clock Frequency Range two-cell mode one-cell mode Wakeup Time Analog Settling Time Internal Oscillator Precision oscillator Low power oscillator A/D Converter Frequency Resolution Throughput Rate Package Information: 24-Pin QFN A A1 b D D2 e E E2 L L1 aaa bbb ccc ddd MM Min Typ Max 0.70 0.75 0.80 0.00 0.02 0.05 0.18 0.25 0.30 4.00 BSC 2.50 2.60 2.70 0.50 BSC 4.00 BSC 2.50 2.60 2.70 0.35 0.40 0.45 — — 0.15 — — 0.10 — — 0.10 — — 0.05 — — 0.10 Product Family Part Number Package C8051F912-GM C8051F912-GU C8051F911-GM C8051F911-GU C8051F902-GM C8051F902-GU C8051F901-GM C8051F901-GU 24p QFN 24p QSOP 24p QFN 24p QSOP 24p QFN 24p QSOP 24p QFN 24p QSOP Low-Voltage/Low-Power BOD Package Flash RAM RTC sleep (nA) Disableable Size (mm) ADC (kB) (bytes) 4x4 9x6 4x4 9x6 4x4 9x6 4x4 9x6 12-bit 12-bit 10-bit 10-bit 12-bit 12-bit 10-bit 10-bit 16 16 16 16 8 8 8 8 768 768 768 768 768 768 768 768 300 300 600 600 300 300 600 600 Copyright © 2009 by Silicon Laboratories Yes Yes No No Yes Yes No No 10.1.2009 Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. 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