Richtek JMK212BJ106ML 3a, 2mhz, synchronous step-down converter Datasheet

RT8015A
3A, 2MHz, Synchronous Step-Down Converter
General Description
Features
The RT8015A is a high efficiency synchronous, step-down
DC/DC converter. Its input voltage range is from 2.6V to
5.5V and provides an adjustable regulated output voltage
from 0.8V to 5V while delivering up to 3A of output current.
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The internal synchronous low on-resistance power
switches increase efficiency and eliminate the need for
an external Schottky diode. The switching frequency is
set by an external resistor or can be synchronized to an
external clock. The 100% duty cycle provides low dropout
operation extending battery life in portable systems.
Current mode operation with external compensation
allows the transient response to be optimized over a wide
range of loads and output capacitors.
The RT8015A is operated in forced continuous PWM Mode
which minimizes ripple voltage and reduces the noise and
RF interference.
The 100% duty cycle in Low Dropout Operation further
maximize battery life.
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High Efficiency : Up to 95%
Low RDS(ON) Internal Switches : 110mΩ
Ω
Programmable Frequency : 300kHz to 2MHz
No Schottky Diode Required
0.8V Reference Allows for Low Output Voltage
Forced Continuous Mode Operation
Low Dropout Operation : 100% Duty Cycle
RoHS Compliant and 100% Lead (Pb)-Free
Applications
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Portable Instruments
Battery-Powered Equipment
Notebook Computers
Distributed Power Systems
IP Phones
Digital Cameras
Pin Configurations
(TOP VIEW)
The RT8015A is available in the WDFN-10L 3x3 package.
1
2
3
4
5
10
9
8
7
11
9
Ordering Information
SHDN/RT
GND
LX
LX
PGND
COMP
FB
VDD
PVDD
PVDD
RT8015A
Package Type
QW : WDFN-10L 3x3
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
`
RoHS compliant and compatible with the current require-
`
Suitable for use in SnPb or Pb-free soldering processes.
WDFN-10L 3x3
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
ments of IPC/JEDEC J-STD-020.
DS8015A-04 March 2011
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1
RT8015A
Typical Application Circuit
VIN
5V
ROSC
332k
RCOMP
30k
RT8015A
1 SHDN/RT
2
3, 4
5
COMP
GND
FB
LX
PGND
VDD
PVDD
10
CCOMP
1000pF
R2 240k
9
8
6, 7
C1
CIN
22pF
22µF
R1
510k
L1
2µH
COUT
22µFx2
VOUT
2.5V/3A
Note : Using all Ceramic Capacitors
Functional Pin Description
Pin No.
Pin Name
1
SHDN/RT
2
GND
Signal Ground. All small-signal components and compensation components should
connect to this ground, which in turn connects to PGND at one point.
LX
Internal Power MOSFET Switches Output. Connect this pin to the inductor.
5
PGND
Power Ground. Connect this pin close to the negative terminal of CIN and COUT.
6, 7
PVDD
Power Input Supply. Decouple this pin to PGND with a capacitor.
8
VDD
Signal Input Supply. Decouple this pin to GND with a capacitor. Normally V DD is
equal to PVDD.
9
FB
3, 4
Pin Function
Oscillator Resistor Input. Connecting a resistor to ground from this pin sets the
switching frequency. Forcing this pin to V DD causes the device to be shut down.
Feedback Pin. This pin Receives the feedback voltage from a resistive divider
connected across the output.
Error Amplifier Compensation Point. The current comparator threshold increases
10
COMP
11 (Exposed Pad) NC
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2
with this control voltage. Connect external compensation elements to this pin to
stabilize the control loop.
No Internal Connection. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
DS8015A-04 March 2011
RT8015A
Function Block Diagram
SHDN/RT
SD
PVDD
ISEN
Slope
Com
OSC
COMP
0.8V
Output
Clamp
EA
FB
OC
Limit
Driver
Int-SS
LX
0.9V
Control
Logic
0.7V
NISEN
POR
PGND
NMOS I Limit
0.4V
VREF
OTP
GND
VDD
Layout Guide
CIN must be placed between VDD
and GND as closer as possible
VIN
CIN
Output capacitor must be
near RT8015A
GND
VOUT
COUT
LX should be
connected to Inductor
by wide and short
trace, keep sensitive
L1 components away
from this trace
RT8015A
PVDD
PVDD
VDD
FB
COMP
CF
R1
R2
6
5
7
4
8
3
9
2
10
1
PGND
LX
LX
GND
SHDN/RT
ROSC
RCOMP
CCOMP
VOUT
GND
Connect the FB pin directly to feedback resistors. The
resistor divider must be connected between VOUT and GND.
DS8015A-04 March 2011
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3
RT8015A
Operation
Main Control Loop
The RT8015A is a monolithic, constant-frequency, current
mode step-down DC/DC converter. During normal
operation, the internal top power switch (P-Channel
MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak
inductor current reach the value defined by the voltage on
the COMP pin. The error amplifier adjusts the voltage on
the COMP pin by comparing the feedback signal from a
resistor divider on the FB pin with an internal 0.8V
reference. When the load current increases, it causes a
reduction in the feedback voltage relative to the reference.
The error amplifier raises the COMP voltage until the
average inductor current matches the new load current.
When the top power MOSFET shuts off, the synchronous
power switch (N-MOSFET) turns on until either the bottom
current limit is reached or the beginning of the next clock
cycle.
The operating frequency is set by an external resistor
connected between the RT pin and ground. The practical
switching frequency can range from 300kHz to 2MHz. In
an over-voltage condition, the top power MOSFET is turned
off and the bottom power MOSFET is switched on until
either the over voltage condition clears or the bottom
MOSFET's current limit is reached.
RT8015A is used at 100% duty cycle with low input
voltages to ensure that thermal limits are not exceeded.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant
frequency architectures by preventing sub-harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the maximum
inductor peak current is reduced when slope compensation
is added. In the RT8015A, however, separated inductor
current signals are used to monitor over current condition.
This keeps the maximum output current relatively constant
regardless of duty cycle.
Short Circuit Protection
When the output is shorted to ground, the inductor current
decays very slowly during a single switching cycle. A
current runaway detector is used to monitor inductor
current. As current increasing beyond the control of current
loop, switching cycles will be skipped to prevent current
runaway from occurring.
Dropout Operation
When the input supply voltage decreases toward the output
voltage, the duty cycle increases toward the maximum
on-time. Further reduction of the supply voltage forces
the main switch to remain on for more than one cycle
eventually reaching 100% duty cycle.
The output voltage will then be determined by the input
voltage minus the voltage drop across the internal
P-Channel MOSFET and the inductor.
Low Supply Operation
The RT8015A is designed to operate down to an input
supply voltage of 2.6V. One important consideration at
low input supply voltages is that the R DS(ON) of the
P-Channel and N-Channel power switches increases. The
user should calculate the power dissipation when the
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DS8015A-04 March 2011
RT8015A
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage, VDD, PVDD ---------------------------------------------------------------------------- −0.3V to 6V
LX Pin Switch Voltage -------------------------------------------------------------------------------------------- −0.3V to (PVDD + 0.3V)
<200ns --------------------------------------------------------------------------------------------------------------- −5V to 7.5V
z Other I/O Pin Voltages ------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V)
z LX Pin Switch Current -------------------------------------------------------------------------------------------- 4A
z Power Dissipation, PD @ TA = 25°C
WDFN-10L 3x3 ----------------------------------------------------------------------------------------------------- 909mW
z Package Thermal Resistance (Note 2)
WDFN-10L 3x3, θJA ----------------------------------------------------------------------------------------------- 110°C/W
z Junction Temperature --------------------------------------------------------------------------------------------- 150°C
z Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260°C
z Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 150°C
z ESD Susceptibility (Note 3)
HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
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Supply Input Voltage ---------------------------------------------------------------------------------------------- 2.6V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------------ −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VDD = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Voltage Range
VDD
2.6
--
5.5
V
Feedback Reference Voltage
VREF
0.784
0.8
0.816
V
Feedback Leakage Current
IFB
--
0.1
0.4
μA
Active , VFB = 0.78V, Not Switching
--
460
--
μA
Shutdown
--
--
1
μA
Output Voltage Line Regulation
VIN = 2.7V to 5.5V
--
0.04
--
%/V
Output Voltage Load Regulation
Measured in Servo Loop,
VCOMP = 0.2V to 0.7V (Note 5)
−0.2
±0.02
0.2
%
DC Bias Current
Error Amplifier
Transconductance
gm
--
800
--
μs
Current Sense Transresistance
RT
--
0.4
--
Ω
--
--
1
μA
ROSC = 332k
0.8
1
1.2
MHz
Switching Frequency
0.3
--
2
MHz
Switching Leakage Current
SHDN/RT = VIN = 5.5V
Switching Frequency
Switch On Resistance, High
RPMOS
ISW = 0.5A
--
110
160
mΩ
Switch On Resistance, Low
RNMOS
ISW = 0.5A
--
110
170
mΩ
To be continued
DS8015A-04 March 2011
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5
RT8015A
Parameter
Peak Current Limit
Under Voltage Lockout
Threshold
Symbol
Test Conditions
Min
Typ
Max
Unit
3.2
3.8
--
A
VDD Rising
--
2.4
--
V
VDD Falling
--
2.3
--
V
ILIM
Shutdown Threshold
--
VIN − 0.7 VIN − 0.4
V
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a effective single layer thermal conductivity test board of
JEDEC thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. The specifications over the -40°C to 85°C operation ambient temperature range are assured by design, characterization
and correlation with statistical process controls.
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DS8015A-04 March 2011
RT8015A
Typical Operating Characteristics
Efficiency vs. Load Current
Output Voltage vs. Load Current
100
2.492
90
2.488
2.484
Output Voltage (V)
Efficiency (%)
80
VIN = 5.5V
70
60
VIN = 5V
50
VIN = 4.5V
40
30
2.480
2.476
2.472
2.468
2.464
2.460
VOUT = 2.5V
VIN = 5V
20
2.456
0.01
0.1
1
10
0.0
0.5
1.0
2.0
2.5
Frequency vs. Temperature
Peak Current Limit vs. Input Voltage
1.08
5.0
4.5
Current Limit (A)
1.06
1.04
1.02
1.00
4.0
3.5
3.0
2.5
VOUT = 2.5V
VIN = 5V, VOUT = 2.5V, IOUT = 0A
2.0
0.98
-50
-25
0
25
50
75
100
125
3.5
3.75
4
4.25
Temperature (°C)
4.5
4.75
5
5.25
5.5
Input Voltage (V)
Quiescent Current vs. Input Voltage
Quiescent Current vs. Temperature
450
450
Quiescent Current (uA)
440
Quiescent Current (uA)
3.0
Load Current (A)
Load Current (A)
Frequency (MHz)
1.5
430
420
410
400
390
380
370
440
430
420
410
400
390
VIN = 5V
380
360
2.5
3
3.5
4
4.5
Input Voltage (V)
DS8015A-04 March 2011
5
5.5
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8015A
VREF vs. Input Voltage
0.84
3.32
0.83
3.30
0.82
V REF (V)
Output Voltage (V)
Output Voltage vs. Temperature
3.34
3.28
0.81
3.26
0.80
3.24
0.79
VIN = 5V
0.78
3.22
-50
-25
0
25
50
75
100
2.5
125
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Temperature (°C)
Output Ripple
Load Transient Response
VIN = 5V, VOUT = 2.5V
IOUT = 0A to 3A
VLX
(5V/Div)
VOUT_ac
(100mV/Div)
VOUT_ac
(10mV/Div)
ILX
(2A/Div)
I LOAD
(1A/Div)
Time (100us/Div)
Time (400ns/Div)
Start-up with No Load
Start-up with Heavy Load
VIN = 5V, VOUT = 2.5V
IOUT = 0A
VIN = 5V, VOUT = 2.5V
IOUT = 3A
VIN
(2V/Div)
VLX
(2V/Div)
VIN
(2V/Div)
VLX
(2V/Div)
VOUT
(2V/Div)
I IN
(1A/Div)
VOUT
(2V/Div)
I IN
(2A/Div)
Time (1ms/Div)
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VIN = 5V, VOUT = 2.5V
IOUT = 3A
Time (1ms/Div)
DS8015A-04 March 2011
RT8015A
Application Information
The basic RT8015A application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
Output Voltage Programming
The output voltage is set by an external resistive divider
according to the following equation :
VOUT = VREF × ⎛⎜1 + R1 ⎞⎟
⎝ R2 ⎠
where VREF equals to 0.8V typical.
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
V OUT
R1
FB
RT8015A
R2
GND
Operating Frequency
Selection of the operating frequency is a tradeoff between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequency improves efficiency by
reducing internal gate charge and switching losses but
requires larger inductance and/or capacitance to maintain
low output ripple voltage.
The operating frequency of the RT8015A is determined
by an external resistor that is connected between the RT
pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing capacitor within the oscillator. The RT resistor value
can be determined by examining the frequency vs. RT
curve. Although frequencies as high as 2MHz are possible,
the minimum on-time of the RT8015A imposes a minimum
limit on the operating duty cycle. The minimum on-time
is typically 110ns. Therefore, the minimum duty cycle is
equal to 100 x 110ns x f(Hz).
2.5
Figure 1. Setting the Output Voltage
RT = 152k for 2MHz
The RT8015A contains an internal soft-start clamp that
gradually raises the clamp on the COMP pin. The full
current range becomes available on COMP after 1024
switching cycles as shown in Figure 2.
Frequency (MHz)
2
Soft-Start
1.5
RT = 330k for 1MHz
1
0.5
VIN = 5V
VOUT = 2.5V
IOUT = 2A
0
0
200
400
VIN
(2V/Div)
600
800
1000
ROSC
ٛ)
(kΩ)
OSC (k
Figure 3
VOUT
(1V/Div)
Inductor Selection
IL
(1A/Div)
Time (400us/Div)
Figure 2. Soft-Start
DS8015A-04 March 2011
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
⎡V
⎤⎡ V
⎤
ΔIL = ⎢ OUT ⎥ ⎢1 − OUT ⎥
VIN ⎦
⎣ f × L ⎦⎣
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RT8015A
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor. A
reasonable starting point for selecting the ripple current
is ΔI = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
CIN and COUT Selection
⎡ VOUT ⎤ ⎡
VOUT ⎤
L=⎢
⎥
⎥ ⎢1 − V
f
I
×
Δ
L(MAX) ⎦ ⎣
IN(MAX) ⎦
⎣
This formula has a maximum at VIN = 2VOUT, where
I RMS = I OUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Choose a capacitor
rated at a higher temperature than required.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design
current is exceeded.
This result in an abrupt increase in inductor ripple current
and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don't radiate energy but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs. size requirements and
any radiated field/EMI requirements.
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The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
V
IRMS = IOUT(MAX) OUT
VIN
VIN
−1
VOUT
Several capacitors may also be paralleled to meet size or
height requirements in the design.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
⎡
1 ⎤
ΔVOUT ≤ ΔIL ⎢ESR +
⎥
8fC
OUT ⎦
⎣
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
DS8015A-04 March 2011
RT8015A
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD(ESR), where ESR is the effective series
resistance of C OUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
The COMP pin external components and output capacitor
shown in Typical Application Circuit will provide adequate
compensation for most applications.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc.
are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: VDD quiescent current and I2R losses.
The VDD quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
DS8015A-04 March 2011
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1. The VDD quiescent current is due to two components :
the DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge ΔQ moves
from VDD to ground. The resulting ΔQ/Δt is the current out
of VDD that is typically larger than the DC bias current. In
continuous mode, IGATECHG = f(QT+QB) where QT and QB
are the gate charges of the internal top and bottom
switches.
Both the DC bias and gate charge losses are proportional
to VDD and thus their effects will be more pronounced at
higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET RDS(ON) and the duty cycle (D) as follows :
RSW = RDS(ON)TOP x D + RDS(ON)BOT x (1"D) The RDS(ON)
for both the top and bottom MOSFETs can be obtained
from the Typical Performance Characteristics curves. Thus,
to obtain I2R losses, simply add RSW to RL and multiply
the result by the square of the average output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Thermal Considerations
In most applications, the RT8015A does not dissipate
much heat due to its high efficiency. But, in applications
where the RT8015A is running at high ambient temperature
with low supply voltage and high duty cycles, such as in
dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction temperature
reaches approximately 150°C, both power switches will
be turned off and the SW node will become high
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11
RT8015A
impedance. To avoid the RT8015A from exceeding the
maximum junction temperature, the user will need to do
some thermal analysis. The goal of the thermal analysis
is to determine whether the power dissipated exceeds
the maximum junction temperature of the part. The
temperature rise is given by : TR = PD x θJA Where PD is
the power dissipated by the regulator and θJA is the thermal
resistance from the junction of the die to the ambient
temperature. The junction temperature, TJ, is given by :
TJ = TA + TR Where TA is the ambient temperature.
`
Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of powercomponents.
You can connect the copper areas to any DC net (PVDD,
VDD, VOUT, PGND, GND, or any other DC rail in your
system).
`
Connect the FB pin directly to the feedback resistors.
The resistor divider must be connected between VOUT
and GND.
As an example, consider the RT8015A in dropout at an
input voltage of 3.3V, a load current of 2A and an ambient
temperature of 70°C. From the typical performance graph
of switch resistance, the RDS(ON) of the P-Channel switch
at 70°C is approximately 121mΩ. Therefore, power
dissipated by the part is :
PD = (ILOAD)2 (RDS(ON)) = (2A)2 (121mΩ) = 0.484W
For the DFN3x3 package, the θJA is 110°C/W. Thus the
junction temperature of the regulator is : TJ = 70°C +
(0.484W) (110°C/W) = 123.24°C Which is below the
maximum junction temperature of 125°C. Note that at
higher supply voltages, the junction temperature is lower
due to reduced switch resistance (RDS(ON)).
Figure 4
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8015A.
`
A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the GND pin at one point that is then connected to
the PGND pin close to the IC. The exposed pad should
be connected to GND.
`
Connect the terminal of the input capacitor(s), CIN, as
close as possible to the PVDD pin. This capacitor
provides the AC current into the internal power
MOSFETs.
`
LX node is with high frequency voltage swing and should
be kept within small area. Keep all sensitive small-signal
nodes away from the LX node to prevent stray capacitive
noise pick-up.
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12
Figure 5
DS8015A-04 March 2011
RT8015A
Recommended component selection for Typical Application
Table 1. Inductors
Component Supplier Series
Inductance (μH) DCR (mΩ) Current Rating (mA) Dimensions (mm)
TAIYO YUDEN
NR 8040
2
9
7800
8x8x4
Table 2. Capacitors for CIN and COUT
Component Supplier
TDK
TDK
Panasonic
Panasonic
TAIYO YUDEN
TAIYO YUDEN
TAIYO YUDEN
DS8015A-04 March 2011
Part No.
C3225X5R0J226M
C2012X5R0J106M
ECJ4YB0J226M
ECJ4YB1A106M
LMK325BJ226ML
JMK316BJ226ML
JMK212BJ106ML
Capacitance (μF)
22
10
22
10
22
22
10
Case Size
1210
0805
1210
1210
1210
1206
0805
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13
RT8015A
Outline Dimension
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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14
DS8015A-04 March 2011
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