ON NCV8163ASN330T1G 250 ma, ultra-low noise and high psrr ldo regulator Datasheet

NCV8163
250 mA, Ultra-Low Noise
and High PSRR LDO
Regulator for RF and
Analog Circuits
The NCV8163 is a next generation of high PSRR, ultra−low noise
LDO capable of supplying 250 mA output current. Designed to meet
the requirements of RF and sensitive analog circuits, the NCV8163
device provides ultra−low noise, high PSRR and low quiescent
current. The device also offer excellent load/line transients. The
NCV8163 is designed to work with a 1 mF input and a 1 mF output
ceramic capacitor. It is available in XDFN4 0.65P, 1 mm x 1 mm and
TSOP−5 packages.
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MARKING
DIAGRAMS
5
XXXAYWG
G
TSOP−5
CASE 483
5
1
1
Features
•
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 2.2 V to 5.5 V
Available in Fixed Voltage Option: 1.2 V to 5.3 V
±2% Accuracy Over Load/Temperature
Ultra Low Quiescent Current Typ. 12 mA
Standby Current: Typ. 0.1 mA
Very Low Dropout: 80 mV at 250 mA @ 3.3 V
Ultra High PSRR: Typ. 92 dB at 20 mA, f = 1 kHz
Ultra Low Noise: 6.5 mVRMS
Stable with a 1 mF Small Case Size Ceramic Capacitors
Available in XDFN4 1 mm x 1 mm x 0.4 mm and TSOP−5 Packages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; Grade 1 AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• ADAS, Infotainment & Cluster, and Telematics
• General Purpose Automotive & Industrial
• Building & Factory Automation, Smart Meters
IN
1
XDFN4
CASE 711AJ
XX = Specific Device Code
M = Date Code
PIN CONNECTIONS
IN
1
GND
2
EN
3
OUT
4
NC
EN
4
3
OUT
EN
ON
OFF
5
IN
NCV8163
CIN
1 mF
Ceramic
XX M
1
(Top View)
VOUT
VIN
XXX = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
GND
EPAD
COUT
1 mF
Ceramic
1
OUT
Figure 1. Typical Application Schematics
2
GND
(Top View)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
April, 2018 − Rev. 2
1
Publication Order Number:
NCV8163/D
NCV8163
IN
EN
ENABLE
THERMAL
LOGIC
SHUTDOWN
BANDGAP
MOSFET
REFERENCE
INTEGRATED
DRIVER WITH
SOFT−START
CURRENT LIMIT
OUT
* ACTIVE DISCHARGE
Version A only
EN
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
TSOP−5
Pin No.
XDFN4
Pin
Name
1
4
IN
5
1
OUT
3
3
EN
2
2
GND
Common ground connection
4
−
N/C
Not connected. This pin can be tied to ground to improve thermal dissipation.
−
EP
EPAD
Description
Input voltage supply pin
Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.
Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO.
Exposed Pad. Exposed pad can be tied to ground plane for better power dissipation.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6
V
Output Voltage
VOUT
−0.3 to VIN + 0.3, max. 6 V
V
Chip Enable Input
VCE
−0.3 to 6 V
V
Output Short Circuit Duration
tSC
unlimited
s
Operating Ambient Temperature Range
TA
−40 to +125
°C
Input Voltage (Note 1)
Maximum Junction Temperature
TJ
150
°C
TSTG
−55 to +150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
ESD Capability, Charged Device Model (Note 2)
ESDCDM
1000
V
Storage Temperature Range
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Max
Unit
Input Voltage
Rating
VIN
2.2
5.5
V
Junction Temperature
TJ
−40
+125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
NCV8163
THERMAL CHARACTERISTICS
Symbol
Value
Unit
Thermal Characteristics, XDFN4 (Note 3), Thermal Resistance, Junction−to−Air
Rating
RqJA
198.1
°C/W
Thermal Characteristics, TSOP−5 (Note 3), Thermal Resistance, Junction−to−Air
RqJA
218
°C/W
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 1 V; IOUT = 1 mA, CIN = COUT = 1 mF, unless otherwise
noted. VEN = 1.2 V. Typical values are at TJ = +25°C (Note 4).
Parameter
Test Conditions
Symbol
Min
Max
Unit
VIN
2.2
5.5
V
VIN = (VOUT(NOM) + 1 V) to 5.5 V
VOUT
−2
+2
%
VIN = (VOUT(NOM) + 1 V) to 5.5 V
(for VOUT < 1.8 V)
VOUT
−3
+3
%
%/mA
Operating Input Voltage
Output Voltage Accuracy
Line Regulation
Load Regulation
Dropout Voltage (Note 5)
VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V
IOUT =
1 mA to 250 mA
IOUT = 250 mA
XDFN4 package
XDFN4
LineReg
0.02
LoadReg
0.001
0.005
0.008
0.015
TSOP−5
VOUT(NOM) = 1.8 V
VDO
Output Current Limit
IOUT = 250 mA
TSOP−5 package
%/V
180
250
VOUT(NOM) = 2.8 V
95
160
VOUT(NOM) = 3.0 V
90
155
VOUT(NOM) = 3.3 V
Dropout Voltage (Note 5)
Typ
80
145
205
280
VOUT(NOM) = 2.8 V
120
190
VOUT(NOM) = 3.0 V
115
185
VOUT(NOM) = 3.3 V
105
175
VOUT(NOM) = 1.8 V
VDO
mV
mA
VOUT = 90% VOUT(NOM)
ICL
Short Circuit Current
VOUT = 0 V
ISC
690
Quiescent Current
IOUT = 0 mA
IQ
12
20
mA
Shutdown Current
VEN ≤ 0.4 V, VIN = 4.8 V
IDIS
0.01
1
mA
EN Input Voltage “H”
VENH
EN Input Voltage “L”
VENL
VEN = 4.8 V
IEN
EN Pin Threshold Voltage
EN Pull Down Current
Turn−On Time
Power Supply Rejection Ratio
Output Voltage Noise
Thermal Shutdown Threshold
Active Output Discharge Resistance
Line Transient (Note 6)
250
mV
V
1.2
0.4
0.2
COUT = 1 mF, From assertion of VEN to
VOUT = 95% VOUT(NOM)
0.5
mA
120
ms
IOUT = 20 mA
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
PSRR
91
92
85
60
dB
f = 10 Hz to 100 kHz
IOUT = 1 mA
IOUT = 250 mA
VN
8.0
6.5
mVRMS
Temperature rising
TSDH
160
°C
°C
Temperature falling
TSDL
140
VEN < 0.4 V, Version A only
RDIS
280
VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) + 1.6 V)
in 30 ms, IOUT = 1 mA
TranLINE
IOUT = 1 mA to 200 mA in 10 ms
IOUT = 200 mA to 1 mA in 10 ms
W
mV
−1
VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) + 1 V)
in 30 ms, IOUT = 1 mA
Load Transient (Note 6)
700
+1
TranLOAD
mV
−40
+40
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM).
6. Guaranteed by design.
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3
NCV8163
TYPICAL CHARACTERISTICS
3.330
VOUT, OUTPUT VOLTAGE (V)
3.335
1.825
VOUT, OUTPUT VOLTAGE (V)
1.830
1.820
1.815
IOUT = 10 mA
1.810
1.805
IOUT = 250 mA
1.800
1.795
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
1.790
1.785
1.780
−40 −20
0
20
40
60
80
100
120
140
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
3.300
3.295
3.290
3.285
−40 −20
0
20
40
60
80
100
120 140
0.05
5.025
IOUT = 10 mA
5.020
5.015
IOUT = 250 mA
5.010
5.005
VIN = 5.5 V
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
5.000
4.995
0
20
40
60
80
100
120
REGLINE, LINE REGULATION (%/V)
VOUT, OUTPUT VOLTAGE (V)
3.305
Figure 4. Output Voltage vs. Temperature −
VOUT = 3.3 V − XDFN Package
4.990
−40 −20
140
0.04
0.03
0.02
0.01
0
−0.01
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
−0.02
−0.03
−0.04
−0.05
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature −
VOUT = 5.0 V − XDFN Package
Figure 6. Line Regulation vs. Temperature −
VOUT = 1.8 V
REGLOAD, LOAD REGULATION (mV)
0.050
REGLINE, LINE REGULATION (%/V)
IOUT = 250 mA
3.310
Figure 3. Output Voltage vs. Temperature −
VOUT = 1.8 V − XDFN Package
5.030
0.040
0.030
0.020
0.010
0
−0.010
−0.040
IOUT = 10 mA
3.315
TJ, JUNCTION TEMPERATURE (°C)
5.035
−0.030
3.320
TJ, JUNCTION TEMPERATURE (°C)
5.040
−0.020
3.325
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
−0.050
−40 −20
0
20
40
60
80
100
120
140
20
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
IOUT = 1 mA to 250 mA
18
16
14
12
10
8
6
4
2
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Line Regulation vs. Temperature −
VOUT = 3.3 V
Figure 8. Load Regulation vs. Temperature −
VOUT = 1.8 V
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NCV8163
20
REGLOAD, LOAD REGULATION (mV)
VIN = 4.3 V
18 V
OUT = 3.3 V
16 CIN = 1 mF
COUT = 1 mF
14
IOUT = 1 mA to 250 mA
12
10
8
6
4
2
0
−40 −20
0
20
40
60
80
100
120
140
16
14
12
10
8
6
4
2
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Load Regulation vs. Temperature −
VOUT = 3.3 V
Figure 10. Load Regulation vs. Temperature −
VOUT = 5.0 V
1500
1500
1350
1200
TJ = 125°C
1050
TJ = 25°C
900
750
TJ = −40°C
600
450
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
300
150
0
25
50
75
1200
TJ = 125°C
1050
TJ = 25°C
900
750
TJ = −40°C
600
450
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
300
150
0
100 125 150 175 200 225 250
0
25
50
75
100 125 150 175 200 225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 11. Ground Current vs. Load Current −
VOUT = 1.8 V
Figure 12. Ground Current vs. Load Current −
VOUT = 3.3 V
250
VDROP, DROPOUT VOLTAGE (mV)
1500
1350
1200
1050
TJ = 25°C
TJ = 125°C
900
750
TJ = −40°C
600
450
VIN = 5.5 V
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
300
150
0
VIN = 5.5 V
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
IOUT = 1 mA to 250 mA
18
1350
0
IGND, GROUND CURRENT (mA)
20
TJ, JUNCTION TEMPERATURE (°C)
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
REGLOAD, LOAD REGULATION (mV)
TYPICAL CHARACTERISTICS
0
25
50
75
100 125 150 175 200
200
TJ = 125°C
TJ = 25°C
175
150
125
TJ = −40°C
100
75
50
25
0
225 250
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
225
0
25
50
75
100 125 150 175 200 225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 13. Ground Current vs. Load Current −
VOUT = 5.0 V
Figure 14. Dropout Voltage vs. Load Current −
VOUT = 1.8 V − XDFN4 Package
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NCV8163
TYPICAL CHARACTERISTICS
150
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
150
135
120
TJ = 125°C
105
TJ = 25°C
90
75
60
TJ = −40°C
45
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
30
15
0
0
25
50
75
100 125 150 175 200
225 250
45
TJ = −40°C
30
15
0
0
25
50
75
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
100 125 150 175 200 225 250
150
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
TJ = 25°C
60
Figure 16. Dropout Voltage vs. Load Current −
VOUT = 5.0 V − XDFN4 Package
IOUT = 250 mA
175
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
IOUT = 100 mA
75
50
25
0
−40 −20
IOUT = 10 mA
0
20
40
60
80
100
120 140
135
120
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
IOUT = 250 mA
105
90
75
IOUT = 100 mA
60
IOUT = 10 mA
45
30
15
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 17. Dropout Voltage vs. Temperature −
VOUT = 1.8 V − XDFN4 Package
Figure 18. Dropout Voltage vs. Temperature −
VOUT = 3.3 V − XDFN4 Package
100
720
IOUT = 250 mA
90
80
700
ICL, CURRENT LIMIT (mA)
VDROP, DROPOUT VOLTAGE (mV)
75
Figure 15. Dropout Voltage vs. Load Current −
VOUT = 3.3 V − XDFN4 Package
200
100
TJ = 125°C
90
IOUT, OUTPUT CURRENT (mA)
225
125
120
105
IOUT, OUTPUT CURRENT (mA)
250
150
135
IOUT = 100 mA
70
60
50
IOUT = 10 mA
40
30
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
20
10
0
−40 −20
0
20
40
60
80
100
680
660
640
620
600
560
540
520
−40 −20
120 140
VIN = 4.3 V
VOUT = 90% VOUT(nom)
CIN = 1 mF
COUT = 1 mF
580
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. Dropout Voltage vs. Temperature −
VOUT = 5.0 V − XDFN4 Package
Figure 20. Current Limit vs. Temperature
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NCV8163
VEN, ENABLE VOLTAGE THRESHOLD (V)
700
680
660
640
620
600
580
VIN = 4.3 V
VOUT = 0 V (SHORT)
CIN = 1 mF
COUT = 1 mF
560
540
520
500
−40 −20
0
20
40
60
80
100
120 140
0.9
0.8
0.7
0.6
0.4
0.2
0.1
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
Figure 22. Enable Thresholds Voltage
0.45
90
0.40
0.35
0.30
0.25
0.20
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.15
0.10
0.05
0
−40 −20
270
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.3
100
280
ON −> OFF
0.5
0.50
290
OFF −> ON
TJ, JUNCTION TEMPERATURE (°C)
0
20
40
60
80
100
120 140
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
80
70
60
50
40
30
20
10
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 23. Current to Enable Pin vs.
Temperature
Figure 24. Disable Current vs. Temperature
100
300
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
260
10
Unstable Operation
1
Stable Operation
ESR (W)
RDIS, DISCHARGE RESISTIVITY (W)
1.0
Figure 21. Short Circuit Current vs.
Temperature
IDIS, DISABLE CURRENT (nA)
IEN, ENABLE PIN CURRENT (mA)
ISC, SHORT CIRCUIT CURRENT (mA)
TYPICAL CHARACTERISTICS
250
240
230
220
210
200
−40 −20
0
20
40
60
80
100
0.1
120 140
0
50
100
150
200
250
300
TJ, JUNCTION TEMPERATURE (°C)
IOUT, OUTPUT CURRENT (mA)
Figure 25. Discharge Resistance vs.
Temperature
Figure 26. Maximum COUT ESR Value vs. Load
Current
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NCV8163
TYPICAL CHARACTERISTICS
OUTPUT NOISE (nV/√Hz)
10K
1 mA
10 mA
250 mA
1K
100
10
1
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
IOUT
1 mA
7.73
6.99
10 mA
7.12
6.26
250 mA
7.11
6.33
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
10
100
1K
10K
1M
100K
FREQUENCY (Hz)
Figure 27. Output Voltage Noise Spectral Density – VOUT = 1.8 V
OUTPUT NOISE (nV/√Hz)
10K
1 mA
10 mA
250 mA
1K
100
10
1
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
IOUT
1 mA
7.9
7.07
10 mA
7.19
6.25
250 mA
7.29
6.38
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
10
100
1K
10K
1M
100K
FREQUENCY (Hz)
Figure 28. Output Voltage Noise Spectral Density – VOUT = 2.8 V
120
VIN = 2.8 V+100mVpp
VOUT = 1.8 V
COUT = 1 mF MLCC 1206
100
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
120
80
60
40
1 mA
10 mA
20 mA
100 mA
250 mA
20
0
10
100
1K
10K
100K
1M
100
80
60
1 mA
10 mA
20 mA
100 mA
250 mA
40
20
0
10M
VIN = 4.3 V+100mVpp
VOUT = 3.3 V
COUT = 1 mF MLCC 1206
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 29. Power Supply Rejection Ratio −
VOUT = 1.8 V
Figure 30. Power Supply Rejection Ratio −
VOUT = 3.3 V
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10M
NCV8163
TYPICAL CHARACTERISTICS
RR, RIPPLE REJECTION (dB)
120
100
80
60
1 mA
10 mA
20 mA
100 mA
250 mA
40
20
0
10
100
VIN = 5.5 V+100mVpp
VOUT = 5.0 V
COUT = 1 mF MLCC 1206
1K
10K
100K
1M
10M
FREQUENCY (Hz)
500 mV/div
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 mF (MLCC)
IINPUT
1 V/div
VOUT
VEN
VOUT
200 mA/div
VEN
IINPUT
VIN = 4.3 V
VOUT = 3.3 V
COUT = 4.7 mF (MLCC)
50 ms/div
Figure 33. Enable Turn−on Response −
COUT = 4.7 mF, IOUT = 10 mA
500 mV/div
50 ms/div
Figure 32. Enable Turn−on Response −
COUT = 1 mF, IOUT = 10 mA
VOUT
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 mF (MLCC)
IINPUT
VEN
1 V/div
VEN
VOUT
200 mA/div
200 mA/div
1 V/div
500 mV/div
200 mA/div
1 V/div
500 mV/div
Figure 31. Power Supply Rejection Ratio −
VOUT = 5.0 V
IINPUT
VIN = 4.3 V
VOUT = 3.3 V
COUT = 4.7 mF (MLCC)
50 ms/div
50 ms/div
Figure 34. Enable Turn−on Response −
COUT = 1 mF, IOUT = 250 mA
Figure 35. Enable Turn−on Response −
COUT = 4.7 mF, IOUT = 250 mA
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9
NCV8163
TYPICAL CHARACTERISTICS
3.3 V
tFALL = 1 ms
500 mV/div
2.3 V
VIN
VIN
tRISE = 1 ms
10 mV/div
VOUT = 1.8 V, IOUT = 10 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
2.3 V
VOUT = 1.8 V, IOUT = 10 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
2 ms/div
2 ms/div
Figure 36. Line Transient Response −
IOUT = 10 mA
Figure 37. Line Transient Response −
IOUT = 10 mA
2.3 V
VOUT
tRISE = 1 ms
VOUT = 1.8 V, IOUT = 250 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
10 mV/div
VIN
500 mV/div
3.3 V
VIN
3.3 V
tFALL = 1 ms
2.3 V
VOUT = 1.8 V, IOUT = 250 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
2 ms/div
2 ms/div
Figure 38. Line Transient Response −
IOUT = 250 mA
Figure 39. Line Transient Response −
IOUT = 250 mA
IOUT
100 mA/div
IOUT
tRISE = 1 ms
tFALL = 1 ms
VIN = 3.8 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 4.7 mF
20 mV/div
20 mV/div
100 mA/div
10 mV/div
500 mV/div
10 mV/div
500 mV/div
3.3 V
VOUT
COUT = 4.7 mF
COUT = 1 mF
VOUT
COUT = 1 mF
VIN = 3.8 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
5 ms/div
10 ms/div
Figure 40. Load Transient Response −
1 mA to 250 mA
Figure 41. Load Transient Response −
250 mA to 1 mA
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10
NCV8163
TYPICAL CHARACTERISTICS
VIN = 3.8 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
100 mA/div
IOUT
VIN = 3.8 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
tRISE = 500 ns
20 mV/div
20 mV/div
100 mA/div
IOUT
VOUT
tRISE = 1 ms
VOUT
tRISE = 1 ms
tRISE = 500 ns
5 ms/div
5 ms/div
Figure 42. Load Transient Response −
1 mA to 250 mA
Figure 43. Load Transient Response −
250 mA to 1 mA
1 V/div
VOUT
VIN
TSD On
VOUT
TSD Off
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
IOUT = 10 mA
500 mV/div
IOUT
10 ms/div
2 ms/div
Figure 44. Overheating Protection − TSD
Figure 45. Turn−on/off − Slow Rising VIN
VEN
500 mV/div
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
VOUT
COUT = 10 mF
1 V/div
100 mA/div
VIN = 5.5 V, VOUT = 1.2 V
CIN = 1 mF (MLCC), COUT = 1 mF (MLCC)
COUT = 4.7 mF
COUT = 1 mF
400 ms/div
Figure 46. Enable Turn−off − Various Output
Capacitors
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11
NCV8163
APPLICATIONS INFORMATION
General
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
The NCV8163 is an ultra−low noise 250 mA low dropout
regulator designed to meet the requirements of RF
applications and high performance analog circuits. The
NCV8163 device provides very high PSRR and excellent
dynamic response. In connection with low quiescent current
this device is well suitable for battery powered application
such as cell phones, tablets and other. The NCV8163 is fully
protected in case of current overload, output short circuit and
overheating.
Enable Operation
Input capacitor connected as close as possible is necessary
for ensure device stability. The X7R or X5R capacitor
should be used for reliable performance over temperature
range. The value of the input capacitor should be 1 mF or
greater to ensure the best dynamic performance. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitors for their low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during sudden load current changes.
The NCV8163 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage is <0.4 V the device is guaranteed to
be disabled. The pass transistor is turned−off so that there is
virtually no current flow between the IN and OUT. The
active discharge transistor is active so that the output voltage
VOUT is pulled to GND through a 280 W resistor. In the
disable state the device consumes as low as typ. 10 nA from
the VIN.
If the EN pin voltage >1.2 V the device is guaranteed to
be enabled. The NCV8163 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 200 nA which assures that the device is
turned−off when the EN pin is not connected. In the case
where the EN function isn’t required the EN should be tied
directly to IN.
Output Decoupling (COUT)
Output Current Limit
Input Capacitor Selection (CIN)
The NCV8163 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCV8163 is designed to
remain stable with minimum effective capacitance of 0.7 mF
to account for changes with temperature, DC bias and
package size. Especially for small package size capacitors
such as 0201 the effective capacitance drops rapidly with the
applied DC bias. Please refer Figure 47.
Output Current is internally limited within the IC to a
typical 700 mA. The NCV8163 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 690 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Power Dissipation
As power dissipated in the NCV8163 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
Figure 47. Capacity vs DC Bias Voltage
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 2 W. Larger
output capacitors and lower ESR could improve the load
www.onsemi.com
12
NCV8163
ambient temperature affect the rate of junction temperature
rise for the part.
The maximum power dissipation the NCV8163 can
handle is given by:
P D [ V IN @ I GND ) I OUTǒV IN * V OUTǓ
(eq. 1)
q JA
220
1.0
qJA, 1 oz Cu
0.9
210
200
0.8
qJA, 2 oz Cu
190
0.7
PD(MAX), TA = 25°C, 2 oz Cu
0.6
180
PD(MAX), TA = 25°C, 1 oz Cu
170
0.5
160
0.4
150
0
100
200
300
400
500
600
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
P D(MAX) +
ƪ125oC * T Aƫ
The power dissipated by the NCV8163 for given
application conditions can be calculated from the following
equations:
0.3
700
PCB COPPER AREA (mm2)
0.7
220
PD(MAX), TA = 25°C, 2 oz Cu
210
0.6
PD(MAX), TA = 25°C, 1 oz Cu
200
0.5
0.4
190
qJA, 1 oz Cu
180
0.3
qJA, 2 oz Cu
170
0.2
0.1
160
150
0
100
200
300
400
500
600
PCB COPPER AREA (mm2)
Figure 49. qJA and PD (MAX) vs. Copper Area − TSOP−5
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13
0
700
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
Figure 48. qJA and PD (MAX) vs. Copper Area − XDFN4
(eq. 2)
NCV8163
Reverse Current
Turn−On Time
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT(NOM), COUT, TA.
Power Supply Rejection Ratio
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 or 0201 capacitors with
appropriate capacity. Larger copper area connected to the
pins will also improve the device thermal resistance. The
actual power dissipation can be calculated from the equation
above (Equation 2). Expose pad can be tied to the GND pin
for improvement power dissipation and lower device
temperature.
PCB Layout Recommendations
The NCV8163 features very high Power Supply
Rejection ratio. If desired the PSRR at higher frequencies in
the range 100 kHz – 10 MHz can be tuned by the selection
of COUT capacitor and proper PCB layout.
ORDERING INFORMATION
Device
Voltage
Option
Marking
NCV8163AMX120TBG
1.2 V
ME
NCV8163AMX150TBG
1.5 V
MV
NCV8163AMX180TBG
1.8 V
MA
NCV8163AMX250TBG
2.5 V
MU
NCV8163AMX270TBG
2.7 V
MX
NCV8163AMX280TBG
2.8 V
MM
NCV8163AMX300TBG
3.0 V
MJ
NCV8163AMX330TBG
3.3 V
MK
NCV8163AMX400TBG
4.0 V
MY
NCV8163ASN120T1G
1.2 V
MKE
NCV8163ASN180T1G
1.8 V
KAA
NCV8163ASN270T1G
2.7 V
KAK
NCV8163ASN280T1G
2.8 V
KAE
NCV8163ASN300T1G
3.0 V
KAF
NCV8163ASN330T1G
3.3 V
KAG
Description
Package
Shipping†
250 mA, Active Discharge
XDFN4
CASE 711AJ
(Pb-Free)
3000 /
Tape &
Reel
250 mA, Active Discharge
TSOP−5
CASE 483
(Pb-Free)
3000 /
Tape &
Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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14
NCV8163
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE M
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
D 5X
NOTE 5
0.20 C A B
0.10 T
M
2X
0.20 T
B
5
1
4
2
B
S
3
K
DETAIL Z
G
A
A
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
DETAIL Z
J
C
0.05
H
SIDE VIEW
C
SEATING
PLANE
END VIEW
MILLIMETERS
MIN
MAX
2.85
3.15
1.35
1.65
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
0_
10 _
2.50
3.00
SOLDERING FOOTPRINT*
0.95
0.037
1.9
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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15
NCV8163
PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE A
PIN ONE
REFERENCE
2X
4X
A
B
D
ÉÉ
ÉÉ
E
4X
0.05 C
L2
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
b2
DETAIL A
DIM
A
A1
A3
b
b2
D
D2
E
e
L
L2
0.05 C
2X
TOP VIEW
(A3)
0.05 C
A
0.05 C
NOTE 4
A1
SIDE VIEW
e
DETAIL A
4X
2
D2
45 5
SEATING
PLANE
RECOMMENDED
MOUNTING FOOTPRINT*
e/2
1
C
L
0.65
PITCH
PACKAGE
OUTLINE
D2
4
4X
3
4X
MILLIMETERS
MIN
MAX
0.33
0.43
0.00
0.05
0.10 REF
0.15
0.25
0.02
0.12
1.00 BSC
0.43
0.53
1.00 BSC
0.65 BSC
0.20
0.30
0.07
0.17
b
0.05
BOTTOM VIEW
M
C A B
0.11
4X
0.24
NOTE 3
2X
0.52
4X
0.39
1.20
4X
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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NCV8163/D