CHA1008-99F 80-105GHz Balanced Low Noise Amplifier GaAs Monolithic Microwave IC Description The CHA1008-99F is a broadband, balanced, four-stage monolithic low noise amplifier. It is designed for Millimeter-Wave Imaging applications and can be use in commercial digital radios and wireless LANs. The circuit is manufactured on a pHEMT process, 0.10µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is available in chip form. IN OUT Main Features Gain and Noise Figure 20 18 ■ Broadband performances: 80-105GHz ■ Balanced configuration ■ 16dB linear gain from 80 to 90GHz ■ 5dB noise figure from 80 to 90GHz ■ DC bias: VD=2.5V@ ID=115mA ■ Chip size 3.40x1.60x0.07mm Gain & NF (dB) 16 14 12 Gain NF 10 8 6 4 2 0 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 Frequency (GHz) Main Electrical Characteristics Tamb.= +25°C Symbol Parameter Freq Frequency range Gain Linear Gain (from 80 to 90GHz) NF Noise Figure (from 80 to 90GHz) Pout Output Power @1dB comp. Ref. : DSCHA10082128 - 07 May 12 1/8 Min 80 Typ Max 105 16 5 5 Unit GHz dB dB dBm Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHA1008-99F 80-105GHz Balanced Low Noise Amplifier Electrical Characteristics Tamb.= +25°C, VD = 2.5V Symbol Parameter Min Typ Max Unit Freq Frequency range 80 105 GHz Gain Linear Gain 17 dB NF Noise Figure [80-90]GHz 5.0 [90-100]GHz 6.5 dB [100-105]GHz 7.5 RLlin Input Return Loss -14 dB RLout Output Return Loss -12 dB IN/OUT Input & Output impedance in the chip plan 50 Ohms impedance OP1dB Output Power @1dB compression 5 dBm VG1, VG2 Gate voltages (either on VG1 or VG2 or +0.15 V both on VG1 & VG2) VD Drain voltage 2.5 V ID Drain current 115 mA These values are representative of on-wafer measurements that are made without bonding wires at the RF ports. Absolute Maximum Ratings (1) Tamb.= +25°C Symbol Parameter Values Unit VD Drain bias voltage 3 V ID Drain bias current 150 mA VG1, VG2 Gate bias voltage -2 to +0.8 V (2) Pin Maximum peak input power overdrive 0 dBm Tj Junction temperature 175 °C Ta Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to +150 °C (1) Operation of this device above anyone of these parameters may cause permanent damage. (2) Duration < 1s. Typical Bias Conditions Tamb.= +25°C Symbol Parameter VD DC drain voltage ID Drain current controlled with VG1 or VG2 VG1, DC gate voltages linked together into the circuit (only one VG2 can be used) Ref. : DSCHA10082128 - 07 May 12 2/8 Values 2.5 115 +0.15 Unit V mA V Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 80-105GHz Balanced Low Noise Amplifier CHA1008-99F Typical on-wafer Sij parameters Tamb.= +25°C, VD = 2.5V, ID = 115mA Freq S11 PhS11 S12 (GHz) (dB) (°) (dB) 70 -9.62 -27.4 -46.61 71 -7.90 -59.9 -45.20 72 -6.07 -92.8 -40.60 73 -4.55 -129.0 -39.39 74 -2.99 -177.8 -38.67 75 -3.70 112.1 -37.80 76 -7.04 27.1 -39.02 77 -9.89 -54.8 -49.41 78 -11.11 -119.6 -50.15 79 -15.87 -165.0 -47.11 80 -24.20 173.2 -60.94 81 -28.72 -99.1 -51.00 82 -21.77 -98.6 -48.05 83 -18.19 -113.9 -53.75 84 -16.98 -118.1 -52.54 85 -15.21 -135.4 -51.74 86 -15.61 -154.4 -52.07 87 -16.28 -162.2 -55.59 88 -16.82 -172.6 -63.41 89 -17.77 174.3 -59.12 90 -20.16 162.6 -56.99 91 -23.37 160.8 -58.98 92 -25.07 174.8 -63.88 93 -27.83 -176.8 -49.55 94 -24.20 -142.3 -45.20 95 -19.58 -159.9 -44.79 96 -19.07 169.2 -47.08 97 -20.34 148.5 -47.05 98 -21.08 132.2 -46.64 99 -20.56 115.6 -46.80 100 -19.37 85.3 -43.63 101 -18.31 52.3 -41.25 102 -16.68 28.0 -40.83 103 -14.47 1.7 -43.05 104 -13.45 -28.5 -41.39 105 -13.48 -46.5 -40.08 106 -12.52 -54.9 -40.47 107 -11.21 -72.6 -41.80 108 -11.12 -84.1 -39.92 109 -9.82 -90.7 -36.78 110 -8.67 -109.5 -36.82 Ref. : DSCHA10082128 - 07 May 12 PhS12 (°) -1.7 -29.0 -79.9 -141.1 -178.6 122.6 57.8 11.4 8.0 -33.3 -113.5 -67.4 -109.3 -119.6 -161.8 146.8 103.4 -10.9 -173.6 100.7 37.3 -48.2 42.0 15.8 -14.8 -51.8 -78.6 -86.8 -96.8 -89.2 -90.3 -106.8 -125.1 -142.1 -138.6 -150.1 -165.1 -163.4 175.3 173.2 159.6 3/8 S21 (dB) -14.84 -12.29 -9.91 -6.20 -1.39 3.76 8.27 12.45 16.25 17.72 17.16 16.38 16.01 16.13 16.20 16.85 17.06 16.60 16.54 16.46 16.26 16.21 16.53 16.66 16.88 17.43 17.66 17.19 16.74 16.54 17.19 17.51 17.32 17.12 17.38 17.99 18.53 19.12 19.28 16.28 12.41 PhS21 (°) -77.4 -97.7 -112.3 -126.5 -145.8 -175.9 147.2 106.5 55.7 -1.7 -50.1 -88.2 -121.7 -154.9 174.3 141.8 107.0 73.6 44.6 14.0 -16.5 -45.1 -73.5 -103.9 -132.6 -163.4 160.9 127.5 97.5 69.0 41.0 4.7 -29.6 -62.6 -94.2 -129.8 -169.5 146.3 91.4 29.9 -8.0 S22 (dB) -19.06 -23.78 -15.39 -15.31 -16.08 -21.34 -32.33 -25.50 -15.98 -14.77 -12.28 -12.32 -13.09 -11.89 -12.21 -13.98 -15.12 -15.11 -15.99 -16.01 -15.98 -17.49 -18.31 -18.51 -23.35 -27.83 -20.18 -20.52 -20.30 -21.28 -28.63 -28.04 -21.86 -22.99 -22.85 -30.09 -28.68 -20.32 -12.90 -10.74 -10.66 PhS22 (°) -147.5 -147.3 -132.2 -151.5 174.2 156.5 -88.8 -87.4 -91.1 -113.8 -136.7 -152.4 -159.2 -171.9 171.4 156.7 152.8 154.1 144.6 138.5 127.1 117.1 108.2 99.7 82.7 119.0 121.6 105.7 83.3 67.8 -10.1 164.1 121.9 113.3 74.3 105.1 173.0 169.1 138.1 106.6 76.0 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHA1008-99F 80-105GHz Balanced Low Noise Amplifier Typical On wafer Measurements Tamb.= +25°C, VD = 2.5V, ID = 115mA Linear Gain versus Frequency 20 18 16 Gain (dB) 14 12 10 8 6 4 2 0 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 Frequency (GHz) Noise Figure versus Frequency 12 11 10 Noise Figure (dB) 9 8 7 6 5 4 3 2 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 Frequency (GHz) Ref. : DSCHA10082128 - 07 May 12 4/8 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 80-105GHz Balanced Low Noise Amplifier CHA1008-99F Typical On wafer Measurements Tamb.= +25°C, VD = 2.5V, ID = 115mA Input Return Loss versus Frequency 0 -5 Input Return Loss (dB) -10 -15 -20 -25 -30 -35 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 Frequency (GHz) Output Return Loss versus Frequency 0 -5 Output Return Loss (dB) -10 -15 -20 -25 -30 -35 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 Frequency (GHz) Ref. : DSCHA10082128 - 07 May 12 5/8 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHA1008-99F 80-105GHz Balanced Low Noise Amplifier Mechanical data Chip thickness: 70µm DC pad size: 190x80µm RF pad size: 122x72µm . Chip size: 3400x1600 ±35µm All dimensions are in micrometers Ref. : DSCHA10082128 - 07 May 12 6/8 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 80-105GHz Balanced Low Noise Amplifier CHA1008-99F DC Schematic Notes VD supply voltage is common for the 4 stages of the amplifier. VG1 and VG2 pads are linked in the circuit so the gate supply voltage can be apply either on VG1 or VG2. VG1 VG2 IN OUT VD Ref. : DSCHA10082128 - 07 May 12 7/8 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHA1008-99F 80-105GHz Balanced Low Noise Amplifier Recommended ESD management Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD sensitivity and handling recommendations for the UMS products. Recommended environmental management UMS products are compliant with the regulation in particular with the directives RoHS N°2011/65 and REACh N°1907/2006. More environmental data are available in the application note AN0019 also available at http://www.ums-gaas.com. Ordering Information Chip form: CHA1008-99F/00 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S. Ref. : DSCHA10082128 - 07 May 12 8/8 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34