CML MX105ADW Tone detector Datasheet

DATA BULLETIN
MX105A
Tone Detector
PRELIMINARY INFORMATION
•
FEATURES
•
APPLICATIONS
•
Operates in High Noise Conditions
•
•
≥36 dB Signal Input Range
Single and Multitone System
Applications
•
High Sensitivity
•
Low Power Operation 2.7 V to 5.5 V
•
Adjustable Bandwidth
•
Adjustable Frequency
Tone In
R2
C4
R3
C5
4
2
Input Amp
-
1
VDD
3
16
VDD/2
+
C6
C2A
7
8
5
Detect
Filter
Loop
Filter
C2B
Timing
Logic
- +
C3A
6
C3B
- +
11
R4
13
C1B
Detect Counter
VCO
12
15
R1
14
C1A
MX105A
9
RL
10
Detect
Out
The MX105A is a monolithic CMOS tone detector for tone decoding in single and multitone signaling systems. Using
phase locked loop (PLL) decoding techniques, the MX105A recognizes tones in the presence of high noise levels and
strong adjacent channel tones. Detection frequency and bandwidth can each be independently adjusted. The design is
immune to high levels of harmonic and sub-harmonic noise. It also maintains excellent noise immunity and constant
bandwidth over a wide range of input signal levels.
The MX105A requires a voltage supply of 2.7V to 5.5V and is available in the following package styles: 16-pin SOIC
(MX105ADW), 16-pin PDIP (MX105AP), and 24-pin PLCC (MX105ALH).
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480133.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
Tone Detector
2
MX105A PRELIMINARY INFORMATION
CONTENTS
Section.......................................................................................................................... Page
1. Block Diagram ................................................................................................................3
2. Signal List .......................................................................................................................4
3. External Components ....................................................................................................5
4. General Description .......................................................................................................6
5. Application ......................................................................................................................7
5.1 Method for Calculating External Component Values...............................................................7
5.2 Define f0 ..................................................................................................................................7
5.3 Calculate Minimum Usable Bandwidth....................................................................................7
5.4 Calculate The Recommended Operating Bandwidth ..............................................................7
5.5 Select R4 for Operating BW ....................................................................................................8
5.6 Calculate R2×C2A ...................................................................................................................8
5.7 Define Maximum Allowed Response Time..............................................................................8
5.8 Calculate R3×C3A ...................................................................................................................8
5.9 Calculate Maximum De-response Time ..................................................................................9
5.10 Calculate Signal to Noise Performance...............................................................................10
5.11 Calculate C4 for 30° Phase Shift.........................................................................................10
6. Performance Specification ..........................................................................................11
6.1 Electrical Performance ..........................................................................................................11
6.1.1 Absolute Maximum Ratings ..........................................................................................................11
6.1.2 Operating Limits............................................................................................................................11
6.1.3 Operating Characteristics .............................................................................................................12
6.2 Packaging..............................................................................................................................13
MX•COM, Inc. reserves the right to change specifications at any time and without notice.
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480133.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
Tone Detector
3
MX105A PRELIMINARY INFORMATION
1. Block Diagram
Tone In
R2
C4
R3
C5
4
2
Input Amp
-
1
VDD
3
16
VDD/2
+
C6
C2A
7
5
Detect
Filter
Loop
Filter
8
C2B
6
C3B
Timing
Logic
- +
C3A
- +
11
R4
13
C1B
Detect Counter
VCO
12
15
R1
MX105A
14
C1A
9
RL
10
Detect
Out
Figure 1: Block Diagram
© 1997 MX•COM, INC.
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Doc.# 20480133.003
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Tone Detector
4
MX105A PRELIMINARY INFORMATION
2. Signal List
Pin No.
Pin No.
Name
Type
Description
DW/P
LH
1
1
INPUT AMP IN
input
AC couple to this input. Nominal input
impedance is 200 kΩ.
2
3
INPUT AMP OUT
output
3
5
R3
input
Detect filter resistor pin.
4
6
R2
input
PLL loop filter resistor pin. For improved
performance C4 may be chosen to provide 30°
of phase shift at the loop filter input.
5
7
C3A
output
Detect filter capacitor pin A
6
8
C3B
output
Detect filter capacitor pin B
7
10
C2A
output
Loop filter capacitor pin A
8
11
C2B
output
Loop filter capacitor pin B
Nominal output impedance is 1 kΩ.
9
13
DETECT OUT
output
PMOS open drain output - active on detect.
10
14
VSS
power
Ground.
11
16
R4A
input
Bandwidth control resistor pin A
12
17
R4B
input
Bandwidth control resistor pin B
13
19
C1B
output
VCO capacitor B
14
20
C1A
output
VCO capacitor A
15
22
R1
input
VCO discharge resistor. When potentiometer
tuning is required, a series resistor is
recommend to prevent possible shorting to
ground.
16
24
VDD
power
Power supply.
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480133.003
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Tone Detector
5
MX105A PRELIMINARY INFORMATION
3. External Components
VDD
C5
Signal Input
16
1
R1F
2
15
3
14
4
13
C6
C1A
R3
C1B
R2
MX105A
C4
C3A
R1V
R4
5
12
6
11
7
10
8
9
D1
C3B
C2A
VSS
RL
C2B
Detect Out
Figure 2: Recommended External Components
R1F
See Section 5.2
300kΩ
C2A
R1V
See Section 5.2
100kΩ
C2B
R2
See Section 5.6
C3A
R3
See Section 5.8
C3B
R4
See Section 5.5
C4
RL
Note 4
C1A
See Section 5.2
Note 2
See Section 5.2
Note 2
C1B
20kΩ
±20%
See section 5.6
Note 2
See Section 5.6
Note 2
See Section 5.8
Note 2
See Section 5.8
Note 2
See Section 5.11
Note 1, 2
C5
0.27µF
±20%
C6
0.1µF
±20%
D1
See Section 5.9
Note 3
small signal
diode (1N914)
External Components Notes:
1. For improved performance, C4 may be chosen to provide 30° phase shift at the VCO loop filter input.
2. For compatibility with the MX105; capacitors (C1 - C4) may be connected to VDD instead of VSS.
3. For improved de-response time, a diode (D1) may be added.
4. Any value load resistance (RL) may be used, providing the maximum load current does not exceed the value
given in ‘Maximum Ratings Specifications’.
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480133.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
Tone Detector
6
MX105A PRELIMINARY INFORMATION
4. General Description
The MX105A implements a frequency detector with a phase locked loop (PLL) and a lock detector. The voltage controlled
oscillator (VCO) center frequency, detection bandwidth, loop filter, and detect filter are all independently controlled by
external components.
The MX105A provides a pair of pseudo-sinewave multipliers for splitting the input signal into approximately orthogonal
components. These multipliers are implemented with commutating filters (cyclically sampling filters) which translate an in
band AC input signal to DC. The commutating loop filter is used as the phase detector of the PLL while the commutating
detect filter provides for lock detection. Each pseudo-sinewave has a cyclic form (1 1 0 -1 -1 0) to eliminate low order
harmonic responses. The loop filter produces an error signal, which when applied to the VCO input allows frequency
locking. A limiter between the loop filter output and the VCO input provides tunable control of the detection bandwidth
(BW). Once lock is achieved the detect filter produces a DC value proportional to the input tone amplitude. An internally
generated reference is compared to the detect filter output to determine whether the PLL is locked to an input tone. Once
lock is determined the internal reference is reduced by 50% to minimize output chatter with marginal input signals.
The sampling clocks of the detect filter lag those of the loop filter by 60°. To improve performance, a capacitor (C4) can
be used to phase shift the input to the loop filter by 30°. This shifts all sampling clocks an additional 30° relative to the
input tone to phase align the detect filter sampling clocks with the amplitude peaks of the input tone.
Figure 3 shows the sampling clocks relative to an in band input tone; this figure represents the steady state ‘locked’
condition without C4.
Internal Clock
Segment
4
5
6
1
2
3
4
5
6
1
2
3
4
5
6
1
2
3
Input Tone
Logic 1
indicates
sampling
period
C2B
C2A
C3A
C3B
Figure 3: Sampling Clocks of Commutating Filters
© 1997 MX•COM, INC.
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Doc.# 20480133.003
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Tone Detector
7
MX105A PRELIMINARY INFORMATION
5. Application
The external components shown in Figure 2 are used to adjust the various performance parameters of the MX105A. The
signal-to-noise performance, response time and signal bandwidth are all interrelated factors which should be optimized to
meet the requirements of the application.
By selecting component values in accordance with the following formulas, optimum circuit performance is obtained for any
given application.
First define the following application parameters:
A. The center frequency to be detected (f0).
B. The MX105A Minimum Usable Bandwidth (MUBW). This is obtained by taking into account the worst case
tolerances on the input tone frequency and variations in the MX105A f 0 due to supply voltage and any temperature
effect of the MX105A and its supporting components.
C. The maximum permissible MX105A response time.
D. The minimum input signal amplitude.
Note: Using this information the appropriate component values can be calculated, and the signal-to-noise performance
can be read from a chart. Do not add large safety margins for response time and minimum signal amplitude;
reasonable margins are already included in the formulas. Excessive margins may result in reduced noise immunity.
5.1 Method for Calculating External Component Values
The examples on the following pages demonstrate the calculation of component values for any given application. For the
purpose of the examples, the values below are used:
A. f0 = 2800 Hz
B. ∆TEMP = 100 °C, ∆ VDD = 1V, ∆fIN = 0.5%
C. Maximum allowed response time = 50ms
D. Minimum input signal amplitude = 200 mVRMS.
5.2 Define f0
The components R1, C1A and C1B set the free running frequency of the VCO and therefore the f0 of the MX105A. As
shown below, the frequency of 2800 Hz corresponds to a capacitor value of 220pF and a resistor value of 385 kΩ. This
resistance can be achieved with a 300 kΩ fixed resistor for R1F and for R1V a 100 kΩ potentiometer. The capacitance of
C1A and C1B should include 10-20pF parasitic capacitance due to the device and its package plus any board parasitic
capacitance.
f0 =
1
1
⇒ R1 × C1A =
K ⋅ R1(C1A + C1B )
2Kf 0
where : K
R1
=
2.1 ± 5%
=
(R1F + R1V)
5.3 Calculate Minimum Usable Bandwidth
Minimum Usable Bandwidth (MUBW) is the TOTAL bandwidth required for the following:
A. Input signal frequency tolerance
B. MX105A f0 temperature coefficient (TC = 100 ppm/°C)
C. MX105A f0 supply voltage coefficient (VC = 5000 ppm/V)
Note: Add A, B and C and express as TOTAL bandwidth, not as a ± percentage (%) value.
MUBW = ∆f 0 + T C ∆TEMP + V C ∆V
MUBW = 0.5 + 0.01 × 100 + 0.5 × 1 = 2%
5.4 Calculate The Recommended Operating Bandwidth
BW =
10 + MUBW 10 + 2
=
= 6%
2
2
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Tone Detector
8
MX105A PRELIMINARY INFORMATION
5.5 Select R4 for Operating BW
R4 =
4.8 × BW
4.8 × 6
=
≈ 6.8kΩ
10.35 − BW 10.35 − 6
The exact bandwidth given by any value of R4 will vary slightly. In applications where an exact bandwidth is required, R4
should be a variable resistor to permit adjustment.
5.6 Calculate R2×C2A
R2 × C2 A ≈
100
3 × f0 × BW
For a frequency of 2800 Hz, a bandwidth of 6%, and a choice of C2 A = 0.01µF ⇒ R V = 200kΩ .
Note: Use nearest preferred values.
5.7 Define Maximum Allowed Response Time
The maximum response time (TON) is the sum of the VCO lock time (TLOCK) and the DETECT integration time (TDETECT).
The MX105A’s TON must not exceed the maximum time allowed for the application, but a value lying near the maximum
gives the best S/N performance.
A. Calculate TLOCK
TLOCK =
150
f0 × BW
Using the formula above, for a frequency of 2800 Hz and a bandwidth of 6% the approximate Lock time (TLOCK) will be 9
ms. Since the maximum response time is 50 ms, a DETECT time of 41 ms is allowed.
Note: TLOCK may vary from near zero to the value given, causing corresponding variations in actual T ON.
B. Calculate Maximum Allowable TDETECT
TDETECT = TON MAX − TLOCK
(
C. Define Minimum Expected Signal Amplitude VINMIN
)
This is used in calculating TDETECT components.
5.8 Calculate R3×C3A
R3 × C3 A ≈
TDETECT


V
−3 × ln 1 − TH 
VINMIN 

where: VTH is the detect filter sensitivity.
Note:
1. For a signal amplitude of 200 mVRMS, a resistor value R3 of 510 kΩ with a 0.1µF capacitor for C3A and C3B will yield
a TDETECT time of 20ms. This in turn yields a response time of 9ms + 20 ms = 29ms.
2. Use nearest preferred values.
© 1997 MX•COM, INC.
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Doc.# 20480133.003
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Tone Detector
9
MX105A PRELIMINARY INFORMATION
5.9 Calculate Maximum De-response Time
 VTH
TOFF ≈ −3 × ln
 VINMAX

 R3 × C3 A

where: VTH is the detect filter sensitivity.
For improved de-response time, a diode (1N914 or similar) can be placed between pins 5 and 6, as shown in Figure 3.
The formula and figure below show the approximate time the MX105A will take to turn off after an in-band signal has been
removed. The effect of this diode is to greatly reduce the turn-off time with signal input amplitudes greater than 300
mVRMS. This graph is for VDD = 5V; for lower VDD KDT increases.
TOFF ≈ K DT × R3 × C3 A
KDT = Number of RC Time Constants for
De-response with Diode
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
0
80
160
240
320
400
480
560
640
720
Input Signal Level (mVRMS)
Figure 4: KDT Factor for TOFF vs. Signal Input Amplitude
© 1997 MX•COM, INC.
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Tone Detector
10
MX105A PRELIMINARY INFORMATION
5.10 Calculate Signal to Noise Performance
Worst-case S/N calculations depend on calculation of a value “M” using the formula shown below:
M=
R3 × C3 A
3 × R2 × C2 A
substituting example values,
M=
510 × 0.1
= 8.5
3 × 200 × 0.01
By substituting this value for M in Figure 5, the minimum required S/N of an in band tone with respect to an adjacent
interfering tone can be found. This then has to be increased depending on the input tone amplitude.
-28
M=∞
-24
M=1
-20
M = 0.33
-16
M = 0.1
-12
-8
-4
0
6
8
10
1 2
4
Number of Bandwidths Separation
Figure 5: S/N vs. BW Separation
The following formula expresses the reduction in noise immunity as the input signal approaches the detect filter sensitivity
VTH.
required


VIN
S
S
= 20log
 +
N
N Figure 5
 VIN − VTH 
If this S/N is better than required for the application, R3×C3A can be reduced, or the operating bandwidth can be
increased to obtain a faster tone detection time.
If the S/N performance is not adequate, the operating bandwidth can be reduced toward the MUBW, or R3C3A can be
increased to improve S/N performance at the expense of slower response time.
5.11 Calculate C4 for 30° Phase Shift
Capacitor C4 is used to phase shift the input to the VCO commutating filter by 30°, thereby shifting the sampling clocks by
the same amount. This enables the Detect sampling filter to sample and integrate at the maximum and minimum of the
input tone.
C4 =
tan(30° )
0.092
≈
≈ 164pF
2π × f 0 × R V f 0 × R V
© 1997 MX•COM, INC.
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Doc.# 20480133.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
Tone Detector
11
MX105A PRELIMINARY INFORMATION
6. Performance Specification
6.1 Electrical Performance
6.1.1 Absolute Maximum Ratings
Exceeding these maximum ratings can result in damage to the device.
General
Min.
Max.
Units
Supply (VDD - VSS)
-0.3
7.0
V
Voltage on any pin (wrt VSS)
-0.3
VDD + 0.3
V
VDD
-30
30
mA
VSS
-30
30
mA
Any other pins
-20
Current
Max. Output Switch Load Current
20
mA
10
mA
800
mW
13
mW/°C above 25°C
P/LH/DW Package
Device Dissipation at TAMB = 25°C
Derating above 25°C
Storage Temperature
-40
85
°C
Operating Temperature
-30
85
°C
6.1.2 Operating Limits
Correct operation of the device outside these limits is not implied.
Min.
Typ.
Max.
Units
Supply (VDD - VSS)
Notes
2.7
3.3/5.0
5.5
V
Operating Temperature
-30
85
°C
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Doc.# 20480133.003
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Tone Detector
12
MX105A PRELIMINARY INFORMATION
6.1.3 Operating Characteristics
For the following conditions unless otherwise specified:
VDD = 5.0 V @ TAMB = 25°C
Load resistance on decoder output = 20kΩ.
Notes
Min.
Typ.
Max.
Units
1.0
mA
160
200
kΩ
Static Parameters
IDD
Amplifier Input Impedance
Digital Output Impedance
500
1000
Ω
Analog Output Impedance
1000
1200
Ω
20,000
Hz
Dynamic Parameters
Input Signal
Frequency
40
Lowest Must Detect Level
1
30
mVRMS
Highest Will Not Detect Level
1
20
mVRMS
Highest Will Not Detect f0/2
1, 2
30
790
dB
mVRMS
Highest Will Not Detect 5(f0)
1, 2
20
250
dB
mVRMS
VCO
Frequency
3
120
Frequency Stability
120,000
100
5000
Hz
ppm/°C
ppm/V
BW Limiter
BW Range
2
10
%f0
Amplifier
Open Loop Gain
60
dB
GBWP
1.0
MHz
0
dB
25
mVRMS
Closed Loop Gain
Detect Commutating Filter
Sensitivity (VTH)
1
Operating Characteristics Notes:
1. Multiply by VDD /5V for other supply values.
2. The reference level is VTH. The following formula converts dB to mVRMS.
mVRMS =
10
(dB/20)
× VTH
3. Observing pins 13, 14, or 15 (DW/J package) will cause a frequency shift due to additional loading. If tuning center
frequency by observing oscillator, design in a buffer amplifier between pin 15 and probe/calibration point and tune with
no input signal. Otherwise, tune by observing detect output band edges while sweeping input signal. VCO center
frequency is 6(f0) at pin 15 while it is 3(f0) at pins 13 and 14.
© 1997 MX•COM, INC.
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Doc.# 20480133.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
Tone Detector
13
MX105A PRELIMINARY INFORMATION
6.2 Packaging
Package Tolerances
A
Z
ALTERNATIVE
PIN
LOCATION
MARKING
B
E
W
L
T
PIN 1
X
Y
C
H
J
P
K
DIM.
MIN.
TYP.
MAX.
0.395 (10.03)
0.413 (10.49)
0.286 (7.26)
0.299 (7.59)
0.093 (2.36)
0.105 (2.67)
0.390 (9.90)
0.419 (10.64)
0.003 (0.08)
0.020 (0.51)
0.013 (0.33)
0.020 (0.51)
0.041 (1.04)
0.016 (0.41)
0.050 (1.27)
0.050 (1.27)
0.009 (0.23)
0.0125 (0.32)
45°
0°
10°
7°
5°
5°
A
B
C
E
H
J
K
L
P
T
W
X
Y
Z
NOTE : All dimensions in inches (mm.)
Angles are in degrees
Figure 6: 16-pin SOIC Mechanical Outline: Order as part no. MX105ADW
Package Tolerances
DIM.
A
B
C
E
E1
H
J
J1
K
L
P
T
Y
MIN.
TYP.
MAX.
0.740 (18.80)
0.810 (20.57)
0.240 (6.10)
0.262 (6.63)
0.200 (5.06)
0.135 (3.43)
0.300 (7.62)
0.390 (9.91).
0.290 (7.37)
0.325 (8.26)
0.015 (0.38)
0.070 (1.77)
0.014 (0.35)
0.023 (0.58)
0.040 (1.02)
0.065 (1.65)
0.056 (1.42)
0.064 (1.63)
0.121 (3.07)
0.150 (3.81)
0.100 (2.54)
0.008 (0.20)
0.015 (0.38)
7e
NOTE : All dimensions in inches (mm.)
Angles are in degrees
Figure 7: 16-pin PDIP Mechanical Outline: Order as part no. MX105AP
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Doc.# 20480133.003
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Tone Detector
14
E
B
C
Package Tolerances
K
Y
DA
W
P
G
F
J
W
T
PIN 1
MX105A PRELIMINARY INFORMATION
H
DIM.
A
B
C
D
E
F
G
H
J
K
P
T
W
Y
MIN.
TYP.
MAX.
0.380 (9.61)
0.409 (10.40)
0.380 (9.61)
0.409 (10.40)
0.128 (3.25)
0.146 (3.70)
0.417 (10.60)
0.435 (11.05)
0.417 (10.60)
0.435 (11.05)
0.250 (6.35)
0.250 (6.35)
0.023 (0.58)
0.018 (0.45)
0.022 (0.55)
0.047 (1.19)
0.048 (1.22)
0.049 (1.24)
0.051 (1.30)
0.006 (0.152)
0.009 (0.22)
45°
30°
6°
NOTE : All dimensions in inches (mm.)
Angles are in degrees
Figure 8: 24-pin PLCC Mechanical Outline: Order as part no. MX105ALH
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480133.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
CML Microcircuits
COMMUNICATION SEMICONDUCTORS
CML Product Data
In the process of creating a more global image, the three standard product semiconductor
companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc
(USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst
maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA)
Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML
Microcircuits.
These companies are all 100% owned operating companies of the CML Microsystems Plc
Group and these changes are purely changes of name and do not change any underlying legal
entities and hence will have no effect on any agreements or contacts currently in force.
CML Microcircuits Product Prefix Codes
Until the latter part of 1996, the differentiator between products manufactured and sold from
MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX
respectively. These products use the same silicon etc. and today still carry the same prefixes.
In the latter part of 1996, both companies adopted the common prefix: CMX.
This notification is relevant product information to which it is attached.
CML Microcircuits (USA) [formerly MX-COM, Inc.] Product Textual Marking
On CML Microcircuits (USA) products, the ‘MX-COM’ textual logo is being replaced by a ‘CML’
textual logo.
Company contact information is as below:
CML Microcircuits
(UK)Ltd
CML Microcircuits
(USA) Inc.
CML Microcircuits
(Singapore)PteLtd
COMMUNICATION SEMICONDUCTORS
COMMUNICATION SEMICONDUCTORS
COMMUNICATION SEMICONDUCTORS
Oval Park, Langford, Maldon,
Essex, CM9 6WG, England
Tel: +44 (0)1621 875500
Fax: +44 (0)1621 875600
[email protected]
www.cmlmicro.com
4800 Bethania Station Road,
Winston-Salem, NC 27105, USA
Tel: +1 336 744 5050,
0800 638 5577
Fax: +1 336 744 5054
[email protected]
www.cmlmicro.com
No 2 Kallang Pudding Road, 09-05/
06 Mactech Industrial Building,
Singapore 349307
Tel: +65 7450426
Fax: +65 7452917
[email protected]
www.cmlmicro.com
D/CML (D)/2 May 2002
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