TI1 LM101AHLQMLV Lm101aqml operational amplifier Datasheet

LM101AQML
LM101AQML Operational Amplifiers
Literature Number: SNOSAI0
LM101AQML
Operational Amplifiers
overcompensated for increased stability margin. Or the
compensation can be optimized to give more than a
factor of ten improvement in high frequency performance
for most applications.
In addition, the device provides better accuracy and
lower noise in high impedance circuitry. The low input
currents also make it particularly well suited for long
interval integrators or timers, sample and hold circuits
and low frequency waveform generators. Further, replacing circuits where matched transistor pairs buffer the
inputs of conventional IC op amps, it can give lower offset
voltage and a drift at a lower cost.
General Description
The LM101A is a general purpose operational amplifier
which features improved performance over industry standards such as the LM709. Advanced processing techniques
make possible an order of magnitude reduction in input
currents, and a redesign of the biasing circuitry reduces the
temperature drift of input current. Improved specifications
include:
• Offset voltage 3 mV maximum over temperature
• Input current 100 nA maximum over temperature
• Offset current 20 nA maximum over temperature
• Guaranteed drift characteristics
• Offsets guaranteed over entire common mode and supply voltage ranges
• Slew rate of 10V/µs as a summing amplifier
This amplifier offers many features which make its application nearly foolproof: overload protection on the input
and output, no latch-up when the common mode range is
exceeded, and freedom from oscillations and compensation with a single 30 pF capacitor. It has advantages over
internally compensated amplifiers in that the frequency
compensation can be tailored to the particular application. For example, in low frequency circuits it can be
Features
Available with radiation guarantee
Offset voltage 3 mV maximum over temperature
Input current 100 nA maximum over temperature
Offset current 20 nA maximum over temperature
Guaranteed drift characteristics
Offsets guaranteed over entire common mode and
supply voltage ranges
n Slew rate of 10 V/µS as a summing amplifier
n
n
n
n
n
n
Ordering Information
NS Part Number
SMD Part Number
NS Package Number
Package Description
LM101AH/883
H08C
8LD Metal Can
LM101AJ/883
J08A
8LD CERDIP
LM101AW/883
W10A
10LD CERPACK
LM101AH-QMLV
5962–9951501VGA
H08C
8LD Metal Can
LM101AHLQMLV
5962L9951501VGA
50k rd(Si)
H08C
8LD Metal Can
LM101AHRQMLV
5962R9951501VGA
100k rd(Si)
H08C
8LD Metal Can
LM101AJLQMLV
5962L9951501VPA
50k rd(Si)
J08A
8LD CERDIP
LM101AJ-QMLV
5962–9951501VPA
J08A
8LD CERDIP
LM101AW-QMLV
5962–9951501VHA
W10A
10LD CERPACK
LM101AWLQMLV
5962L9951501VHA
50k rd(Si)
W10A
10LD CERPACK
© 2006 National Semiconductor Corporation
DS201223
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LM101AQML Operational Amplifiers
January 2006
LM101AQML
Schematic
(Note 11)
20122301
Connection Diagrams
(Top View)
Metal Can Package
(Top View)
Dual-In-Line Package
20122304
See NS Package Number J08A
20122302
See NS Package Number H08C
Note: Pin 4 connected to case.
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2
LM101AQML
Connection Diagrams
(Continued)
(Top View)
Ceramic Flatpack Package
20122340
See NS Package Number W10A
Fast AC/DC Converter
20122333
Note 1: Feedforward compensation can be used to make a fast full wave rectifier without a filter.
3
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LM101AQML
Absolute Maximum Ratings (Note 2)
± 22V
± 30V
± 15V
Supply Voltage
Differential Input Voltage
Input Voltage (Note 3)
Output Short Circuit Duration
Continuous
−55˚C ≤ TA ≤ +125˚C
Operating Ambient Temp. Range
TJ Max
150˚C
Power Dissipation at TA = 25˚C (Note 4)
H-Package
(Still Air)
750 mW
(500 LF / Min Air Flow)
1200 mW
J-Package
(Still Air)
1000 mW
(500 LF / Min Air Flow)
1500 mW
W-Package
(Still Air)
500mW
(500 LF / Min Air Flow)
800mW
Thermal Resistance
θJA
H-Package
(Still Air)
165˚C/W
(500 LF / Min Air Flow)
89˚C/W
J-Package
(Still Air)
128˚C/W
(500 LF / Min Air Flow)
75˚C/W
W-Package
(Still Air)
233˚C/W
(500 LF / Min Air Flow)
155˚C/W
θJC (Typical)
H-Package
39˚C/W
J-Package
26˚C/W
W-Package
26˚C/W
−65˚C ≤ TA ≤ +150˚C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
300˚C
ESD Tolerance (Note 5)
3000V
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4
LM101AQML
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Temp (˚C)
1
Static tests at
25
2
Static tests at
125
3
Static tests at
-55
4
Dynamic tests at
25
5
Dynamic tests at
125
6
Dynamic tests at
-55
7
Functional tests at
25
8A
Functional tests at
125
8B
Functional tests at
-55
9
Switching tests at
25
10
Switching tests at
125
11
Switching tests at
-55
LM101A 883 Electrical Characteristics
DC Parameters
The following conditions apply to all parameters, unless otherwise specified
VCC = ± 20V, VCM= 0V
Symbol
Parameter
Conditions
VIO
Input Offset Voltage
VCM = -15V, RS = 50Ω
Notes
VCM = 15V, RS = 50Ω
RS = 50Ω
VCC = ± 5V, RS = 50Ω
IIO
Input Offset Current
VCM = -15V
VCM = 15V
VCC = ± 5V
± IIB
Input Bias Current
VCM = -15V
VCM = 15V
VCC = ± 5V
Subgroups
Min
Max
Units
-2.0
2.0
mV
1
-3.0
3.0
mV
2, 3
-2.0
2.0
mV
1
-3.0
3.0
mV
2, 3
-2.0
2.0
mV
1
-3.0
3.0
mV
2, 3
-2.0
2.0
mV
1
-3.0
3.0
mV
2, 3
-10
10
nA
1
-20
20
nA
2, 3
-10
10
nA
1
-20
20
nA
2, 3
-10
10
nA
1
-20
20
nA
2, 3
-10
10
nA
1
-20
20
nA
2, 3
1.0
75
nA
1
1.0
100
nA
2, 3
1.0
75
nA
1
1.0
100
nA
2, 3
1.0
75
nA
1
1.0
100
nA
2, 3
1.0
75
nA
1
1.0
100
nA
2, 3
PSRR+
Power Supply Rejection Ratio
+VCC = +20V and +5V,
-VCC=-20V, RS=50Ω
80
dB
1, 2, 3
PSRR-
Power Supply Rejection Ratio
+VCC = +20V,
-VCC= -20V and -5V, RS=50Ω
80
dB
1, 2, 3
CMRR
Common Mode Rejection Ratio -15V ≤ VCM ≤ 15V, RS = 50Ω
80
dB
1, 2, 3
5
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LM101AQML
LM101A
883 Electrical Characteristics
(Continued)
DC Parameters
(Continued)
The following conditions apply to all parameters, unless otherwise specified
VCC = ± 20V, VCM= 0V
Symbol
Parameter
ICC
Supply Current
+VIO Adj
Conditions
Notes
Input Offset Voltage Adjust
Min
Max
Units
Subgroups
3.0
mA
1
2.5
mA
2
3.5
mA
3
mV
1, 2, 3
1, 2, 3
4.0
−VIO Adj
Input Offset Voltage Adjust
-4.0
mV
+IOS
Short Circuit Current
-45
-7.0
mA
1, 2, 3
-IOS
Short Circuit Current
7.0
45
mA
1, 2, 3
VI
Input Voltage Range
VCC = ± 20V
-15
15
V
1, 2, 3
+AVS
Large Signal Gain
VCC = ± 15V, RS = 0, RL=2KΩ,
VO =10V
50
V/mV
4
25
V/mV
5, 6
VCC = ± 15V, RS = 0, RL=2KΩ,
VO =-10V
50
V/mV
4
5, 6
-AVS
Large Signal Gain
RI
Input Resistance
+VOP
-VOP
Output Voltage Swing
Output Voltage Swing
(Note 6)
25
V/mV
(Note 7)
1.5
MΩ
4
(Note 7)
0.5
MΩ
5, 6
RL = 10KΩ
16
V
4, 5, 6
RL = 2KΩ
15
V
4, 5, 6
RL = 10KΩ, VCC = ± 15V
12
V
4, 5, 6
RL = 2KΩ, VCC = ± 15V
10
V
4, 5, 6
RL = 10KΩ
-16
V
4, 5, 6
RL = 2KΩ
-15
V
4, 5, 6
RL = 10KΩ, VCC = ± 15V
-12
V
4, 5, 6
-10
V
4, 5, 6
Max
Units
Subgroups
0.2
V/µS
7
RL = 2KΩ, VCC
= ± 15V
AC Parameters
The following conditions apply to all parameters, unless otherwise specified
VCC = ± 20V, RL = 2KΩ, AV = 1
Symbol
Parameter
Conditions
+SR
Slew Rate
VI = -5V to 5V
-SR
Slew Rate
VI = 5V to -5V
0.2
V/µS
7
GBW
Gain Bandwidth
VI = 50mVRMS, f = 20KHz
0.25
MHz
7
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Notes
6
Min
LM101AQML
LM101A QML & RH Electrical Characteristics
DC Parameters
(Note 10)
The following conditions apply to all parameters, unless otherwise specified
VCC = ± 20V, VCM = 0V, RS = 50Ω
Symbol
Parameter
Conditions
VIO
Input Offset Voltage
Notes
Max
Units
+VCC = 35V, -VCC = -5V,
VCM = -15V
-2.0
+2.0
mV
1
-3.0
+3.0
mV
2, 3
+VCC = 5V, -VCC = -35V,
VCM = +15V
-2.0
+2.0
mV
1
-3.0
+3.0
mV
2, 3
VCM = 0V
IIO
± IIB
Input Offset Current
Input Bias Current
-2.0
+2.0
mV
1
-3.0
+3.0
mV
2, 3
+VCC = 5V, -VCC = -5V,
VCM = 0V
-2.0
+2.0
mV
1
-3.0
+3.0
mV
2, 3
+VCC = 35V, -VCC = -5V,
VCM = -15V, RS = 100KΩ
-10
+10
nA
1, 2
-20
+20
nA
3
+VCC = 5V, -VCC = -35V,
VCM = +15V, RS = 100KΩ
-10
+10
nA
1, 2
-20
+20
nA
3
VCM = 0V, RS = 100KΩ
-10
+10
nA
1, 2
-20
+20
nA
3
+VCC = 5V, -VCC = -5V,
VCM = 0V, RS = 100KΩ
-10
+10
nA
1, 2
-20
+20
nA
3
+VCC = 35V, -VCC = -5V,
VCM = -15V, RS = 100KΩ
-0.1
75
nA
1, 2
-0.1
100
nA
3
+VCC = 5V, -VCC = -35V,
VCM = +15V, RS = 100KΩ
-0.1
75
nA
1, 2
-0.1
100
nA
3
VCM = 0V, RS = 100KΩ
-0.1
75
nA
1, 2
-0.1
100
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
+VCC = 5V, -VCC = -5V,
VCM = 0V, RS = 100KΩ
+PSRR
-PSRR
Power Supply Rejection Ratio
Power Supply Rejection Ratio
Subgroups
Min
+VCC = 10V, -VCC = -20V
+VCC = 20V, -VCC = -10V
-50
+50
µV/V
1
-100
+100
µV/V
2, 3
-50
+50
µV/V
1
-100
+100
µV/V
2, 3
CMRR
Common Mode Rejection Ratio VCC = ± 35V to ± 5V, VCM =
± 15V
80
dB
1, 2, 3
+VIO Adj
Adjustment for Input Offset
Voltage
4.0
mV
1, 2, 3
-VIO Adj
Adjustment for Input Offset
Voltage
mV
1, 2, 3
+IOS
Output Short Circuit Current
+VCC = 15V, -VCC = -15V,
t ≤ 25mS, VCM = -15V
mA
1, 2, 3
-IOS
Output Short Circuit Current
+VCC = 15V, -VCC = -15V,
t ≤ 25mS, VCM = +15V
+60
mA
1, 2, 3
ICC
Power Supply Current
+VCC = 15V, -VCC = -15V
3.0
mA
1
2.32
mA
2
∆VIO/ ∆T
∆ IIO / ∆T
-4.0
-60
3.5
mA
3
Temperature Coefficient of
Input Offset Voltage
-55˚C ≤ TA ≤ +25˚C
(Note 8)
-18
+18
µV/˚C
2
+25˚C ≤ TA ≤ +125˚C
(Note 8)
-15
+15
uV/˚C
3
Temperature Coefficient of
Input Offset Current
-55˚C ≤ TA ≤ +25˚C
(Note 8)
-200
+200
pA/˚C
2
+25˚C ≤ TA ≤ +125˚C
(Note 8)
-100
+100
pA/˚C
3
7
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LM101AQML
LM101A
QML & RH Electrical Characteristics
(Note 10)
(Continued)
DC Parameters
(Continued)
The following conditions apply to all parameters, unless otherwise specified
VCC = ± 20V, VCM = 0V, RS = 50Ω
Symbol
Parameter
Conditions
-AVS
Large Signal (Open Loop)
Voltage Gain
+AVS
Large Signal (Open Loop)
Voltage Gain
Large Signal (Open Loop)
Voltage Gain
Subgroups
V/mV
4
25
V/mV
5, 6
50
V/mV
4
V/mV
5, 6
Min
RL = 2KΩ, VO = -15V
(Note 9)
50
(Note 9)
RL = 10KΩ, VO = -15V
(Note 9)
(Note 9)
25
RL = 2KΩ, VO = +15V
Max
(Note 9)
50
V/mV
4
(Note 9)
25
V/mV
5, 6
(Note 9)
50
V/mV
4
(Note 9)
25
V/mV
5, 6
VCC = ± 5V,RL = 2KΩ,
VO = ± 2V
(Note 9)
10
V/mV
4,5, 6
VCC = ± 5V, RL = 10KΩ,
VO = ± 2V
(Note 9)
10
V/mV
4,5, 6
V
4,5, 6
V
4,5, 6
RL = 10KΩ, VO = +15V
AVS
Units
Notes
+VOP
Output Voltage Swing
RL = 10KΩ, VCM = -20V
+16
RL = 2KΩ, VCM = -20V
+15
-VOP
Output Voltage Swing
RL = 10KΩ, VCM = 20V
-16
V
4,5, 6
RL = 2KΩ, VCM = 20V
-15
V
4,5, 6
Max
Units
Subgroups
0.3
V/µS
7, 8A
0.2
V/µS
8B
0.3
V/µS
7, 8A
0.2
V/µS
8B
AC Parameters
The following conditions apply to all parameters, unless otherwise specified
VCC = ± 20V, VCM = 0V, RS = 50Ω
Symbol
Parameter
Conditions
+SR
Slew Rate
AV = 1, VI = -5V to +5V
-SR
Slew Rate
Notes
AV = 1, VI = +5V to -5V
Min
TRTR
Rise Time
AV = 1, VI = 50mV
800
nS
7, 8A, 8B
TROS
Overshoot
AV = 1, VI = 50mV
25
%
7
35
%
8A, 8B
NIBB
Noise Broadband
BW = 10Hz to 5KHz, RS = 0Ω
15
µVRMS
7
NIPC
Noise Popcorn
BW = 10Hz to 5KHz,
RS = 100KΩ
80
µVPK
7
Min
Max
Units
Subgroups
DC Parameters
Drift Values
The following conditions apply to all parameters, unless otherwise specified
VCC = ± 20V, VCM = 0V, RS = 50Ω
Delta calculations performed on QMLV devices at group B, Subgroup 5 only.
Symbol
Parameter
Conditions
VIO
Input Offset Voltage
VCM = 0V
-0.5
0.5
mV
1
± IIB
Input Bias Current
VCM = 0V, RS = 100KΩ
-7.5
7.5
nA
1
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Notes
8
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but do no guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 3: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction
to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax − TA) / θJA or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 5: Human body model, 100 pF discharged through 1.5 kΩ.
Note 6: Parameter guaranteed by the input conditions of several DC parameters
Note 7: Parameter guaranteed, not tested.
Note 8: Calculated parameter
Note 9: Datalog reading of K = V/mV.
Note 10: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics. These parts may be dose rate sensitive in a space
environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified
in Mil-Std-883, Method 1019
Note 11: Pin connections shown are for 8-pin packages.
9
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LM101AQML
Notes
LM101AQML
Typical Performance Characteristics
LM101A
Input Voltage Range
Output Swing
20122342
20122341
Voltage Gain
20122343
Supply Current
Voltage Gain
20122347
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20122348
10
LM101A
LM101AQML
Typical Performance Characteristics
(Continued)
Input Current,
LM101A
Maximum Power Dissipation
20122349
20122350
Current Limiting
Input Noise Voltage
20122351
20122352
Input Noise Current
Common Mode Rejection
20122353
20122354
11
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LM101AQML
Typical Performance Characteristics
LM101A
(Continued)
Closed Loop Output
Impedance
Power Supply Rejection
20122355
20122356
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12
(Note 11)
Single Pole Compensation
Two Pole Compensation
20122308
20122312
CS= 30 pF
CS= 30 pF
C2 = 10 C1
Open Loop Frequency
Response
Feedforward Compensation
20122316
20122309
fo= 3 MHz
Open Loop Frequency
Response
Open Loop Frequency
Response
20122317
20122313
13
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LM101AQML
Typical Performance Characteristics for Various Compensation Circuits
LM101AQML
Typical Performance Characteristics for Various Compensation Circuits
(Note 11) (Continued)
Large Signal Frequency
Response
Large Signal Frequency
Response
20122314
20122310
Large Signal Frequency
Response
Voltage Follower Pulse
Response
20122318
20122311
Voltage Follower Pulse
Response
Inverter Pulse Response
20122315
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20122319
14
(Note 11)
LM101AQML
Typical Applications
Inverting Amplifier
with Balancing Circuit
Variable Capacitance Multiplier
20122320
20122323
†May be zero or equal to parallel combination of R1 and R2 for minimum
Simulated Inductor
offset.
Sine Wave Oscillator
20122321
L . R1 R2 C1
RS = R2
RP = R1
Fast Inverting Amplifier
with High Input Impedance
20122324
fo = 10 kHz
Integrator with Bias Current Compensation
20122322
20122325
*Adjust for zero integrator drift. Current drift typically 0.1 nA/˚C over −55˚C
to +125˚C temperature range.
15
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LM101AQML
Application Hints (Note 11)
Protecting Against Gross
Fault Conditions
20122326
*Protects input
†Protects output
‡ Protects output — not needed when R4 is used.
Compensating for Stray Input Capacitances
or Large Feedback Resistor
20122327
Isolating Large Capacitive Loads
20122328
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16
Typical Applications
LM101AQML
Although the LM101A is designed for trouble free operation,
experience has indicated that it is wise to observe certain
precautions given below to protect the devices from abnormal operating conditions. It might be pointed out that the
advice given here is applicable to practically any IC op amp,
although the exact reason why may differ with different devices.
(Note 11)
Standard Compensation and
Offset Balancing Circuit
When driving either input from a low-impedance source, a
limiting resistor should be placed in series with the input lead
to limit the peak instantaneous output current of the source
to something less than 100 mA. This is especially important
when the inputs go outside a piece of equipment where they
could accidentally be connected to high voltage sources.
Large capacitors on the input (greater than 0.1 µF) should be
treated as a low source impedance and isolated with a
resistor. Low impedance sources do not cause a problem
unless their output voltage exceeds the supply voltage. However, the supplies go to zero when they are turned off, so the
isolation is usually needed.
The output circuitry is protected against damage from shorts
to ground. However, when the amplifier output is connected
to a test point, it should be isolated by a limiting resistor, as
test points frequently get shorted to bad places. Further,
when the amplifer drives a load external to the equipment, it
is also advisable to use some sort of limiting resistance to
preclude mishaps.
Precautions should be taken to insure that the power supplies for the integrated circuit never become
reversed — even under transient conditions. With reverse
voltages greater than 1V, the IC will conduct excessive current, fusing internal aluminum interconnects. If there is a
possibility of this happening, clamp diodes with a high peak
current rating should be installed on the supply lines. Reversal of the voltage between V+ and V− will always cause a
problem, although reversals with respect to ground may also
give difficulties in many circuits.
The minimum values given for the frequency compensation
capacitor are stable only for source resistances less than
10 kΩ, stray capacitances on the summing junction less than
5 pF and capacitive loads smaller than 100 pF. If any of
these conditions are not met, it becomes necessary to overcompensate the amplifier with a larger compensation capacitor. Alternately, lead capacitors can be used in the feedback
network to negate the effect of stray capacitance and large
feedback resistors or an RC network can be added to isolate
capacitive loads.
Although the LM101A is relatively unaffected by supply bypassing, this cannot be ignored altogether. Generally it is
necessary to bypass the supplies to ground at least once on
every circuit card, and more bypass points may be required
if more than five amplifiers are used. When feed-forward
compensation is employed, however, it is advisable to bypass the supply leads of each amplifier with low inductance
capacitors because of the higher frequencies involved.
20122329
Fast Voltage Follower
20122331
Power Bandwidth: 15 kHz
Slew Rate: 1V/µs
Fast Summing Amplifier
20122330
Power Bandwidth: 250 kHz
Small Signal Bandwiidth: 3.5 MHz
Slew Rate: 10V/µs
17
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LM101AQML
Typical Applications (Note 11)
(Continued)
Bilateral Current Source
20122332
R3 = R4 + R5
R1 = R2
Fast AC/DC Converter (Note 12)
20122333
Note 12: Feedforward compensation can be used to make a fast full wave rectifier without a filter.
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18
LM101AQML
Typical Applications (Note 11)
(Continued)
Instrumentation Amplifier
20122334
R1 = R4; R2 = R3
*,† Matching determines CMRR.
Voltage Comparator for Driving RTL Logic or High
Current Driver
Integrator with Bias Current Compensation
20122337
20122335
*Adjust for zero integrator drift. Current drift typically 0.1 nA/˚C over 0˚C to
+70˚C temperature range.
19
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LM101AQML
Typical Applications (Note 11)
(Continued)
Low Frequency Square Wave Generator
20122336
Voltage Comparator for Driving
DTL or TTL Integrated Circuits
Low Drift Sample and Hold
20122339
20122338
*Polycarbonate-dielectric capacitor
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20
Date
Released
01/05/06
Revision
A
Section
Originator
Changes
New Release to corporate format
L. Lytle
2 MDS datasheets converted into one Corp.
datasheet format. MNLM101A-X Rev 0A0
and MRLM101A-X-RH rev 1C2 MDS
datasheets will be archived.
21
www.national.com
LM101AQML
Revision History Section
LM101AQML
Physical Dimensions
inches (millimeters) unless otherwise noted
Metal Can Package (H)
NS Package Number H08C
Ceramic Dual-In-Line Package (J)
NS Package Number J08A
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22
LM101AQML Operational Amplifiers
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Ceramic Flatpack Package (W)
NS Package Number W10A
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