Siemens BGA310 Silicon bipolar mmic-amplifier (cascadable 50 w-gain block 9 db typical gain at 1.0 ghz 9 dbm typical p-1db at 1.0 ghz 3 db-bandwidth: dc to 2.4 ghz) Datasheet

BGA 310
Silicon Bipolar MMIC-Amplifier
Preliminary data
3
• Cascadable 50 Ω-gain block
• 9 dB typical gain at 1.0 GHz
4
• 9 dBm typical P -1dB at 1.0 GHz
• 3 dB-bandwidth: DC to 2.4 GHz
2
1
RF OUT/Bias
1
RF IN
VPS05178
3
Circuit Diagram
2, 4
GND
EHA07312
Type
Marking Ordering Code
BGA 310 BLs
Q62702-G0041
Pin Configuration
Package
1 RFout/bias 2 GND 3 RF input 4 GND SOT-143
Maximum Ratings
Parameter
Symbol
Device current
Value
Unit
ID
60
mA
Total power dissipation, T S ≤ 99 °C
Ptot
250
mW
RF input power
PRFin
10
dBm
Junction temperature
Tj
150
°C
Ambient temperature
TA
-65 ...+150
Storage temperature
T stg
-65 ...+150
RthJS
≤ 205
Thermal Resistance
Junction - soldering point
1)
K/W
1) TS is measured on the collector lead at the soldering point to the pcb
Semiconductor Group
Semiconductor Group
11
Sep-04-1998
1998-11-01
BGA 310
Electrical Characteristics at TA = 25 °C, unless otherwise specified.
Symbol
Values
Parameter
min.
typ.
Unit
max.
AC characteristics (VD = 4.7 V, Zo = 50 Ω)
|S21| 2
Insertion power gain
dB
f = 0.1 GHz
-
10
-
f = 1 GHz
-
9
-
f = 1.8 GHz
-
8
-
-
+-0.5
-
f = 0.1 GHz
-
6
-
f = 1 GHz
-
6.5
-
f = 2 GHz
-
7
-
P-1dB
-
9
-
dBm
RL in
-
20
-
dB
RL out
-
15
-
∆ |S 21|2
Insertion point gain flatness
f = 0.1 GHz to 0.6 GHz
Noise figure
NF
1dB compression point
f = 1 GHz
Return loss input
f = 0.1 GHz to 2 GHz
Return loss output
f = 0.1 GHz to 3 GHz
Typical biasing configuration
min. VCC = 7 V
R Bias
ΙD
RFC (optional)
C Block
IN
4
3
C Block
1
RBias = VCC - VD / ID
OUT
VD
VD = 4.7V
2
EHA07313
Semiconductor Group
Semiconductor Group
22
Sep-04-1998
1998-11-01
BGA 310
S-Parameters at T A = 25 °C
f
S11
GHz
MAG
S21
ANG
VD = 4.7 V, Z o = 50Ω
0.01
0.051
176.4
0.1
0.053
168.1
0.3
0.053
141.9
0.5
0.058
123.9
0.8
0.054
98.2
1
0.049
86.1
1.8
0.053
-164.9
2.4
0.161
-177.7
3
0.257
153.9
S12
S22
MAG
ANG
MAG
ANG
MAG
ANG
3.22
3.23
3.22
3.2
3.17
3.12
2.79
2.41
2.03
179.3
174.9
164.6
154.2
138.7
128.4
88
60.8
38.2
0.149
0.149
0.15
0.152
0.157
0.162
0.188
0.208
0.225
0.2
1.2
3.4
5.4
8.1
9.7
12
10.6
8.2
0.159
0.158
0.157
0.155
0.153
0.153
0.16
0.168
0.178
-0.5
-6.1
-19
-31.7
-51.3
-64.3
-106.6
-123.7
-133.1
Insertion power gain |S21|2 = f ( f )
Noise figure NF = f ( f )
VD = 4.7 V, ID = 42 mA
VD = 4.7 V, ID = 42 mA
25
10
dB
NF
|S21|2
dB
15
6
10
4
5
2
0 -1
10
10
0
GHz
10
0 -1
10
1
f
Semiconductor Group
Semiconductor Group
10
0
GHz
10
1
f
33
Sep-04-1998
1998-11-01
BGA 310
Output power 1-dB-gain compression
P-1dB = f ( f )
VD = 4.7 V, I D = 42 mA
25
P -1dB
dBm
15
10
5
0 -1
10
10
0
GHz
10
1
f
Semiconductor Group
Semiconductor Group
44
Sep-04-1998
1998-11-01
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