Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 1/ 10 CYStech Electronics Corp. N-Channel Enhancement Mode Power MOSFET MTN9N65CE3 BVDSS ID @ VGS=10V, TC=25°C 650V RDSON(TYP) @ VGS=10V, ID=5.4A 9A 0.65Ω Description The MTN9N65CE3 is a N-channel enhancement-mode MOSFET, providing the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. The TO-220 package is universally preferred for all commercial-industrial applications Features • Low On Resistance • Simple Drive Requirement • Low Gate Charge • Fast Switching Characteristic • RoHS compliant package Applications • Power Factor Correction • LCD TV Power • Full and Half Bridge Power Ordering Information Device MTN9N65CE3-0-UB-X Package TO-220 (RoHS compliant package) Shipping 50 pcs/tube, 20 tubes/box, 4 boxes / carton Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, UB : 50 pcs / tube, 20 tubes/box Product rank, zero for no rank products Product name MTN9N65CE3 CYStek Product Specification Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 2/ 10 CYStech Electronics Corp. Symbol Outline TO-220 MTN9N65CE3 GDS G：Gate D：Drain S：Source Absolute Maximum Ratings (TC=25°C) Parameter Drain-Source Voltage (Note 1) Gate-Source Voltage Continuous Drain Current @VGS=10V, TC=25°C Continuous Drain Current @VGS=10V, TC=100°C Pulsed Drain Current (Note 2) Single Pulse Avalanche Current @ L=0.1mH Single Pulse Avalanche Energy @ L=5mH, ID=6Amps, VDD=50V (Note 3) Repetitive Avalanche Energy Maximum Temperature for Soldering @ Lead at 0.063 in(1.6mm) from case for 10 seconds Maximum Temperature for Soldering @ Package Body for 10 seconds Total Power Dissipation (TC=25℃) Linear Derating Factor Operating Junction and Storage Temperature Symbol Limits VDS VGS IDM IAS 650 ±30 9 5.7 36 9 EAS 90 EAR 18.5 TL 300 TPKG 260 PD 185 1.48 -55~+150 ID Tj, Tstg Unit V A mJ °C W W/°C °C *Drain current limited by maximum junction temperature Note : 1. TJ=+25℃ to +150℃. 2. Pulse width limited by maximum junction temperature. 3. 100% tested by conditions of L=5mH, IAS=3.6A, VGS=10V, VDD=50V. MTN9N65CE3 CYStek Product Specification Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 3/ 10 CYStech Electronics Corp. Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max Symbol Rth,j-c Rth,j-a Value 0.68 62.5 Unit °C/W Characteristics (Tj=25°C, unless otherwise specified) Symbol Min. Static BVDSS 650 ∆BVDSS/∆Tj VGS(th) 2.0 *GFS IGSS IDSS IDSS *RDS(ON) Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf Ciss Coss Crss Source-Drain Diode *VSD *IS *ISM *trr *Qrr - Typ. Max. Unit Test Conditions 0.7 11.6 0.65 4.0 ±100 1 10 0.85 V V/°C V S nA Ω VGS=0V, ID=250μA Reference to 25°C, ID=250μA VDS = VGS, ID=250μA VDS =15V, ID=5A VGS=±30V VDS =650V, VGS =0V VDS =520V, VGS =0V, Tj=125°C VGS =10V, ID=5.4A 35.4 8.2 10.3 18.2 8 47.8 9.8 1689 138 25 - nC ID=9A, VDD=325V, VGS=10V ns VDD=325V, ID=9A, VGS=10V, RG=2.7Ω pF VGS=0V, VDS=25V, f=1MHz 0.82 415 3.6 1.2 9 36 622 5.4 V IS=9A, VGS=0V μA A ns μC VGS=0V, IF=9A, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% MTN9N65CE3 CYStek Product Specification Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 4/ 10 CYStech Electronics Corp. Typical Characteristics Brekdown Voltage vs Ambient Temperature Typical Output Characteristics 1.4 20 BVDSS, Normalized Drain-Source Breakdown Voltage 10V,9V,8V,7V,6V ID, Drain Current(A) 16 5.5 V 12 8 5V 4 1.2 1.0 0.8 ID=250μA, VGS=0V VGS=4.5V 0.6 0 0 10 20 30 VDS, Drain-Source Voltage(V) 40 -75 50 -50 -25 50 75 100 125 150 175 Drain Current vs Gate-Source Voltage 30 1000 900 VGS=10V 800 Ta=25°C 25 ID, Drain Current(A) R DS(ON) , Static Drain-Source OnState Resistance(mΩ) 25 TA, Ambient Temperature(°C) Static Drain-Source On-State resistance vs Drain Current 700 600 500 400 300 200 VDS=30V 20 15 VDS=10V 10 5 100 0 0 0.01 0.1 1 10 ID, Drain Current(A) 0 100 2 4 6 8 VGS, Gate-Source Voltage(V) 10 Forward Drain Current vs Source-Drain Voltage Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 2000 1800 1600 IF, Forward Current(A) RDS(ON), Static Drain-Source On-State Resistance(mΩ) 0 1400 1200 1000 800 600 400 ID=5.4A 200 Ta=25°C VGS=0V 10 1 Ta=150°C Ta=25°C 0.1 0.01 0.001 0 0 2 4 6 VGS, Gate-Source Voltage(V) MTN9N65CE3 8 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD, Source Drain Voltage(V) CYStek Product Specification Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 5/ 10 CYStech Electronics Corp. Typical Characteristics(Cont.) Capacitance vs Reverse Voltage Static Drain-Source On-resistance vs Ambient Temperature 10000 RDS(ON), Normalized Static Drain-Source On-state Resistance 3.0 Ciss Capacitance(pF) 1000 100 Coss 10 Crss f=1MHz 1 ID=5.4A, VGS=10V 2.5 2.0 1.5 1.0 0.5 RDS(ON) @Tj=25°C:0.65Ω typ. 0.0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage(V) 30 -75 -50 -25 Gate Charge Characteristics Maximum Safe Operating Area 10 10 μs 10 VDS=130V 100μs VGS, Gate-Source Voltage(V) ID, Drain Current(A) 100 RDS(ON) Limited 1ms 10ms 100ms 1 DC TC=25°C, Tj(max)=150°C VGS=10V, RθJC=0.68°C/W Single pulse 0.1 0 25 50 75 100 125 150 175 TA, Ambient Temperature(°C) 8 VDS=325V 6 VDS=520V 4 2 ID=9A 0 0.01 1 10 100 0 1000 4 8 VDS, Drain-Source Voltage(V) 20 24 28 32 36 40 Threshold Voltage vs Junction Tempearture VGS(th), Normalized Threshold Voltage 12 ID, Maximum Drain Current(A) 16 Qg, Total Gate Charge(nC) Maximum Drain Current vs Case Temperature 10 8 6 4 2 12 VGS=10V, RθJC=0.68°C/W 1.4 1.2 ID=1mA 1 0.8 0.6 ID=250μA 0.4 0.2 0 25 50 75 100 125 TC, Case Temperature(°C) MTN9N65CE3 150 175 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) CYStek Product Specification Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 6/ 10 CYStech Electronics Corp. Typical Characteristics(Cont.) Forward Transfer Admittance vs Drain Current Single Pulse Power Rating, Junction to Case 2000 1800 TJ(MAX) =150°C TC=25°C RθJC=0.68°C/W 1600 10 1400 Power (W) GFS , Forward Transfer Admittance(S) 100 1 VDS=15V 0.1 0.01 0.1 ID, Drain Current(A) 1 1000 800 600 Ta=25°C Pulsed 0.01 0.001 1200 400 200 10 0 0.0001 0.001 0.01 0.1 Pulse Width(s) 1 10 Transient Thermal Response Curves 1 r(t), Normalized Effective Transient Thermal Resistance D=0.5 0.2 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=0.68 ° C/W 0.1 0.1 0.05 0.02 0.01 Single Pulse 0.01 1.E-05 MTN9N65CE3 1.E-04 1.E-03 1.E-02 1.E-01 t1, Square Wave Pulse Duration(s) 1.E+00 1.E+01 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 7/ 10 Test Circuit and Waveforms MTN9N65CE3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 8/ 10 Test Circuit and Waveforms(Cont.) MTN9N65CE3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 9/ 10 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTN9N65CE3 CYStek Product Specification Spec. No. : C078E3 Issued Date : 2016.02.26 Revised Date : 2016.03.02 Page No. : 10/ 10 CYStech Electronics Corp. TO-220 Dimension Marking: 4 Device Name Date Code CYS 9N65C □□□□ 1 3-Lead TO-220 Plastic Package CYStek Package Code: E3 2 3 Style: Pin 1.Gate 2.Drain 3.Source 4.Drain *: Typical Millimeters Min. Max. 4.400 4.600 2.250 2.550 0.710 0.910 1.170 1.370 0.330 0.650 1.200 1.400 10.250 9.910 9.750 8.950 12.650 12.950 DIM A A1 b b1 c c1 D E E1 Inches Min. Max. 0.173 0.181 0.089 0.100 0.028 0.036 0.046 0.054 0.013 0.026 0.047 0.055 0.404 0.390 0.384 0.352 0.510 0.498 DIM e e1 F H h L L1 V Φ Millimeters Min. Max. 2.540* 4.980 5.180 2.650 2.950 8.100 7.900 0.000 0.300 12.900 13.400 2.850 3.250 7/500 REF 3.400 3.800 Inches Min. Max. 0.100* 0.196 0.204 0.104 0.116 0.319 0.311 0.000 0.012 0.508 0.528 0.112 0.128 0.295 REF 0.134 0.150 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTN9N65CE3 CYStek Product Specification