AD LTC6409 Differential amplifier/adc driver Datasheet

LTC6409
10GHz GBW, 1.1nV/√Hz
Differential Amplifier/ADC Driver
FEATURES
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DESCRIPTION
10GHz Gain-Bandwidth Product
88dB SFDR at 100MHz, 2VP-P
1.1nV/√Hz Input Noise Density
Input Range Includes Ground
External Resistors Set Gain (Min 1V/V)
3300V/µs Differential Slew Rate
52mA Supply Current
2.7V to 5.25V Supply Voltage Range
Fully Differential Input and Output
Adjustable Output Common Mode Voltage
Low Power Shutdown
Small 10-Lead 3mm × 2mm × 0.75mm QFN Package
The LTC®6409 is a very high speed, low distortion, differential amplifier. Its input common mode range includes
ground, so that a ground-referenced input signal can be
DC-coupled, level-shifted, and converted to drive an ADC
differentially.
The gain and feedback resistors are external, so that the
exact gain and frequency response can be tailored to each
application. For example, the amplifier could be externally
compensated in a no-overshoot configuration, which is
desired in certain time-domain applications.
The LTC6409 is stable in a differential gain of 1. This
allows for a low output noise in applications where gain
is not desired. It draws 52mA of supply current and has
a hardware shutdown feature which reduces current consumption to 100µA.
APPLICATIONS
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Differential Pipeline ADC Driver
High Speed Data-Acquisition Cards
Automated Test Equipment
Time Domain Reflectometry
Communications Receivers
The LTC6409 is available in a compact 3mm × 2mm
10-pin leadless QFN package and operates over a –40°C
to 125°C temperature range.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of
Analog Devices, Inc. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
DC-Coupled Interface from a Ground-Referenced Single-Ended
Input to an LTC2262-14 ADC
LTC6409 Driving LTC2262-14 ADC,
fIN = 70MHz, –1dBFS,
fS = 150MHz, 4096-Point FFT
1.3pF
VIN
150Ω
150Ω
1.8V
– +
VOCM = 0.9V
LTC6409
+ –
33.2Ω
10Ω
33.2Ω
10Ω
39pF
AIN+
VDD
LTC2262-14 ADC
AIN–
GND
AMPLITUDE (dBFS)
39pF
3.3V
0
VS = 3.3V
–10 V
OUTDIFF = 1.8VP-P
–20 HD2 = –86.5dBc
HD3 = –89.4dBc
–30
SFDR = 81.6dB
–40 SNR = 71.1dB
–50
–60
–70
–80
–90
150Ω
–100
150Ω
6409 TA01
–110
–120
1.3pF
0
10
20
30
40
50
FREQUENCY (MHz)
60
70
6409 TA01b
6409fb
For more information www.linear.com/LTC6409
1
LTC6409
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
ORDER INFORMATION
2
V+
V–
9
8
11,V–
3
4
5
VOCM
+IN
10
V+
1
SHDN
–OUT
V–
TOP VIEW
Total Supply Voltage (V+ – V–) .................................5.5V
Input Current (+IN, –IN, VOCM, SHDN)
(Note 2) ................................................................ ±10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range
(Note 4).................................................. –40°C to 125°C
Specified Temperature Range
(Note 5).................................................. –40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range .................. –65°C to 150°C
7
+OUT
6
–IN
UDB PACKAGE
10-LEAD (3mm × 2mm) PLASTIC QFN
TJMAX = 150°C, θJA = 138°C/W, θJC = 5.2°C/W
EXPOSED PAD (PIN 11) CONNECTED TO V–
http://www.linear.com/product/LTC6409#orderinfo
Lead Free Finish
TAPE AND REEL (MINI)
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LTC6409CUDB#TRMPBF
LTC6409CUDB#TRPBF
LFPF
10-Lead (3mm × 2mm) Plastic QFN
0°C to 70°C
LTC6409IUDB#TRMPBF
LTC6409IUDB#TRPBF
LFPF
10-Lead (3mm × 2mm) Plastic QFN
–40°C to 85°C
LTC6409HUDB#TRMPBF LTC6409HUDB#TRPBF
LFPF
10-Lead (3mm × 2mm) Plastic QFN –40°C to 125°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open. VS is
defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL PARAMETER
VOSDIFF
CONDITIONS
Differential Offset Voltage (Input Referred)
VS = 3V
VS = 3V
VS = 5V
VS = 5V
ΔVOSDIFF Differential Offset Voltage Drift (Input Referred)
ΔT
MIN
TYP
MAX
UNITS
±300
±1000
±1200
±1100
±1400
µV
µV
µV
µV
l
±300
l
VS = 3V
VS = 5V
l
l
2
2
IB
Input Bias Current (Note 6)
VS = 3V
VS = 5V
l
l
IOS
Input Offset Current (Note 6)
VS = 3V
VS = 5V
l
l
RIN
Input Resistance
Common Mode
Differential Mode
165
860
–140
–160
µV/°C
µV/°C
–62
–70
0
0
µA
µA
±2
±2
±10
±10
µA
µA
kΩ
Ω
CIN
Input Capacitance
Differential Mode
0.5
pF
en
Differential Input Noise Voltage Density
f = 1MHz, Not Including RI/RF Noise
1.1
nV/√Hz
in
Input Noise Current Density
f = 1MHz, Not Including RI/RF Noise
8.8
pA/√Hz
NF
Noise Figure at 100MHz
Shunt-Terminated to 50Ω, RS = 50Ω, RI = 25Ω,
RF = 10kΩ
6.9
dB
6409fb
2
For more information www.linear.com/LTC6409
LTC6409
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open. VS is
defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
nV/√Hz
enVOCM
Common Mode Noise Voltage Density
f = 10MHz
VICMR
(Note 7)
Input Signal Common Mode Range
VS = 3V
VS = 5V
l
l
0
0
CMRRI
(Note 8)
Input Common Mode Rejection Ratio
(Input Referred) ΔVICM/ΔVOSDIFF
VS = 3V, VICM from 0V to 1.5V
VS = 5V, VICM from 0V to 3.5V
l
l
75
75
90
90
dB
dB
CMRRIO Output Common Mode Rejection Ratio (Input
(Note 8) Referred) ΔVOCM/ΔVOSDIFF
VS = 3V, VOCM from 0.5V to 1.5V
VS = 5V, VOCM from 0.5V to 3.5V
l
l
55
60
80
85
dB
dB
PSRR
(Note 9)
VS = 2.7V to 5.25V
l
60
85
dB
VS = 2.7V to 5.25V
l
55
70
dB
l
2.7
Differential Power Supply Rejection (ΔVS/ΔVOSDIFF)
PSRRCM Output Common Mode Power Supply Rejection
(Note 9) (ΔVS/ΔVOSCM)
VS
Supply Voltage Range (Note 10)
12
1.5
3.5
5.25
V
V
V
GCM
Common Mode Gain (ΔVOUTCM/ΔVOCM)
VS = 3V, VOCM from 0.5V to 1.5V
VS = 5V, VOCM from 0.5V to 3.5V
l
l
1
1
ΔGCM
Common Mode Gain Error, 100 × (GCM – 1)
VS = 3V, VOCM from 0.5V to 1.5V
VS = 5V, VOCM from 0.5V to 3.5V
l
l
±0.1
±0.1
±0.3
±0.3
%
%
BAL
Output Balance
(ΔVOUTCM/ ΔVOUTDIFF)
ΔVOUTDIFF = 2V
Single-Ended Input
Differential Input
l
l
–65
–70
–50
–50
dB
dB
VOSCM
Common Mode Offset Voltage (VOUTCM – VOCM)
VS = 3V
VS = 5V
l
l
±1
±1
±5
±6
mV
mV
ΔVOSCM
ΔT
Common Mode Offset Voltage Drift
l
4
VS = 3V
VS = 5V
VOUTCMR Output Signal Common Mode Range
(Note 7) (Voltage Range for the VOCM Pin)
RINVOCM Input Resistance, VOCM Pin
0.5
0.5
l
30
V
V
40
50
kΩ
1.6
V
V
l
0.9
0.85
1.25
Output Voltage, High, Either Output Pin
VS = 3V, IL = 0
VS = 3V, IL = –20mA
VS = 5V, IL = 0
VS = 5V, IL = –20mA
l
l
l
l
1.85
1.8
3.85
3.8
2
1.95
4
3.95
Output Voltage, Low, Either Output Pin
VS = 3V, 5V; IL = 0
VS = 3V, 5V; IL = 20mA
l
l
ISC
Output Short-Circuit Current, Either Output Pin
(Note 11)
VS = 3V
VS = 5V
l
l
AVOL
Large-Signal Open Loop Voltage Gain
IS
Supply Current
VOUT
0.06
0.2
±50
±70
µV/°C
1.5
3.5
VS = 3V, VOCM = Open
VS = 5V, VOCM = Open
VOCM
Self-Biased Voltage at the VOCM Pin
l
l
V/V
V/V
V
V
V
V
0.15
0.4
V
V
±70
±95
mA
mA
65
dB
52
l
56
58
mA
mA
ISHDN
Supply Current in Shutdown
VSHDN ≤ 0.6V
l
RSHDN
SHDN Pull-Up Resistor
VSHDN = 0V to 0.5V
l
VIL
SHDN Input Logic Low
l
VIH
SHDN Input Logic High
l
tON
Turn-On Time
160
ns
tOFF
Turn-Off Time
80
ns
115
100
500
µA
150
185
kΩ
0.6
V
1.4
V
6409fb
For more information www.linear.com/LTC6409
3
LTC6409
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open. VS is
defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL PARAMETER
CONDITIONS
MIN
SR
Slew Rate
Differential Output, VOUTDIFF = 4VP-P
+OUT Rising (–OUT Falling)
+OUT Falling (–OUT Rising)
GBW
Gain-Bandwidth Product
RI = 25Ω, RF = 10kΩ, fTEST = 100MHz
l
9.5
8
TYP
MAX
UNITS
3300
1720
1580
V/µs
V/µs
V/µs
10
GHz
GHz
f–3dB
–3dB Frequency
RI = RF = 150Ω, RLOAD = 400Ω, CF = 1.3pF
2
GHz
f0.1dB
Frequency for 0.1dB Flatness
RI = RF = 150Ω, RLOAD = 400Ω , CF = 1.3pF
600
MHz
FPBW
Full Power Bandwidth
VOUTDIFF = 2VP-P
550
MHz
HD2
HD3
25MHz Distortion
Differential Input, VOUTDIFF = 2VP-P,
RI = RF = 150Ω, RLOAD = 400Ω
2nd Harmonic
3rd Harmonic
–104
–106
dBc
dBc
Differential Input, VOUTDIFF = 2VP-P,
RI = RF = 150Ω, RLOAD = 400Ω
2nd Harmonic
3rd Harmonic
–93
–88
dBc
dBc
Single-Ended Input, VOUTDIFF = 2VP-P,
RI = RF = 150Ω, RLOAD = 400Ω
2nd Harmonic
3rd Harmonic
–101
–103
dBc
dBc
Single-Ended Input, VOUTDIFF = 2VP-P,
RI = RF = 150Ω, RLOAD = 400Ω
2nd Harmonic
3rd Harmonic
–88
–93
dBc
dBc
100MHz Distortion
HD2
HD3
25MHz Distortion
100MHz Distortion
IMD3
3rd Order IMD at 25MHz
f1 = 24.9MHz, f2 = 25.1MHz
VOUTDIFF = 2VP-P Envelope, RI = RF = 150Ω,
RLOAD = 400Ω
–110
dBc
3rd Order IMD at 100MHz
f1 = 99.9MHz, f2 = 100.1MHz
VOUTDIFF = 2VP-P Envelope, RI = RF = 150Ω,
RLOAD = 400Ω
–98
dBc
3rd Order IMD at 140MHz
f1 = 139.9MHz, f2 = 140.1MHz
VOUTDIFF = 2VP-P Envelope, RI = RF = 150Ω,
RLOAD = 400Ω
–88
dBc
59
53
48
dBm
dBm
dBm
1.9
ns
OIP3
Equivalent OIP3 at 25MHz (Note 12)
Equivalent OIP3 at 100MHz (Note 12)
Equivalent OIP3 at 140MHz (Note 12)
tS
Settling Time
VOUTDIFF = 2VP-P Step, RI = RF = 150Ω,
RLOAD = 400Ω
1% Settling
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input pins (+IN, –IN, VOCM, and SHDN) are protected by steering
diodes to either supply. If the inputs should exceed either supply voltage,
the input current should be limited to less than 10mA. In addition, the
inputs +IN, –IN are protected by a pair of back-to-back diodes. If the
differential input voltage exceeds 1.4V, the input current should be limited
to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4: The LTC6409C/LTC6409I are guaranteed functional over the
temperature range of –40°C to 85°C. The LTC6409H is guaranteed
functional over the temperature range of –40°C to 125°C.
Note 5: The LTC6409C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6409C is designed, characterized and expected to
meet specified performance from –40°C to 85°C, but is not tested or
QA sampled at these temperatures. The LTC6409I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6409H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 6: Input bias current is defined as the average of the input currents
flowing into the inputs (–IN and +IN). Input offset current is defined as the
difference between the input currents (IOS = IB+ – IB–).
6409fb
4
For more information www.linear.com/LTC6409
LTC6409
ELECTRICAL CHARACTERISTICS
Note 7: Input common mode range is tested by testing at both VICM = 1.25V
and at the Electrical Characteristics table limits to verify that the differential
offset (VOSDIFF) and the common mode offset (VOSCM) have not deviated by
more than ±1mV and ±2mV respectively from the VICM = 1.25V case.
The voltage range for the output common mode range is tested by
applying a voltage on the VOCM pin and testing at both VOCM = 1.25V and
at the Electrical Characteristics table limits to verify that the common
mode offset (VOSCM) has not deviated by more than ±6mV from the
VOCM = 1.25V case.
Note 8: Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins +IN or –IN to the change in differential
input referred offset voltage. Output CMRR is defined as the ratio of
the change in the voltage at the VOCM pin to the change in differential
input referred offset voltage. This specification is strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs and it is difficult to measure actual amplifier performance (See
Effects of Resistor Pair Mismatch in the Applications Information section
of this data sheet). For a better indicator of actual amplifier performance
independent of feedback component matching, refer to the PSRR
specification.
Note 9: Differential power supply rejection (PSRR) is defined as the ratio
of the change in supply voltage to the change in differential input referred
offset voltage. Common mode power supply rejection (PSRRCM) is
defined as the ratio of the change in supply voltage to the change in the
output common mode offset voltage.
Note 10: Supply voltage range is guaranteed by power supply rejection
ratio test.
Note 11: Extended operation with the output shorted may cause the
junction temperature to exceed the 150°C limit.
Note 12: Refer to Relationship Between Different Linearity Metrics in the
Applications Information section of this data sheet for information on how
to calculate an equivalent OIP3 from IMD3 measurements.
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Input Offset Voltage
vs Temperature
Differential Input Offset Voltage
vs Input Common Mode Voltage
2.0
0.5
0
TA = 85°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = –40°C
–0.5
–0.5
–50
–25
0
25
75
50
TEMPERATURE (°C)
100
125
–1.0
30
25
15
10
5
0
TA = 125°C
TA = 85°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = –40°C
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (V)
6409 G04
TOTAL SUPPLY CURRENT (mA)
TOTAL SUPPLY CURRENT (mA)
35
1.0
0.5
0
–0.5
–50
4
–25
0
25
75
50
TEMPERATURE (°C)
100
140
50
45
40
35
30
25
TA = 125°C
TA = 85°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = –40°C
20
15
10
5
0
0
0.5
1
1.5 2 2.5 3 3.5
SHDN VOLTAGE (V)
4
4.5
125
6409 G03
Shutdown Supply Current vs
Supply Voltage
VS = 5V
55
40
VS = 5V
VOCM = VICM = 1.25V
RI = RF = 150Ω
FIVE REPRESENTATIVE UNITS
1.5
Supply Current vs SHDN Voltage
60
45
0.5 1 1.5 2 2.5 3 3.5
INPUT COMMON MODE VOLTAGE (V)
2.0
6409 G02
VSHDN = OPEN
50
20
0
6409 G01
Supply Current vs Supply Voltage
55
COMMON MODE OFFSET VOLTAGE (mV)
0.5 VS = 5V
VOCM = VICM = 1.25V
RI = RF = 150Ω
FIVE REPRESENTATIVE UNITS
0
SHUTDOWN SUPPLY CURRENT (µA)
1.0
2.5
VS = 5V
VOCM = 1.25V
1.5 RI = RF = 150Ω
0.1% FEEDBACK NETWORK RESISTORS
REPRESENTATIVE UNIT
1.0
DIFFERENTIAL VOS (mV)
DIFFERENTIAL VOS (mV)
1.5
60
Common Mode Offset Voltage
vs Temperature
5
6409 G05
120
100
TA = 125°C
TA = 85°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = –40°C
80
60
40
20
0
VSHDN = V–
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (V)
6409 G06
6409fb
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5
LTC6409
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Output Voltage Noise
vs Frequency
10
1
1
1k
1M
FREQUENCY (Hz)
100
100
in
10
10
en
1
1G
1
1000
1000
VS = 5V
1
1G
1k
1M
FREQUENCY (Hz)
OUTPUT IMPEDANCE (Ω)
100
1000
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
VS = 5V
RI = RF = 150Ω
INCLUDES RI/RF NOISE
INPUT CURRENT NOISE DENSITY (pA/√Hz)
VOLTAGE NOISE DENSITY (nV/√Hz)
1000
Differential Output Impedance
vs Frequency
Input Noise Density vs Frequency
VS = 5V
RI = RF = 150Ω
100
10
1
0.1
0.01
1
10
100
1000
FREQUENCY (MHz)
6409 G09
6409 G18
6409 G07
CMRR vs Frequency
Differential PSRR vs Frequency
100
10000
Small Signal Step Response
90
80
–OUT
70
80
PSRR (dB)
CMRR (dB)
90
70
VS = 5V
60 VOCM = 1.25V
RI = RF = 150Ω, CF = 1.3pF
0.1% FEEDBACK NETWORK
RESISTORS
50
1
10
100
1000
FREQUENCY (MHz)
60
20mV/DIV
50
+OUT
VS = 5V
VOCM = VICM = 1.25V
RLOAD = 400Ω
40
30
RI = RF = 150Ω, CF = 1.3pF
CL = 0pF
VIN = 200mVP-P, DIFFERENTIAL
20
10000
10
VS = 5V
1
10
100
1000
FREQUENCY (MHz)
10000
6409 G10
2ns/DIV
6409 G12
6409 G11
Overdriven Output Transient
Response
Large Signal Step Response
4.0
3.5
–OUT
–OUT
VOLTAGE (V)
3.0
0.2V/DIV
2.5
2.0
1.5
+OUT
VS = 5V
VOCM = 1.25V
RLOAD = 200Ω TO
GROUND PER
OUTPUT
1.0
VS = 5V
RLOAD = 400Ω
VIN = 2VP-P, DIFFERENTIAL
2ns/DIV
0.5
+OUT
6409 G13
0
20ns/DIV
6409 G14
6409fb
6
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LTC6409
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Response vs Closed
Loop Gain
50
40
GAIN (dB)
30
20
10
0
20
AV = 400
AV = 100
AV (V/V) RI (Ω)
1
2
5
10
20
100
400
AV = 20
AV = 10
AV = 5
AV = 2
AV = 1
–10
VS = 5V
–20 VOCM = VICM = 1.25V
RLOAD = 400Ω
–30
1
10
100
1000
FREQUENCY (MHz)
150
100
50
50
25
25
25
CL = 0pF
CL = 0.5pF
CL = 1pF
CL = 1.5pF
CL = 2pF
10
RF (Ω) CF (pF)
150
1.3
200
1
250
0.8
500
0.4
500
0.4
2.5k
0
10k
0
GAIN (dB)
60
Frequency Response vs Load
Capacitance
10000
0
–10 VS = 5V
VOCM = VICM = 1.25V
RLOAD = 400Ω
–20 RI = RF = 150Ω, CF = 1.3pF
CAPACITOR VALUES ARE FROM
EACH OUTPUT TO GROUND.
NO SERIES RESISTORS ARE USED.
–30
10
100
1000
FREQUENCY (MHz)
6409 G15
Gain 0.1dB Flatness
Slew Rate vs Temperature
0.5
3400
0.4
3375
0.3
SLEW RATE (V/µs)
GAIN (dB)
VS = 5V
3350
0.2
0.1
0
–0.1
–0.2
3325
3300
3275
3250
VS = 5V
VOCM = VICM = 1.25V
–0.4 RLOAD = 400Ω
RI = RF = 150Ω, CF = 1.3pF
–0.5
1
10
100
1000
FREQUENCY (MHz)
–0.3
3225
3200
–50
10000
–25
0
25
50
75
TEMPERATURE (°C)
6409 G17
Harmonic Distortion vs Output
Common Mode Voltage
–30
–40
HD3
–50
DISTORTION (dBc)
DISTORTION (dBc)
–50
–80
HD2
–90
–100
–70
–80
–100
1
10
100
FREQUENCY (MHz)
1000
6409 G19
–110
0.5
125
6409 G08
–80
VS = 5V
fIN = 100MHz
RLOAD = 400Ω
RI = RF = 150Ω
VOUTDIFF = 2VP-P
DIFFERENTIAL INPUTS
HD3
–90
–110
–120
–60
100
Harmonic Distortion vs Input
Amplitude
DISTORTION (dBc)
Harmonic Distortion vs Frequency
VS = 5V
VOCM = VICM = 1.25V
–60 R
LOAD = 400Ω
RI = RF = 150Ω
–70 VOUTDIFF = 2VP-P
DIFFERENTIAL INPUTS
10000
6409 G16
VS = 5V
VOCM = VICM = 1.25V
fIN = 100MHz
RLOAD = 400Ω
–90
RI = RF = 150Ω
DIFFERENTIAL INPUTS
HD3
HD2
–100
–110
HD2
1
1.5
2
2.5
3
3.5
OUTPUT COMMON MODE VOLTAGE (V)
6409 G20
–120
–2
–4
(0.4VP-P)
0
2
4
6
INPUT AMPLITUDE (dBm)
8
10
(2VP-P)
6409 G21
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7
LTC6409
TYPICAL PERFORMANCE CHARACTERISTICS
Harmonic Distortion vs Output
Common Mode Voltage
–30
VS = 5V
VOCM = VICM = 1.25V
–60 R
LOAD = 400Ω
RI = RF = 150Ω
–70 VOUTDIFF = 2VP-P
SINGLE-ENDED INPUT
–50
–80
–90
HD2
–100
–60
–70
–80
HD2
10
100
FREQUENCY (MHz)
–110
0.5
1000
THIRD ORDER IMD (dBc)
THIRD ORDER IMD (dBc)
–110
8
10
(2VP-P)
Intermodulation Distortion vs
Input Amplitude
–30
–50
–100
0
2
4
6
INPUT AMPLITUDE (dBm)
6409 G24
Intermodulation Distortion vs
Output Common Mode Voltage
–90
RLOAD = 400Ω
RI = RF = 150Ω
SINGLE-ENDED INPUT
6409 G23
Intermodulation Distortion vs
Frequency
–120
–120
–2
–4
(0.4VP-P)
1
1.5
2
2.5
3
3.5
OUTPUT COMMON MODE VOLTAGE (V)
6409 G22
VS = 5V
VOCM = VICM = 1.25V
–60 R
LOAD = 400Ω
RI = RF = 150Ω
–70 2 TONES, 200kHz TONE
SPACING, 2VP-P COMPOSITE
–80 DIFFERENTIAL INPUTS
HD3
–110
–80
VS = 5V
–40 fIN = 100MHz
RLOAD = 400Ω
RI = RF = 150Ω
–50
2 TONES, 200kHz TONE
SPACING, 2VP-P COMPOSITE
–60
DIFFERENTIAL INPUTS
THIRD ORDER IMD (dBc)
1
HD2
–100
HD3
–100
HD3
VS = 5V
VOCM = VICM = 1.25V
fIN = 100MHz
–90
–90
–110
–120
–80
VS = 5V
fIN = 100MHz
RLOAD = 400Ω
RI = RF = 150Ω
VOUTDIFF = 2VP-P
SINGLE-ENDED INPUT
–40
DISTORTION (dBc)
DISTORTION (dBc)
–50
Harmonic Distortion vs Input
Amplitude
DISTORTION (dBc)
Harmonic Distortion vs Frequency
–70
–80
–90
VS = 5V
VOCM = VICM = 1.25V
fIN = 100MHz
RLOAD = 400Ω
–90
RI = RF = 150Ω
2 TONES, 200kHz TONE SPACING
DIFFERENTIAL INPUTS
–100
–110
–100
10
100
FREQUENCY (MHz)
1000
–110
0.5
1
1.5
2
2.5
3
3.5
OUTPUT COMMON MODE VOLTAGE (V)
6409 G25
–120
2
(0.8VP-P)
4
6
8
INPUT AMPLITUDE (dBm)
6409 G26
10
(2VP-P)
6409 G27
PIN FUNCTIONS
+IN, –IN (Pins 2, 6): Non-Inverting and Inverting Input
Pins.
SHDN (Pin 3): When SHDN is floating or directly tied to
V+, the LTC6409 is in the normal (active) operating mode.
When the SHDN pin is connected to V–, the part is disabled and draws approximately 100µA of supply current.
V+, V– (Pins 4, 9 and Pins 8, 10): Positive and Negative
Power Supply Pins. Similar pins should be connected to
the same voltage.
VOCM (Pin 5): Output Common Mode Reference Voltage.
The voltage on this pin sets the output common mode
voltage level. If left floating, an internal resistor divider
develops a default voltage of 1.25V with a 5V supply.
+OUT, –OUT (Pins 7, 1): Differential Output Pins.
Exposed Pad (Pin 11): Tie the bottom pad to V–. If split
supplies are used, DO NOT tie the pad to ground.
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LTC6409
BLOCK DIAGRAM
2
1
+IN
–OUT
V–
3
SHDN
V+
10
V–
V+
+
200k
V+
5
VOCM
–
50k
V–
V–
V+
4
9
V+
V–
V+
8
V–
6
–IN
7
+OUT
6409 BD
APPLICATIONS INFORMATION
Functional Description
The LTC6409 is a small outline, wideband, high speed,
low noise, and low distortion fully-differential amplifier
with accurate output phase balancing. The amplifier is
optimized to drive low voltage, single-supply, differential
input analog-to-digital converters (ADCs). The LTC6409
input common mode range includes ground, which makes
it ideal to DC-couple and convert ground-referenced,
single-ended signals into differential signals that are referenced to the user-supplied output common mode voltage. This is ideal for driving these differential ADCs. The
balanced differential nature of the amplifier also provides
even-order harmonic distortion cancellation, and low
susceptibility to common mode noise (like power supply noise). The LTC6409 can operate with a single-ended
input and differential output, or with a differential input
and differential output.
The outputs of the LTC6409 are capable of swinging from
close-to-ground to 1V below V+. They can source or sink
up to approximately 70mA of current. Load capacitances
should be decoupled with at least 10Ω of series resistance
from each output.
Input Pin Protection
The LTC6409 input stage is protected against differential
input voltages which exceed 1.4V by two pairs of series
diodes connected back to back between +IN and –IN.
Moreover, the input pins, as well as VOCM and SHDN
pins, have clamping diodes to either power supply. If
these pins are driven to voltages which exceed either
supply, the current should be limited to 10mA to prevent
damage to the IC.
SHDN Pin
The SHDN pin is a CMOS logic input with a 150k internal pull-up resistor. If the pin is driven low, the LTC6409
powers down. If the pin is left unconnected or driven
high, the part is in normal active operation. Some care
should be taken to control leakage currents at this pin to
prevent inadvertently putting the LTC6409 into shutdown.
The turn-on and turn-off time between the shutdown and
active states is typically less than 200ns.
General Amplifier Applications
In Figure 1, the gain to VOUTDIFF from VINP and VINM is
given by:
VOUTDIFF = V+OUT – V–OUT ≈
RF
• ( VINP – VINM )
RI
(1)
Note from Equation (1), the differential output voltage
(V+OUT – V–OUT) is completely independent of input and
output common mode voltages, or the voltage at the common mode pin. This makes the LTC6409 ideally suited
for pre-amplification, level shifting and conversion of
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LTC6409
APPLICATIONS INFORMATION
RI
V+IN
RF
V–OUT
+
VINP
–
+
VVOCM
+
VCM
VOCM
–
VICM =
–
–
VINM
+
RI
V–IN
RF
6409 F01
V+OUT
Figure 1. Circuit for Common Mode Range
single-ended signals to differential output signals for
driving differential input ADCs.
Output Common Mode and VOCM Pin
The output common mode voltage is defined as the average of the two outputs:
VOUTCM = VOCM =
that can be processed is even wider. The input common
mode range at the op amp inputs depends on the circuit
configuration (gain), VOCM and VCM (refer to Figure 1). For
fully differential input applications, where VINP = –VINM,
the common mode input is approximately:
V+OUT + V–OUT
2
As the equation shows, the output common mode voltage
is independent of the input common mode voltage, and
is instead determined by the voltage on the VOCM pin, by
means of an internal common mode feedback loop.
If the VOCM pin is left open, an internal resistor divider
develops a default voltage of 1.25V with a 5V supply. The
VOCM pin can be overdriven to another voltage if desired.
For example, when driving an ADC, if the ADC makes a
reference available for setting the common mode voltage,
it can be directly tied to the VOCM pin, as long as the ADC
is capable of driving the 40k input resistance presented
by the VOCM pin. The Electrical Characteristics table specifies the valid range that can be applied to the VOCM pin
(VOUTCMR).
V+IN + V–IN
RI
RF
≈ VOCM •
+ VCM •
2
RI + RF
RI + RF
With single-ended inputs, there is an input signal component to the input common mode voltage. Applying only
VINP (setting VINM to zero), the input common mode voltage is approximately:
V+IN + V–IN
RI
≈ VOCM •
+
2
RI + RF
RF
V
RF
VCM •
+ INP •
RI + RF
2 RI + RF
VICM =
This means that if, for example, the input signal (VINP)
is a sine, an attenuated version of that sine signal also
appears at the op amp inputs.
Input Impedance and Loading Effects
The low frequency input impedance looking into the VINP
or VINM input of Figure 1 depends on how the inputs are
driven. For fully differential input sources (VINP = –VINM),
the input impedance seen at either input is simply:
RINP = RINM = RI
For single-ended inputs, because of the signal imbalance
at the input, the input impedance actually increases over
the balanced differential case. The input impedance looking into either input is:
RINP = RINM =
Input Common Mode Voltage Range
The LTC6409’s input common mode voltage (VICM) is
defined as the average of the two input pins, V+IN and
V–IN. The valid range that can be used for VICM has been
specified in the Electrical Characteristics table (VICMR).
However, due to external resistive divider action of the
gain and feedback resistors, the effective range of signals
(2)
RI
1–
1
RF
•
2 RI + RF
Input signal sources with non-zero output impedances
can also cause feedback imbalance between the pair of
feedback networks. For the best performance, it is recommended that the input source output impedance be
compensated. If input impedance matching is required
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APPLICATIONS INFORMATION
by the source, a termination resistor RT should be chosen
(see Figure 2) such that:
RI2
VINP
V–OUT
+
VOCM
–
–
According to Figure 2, the input impedance looking into
the differential amp (RINM) reflects the single-ended
source case, given above. Also, R2 is chosen as:
VINM
+
RI1
V–IN
RF1
6409 F03
V+OUT
Figure 3. Real-World Application with Feedback
Resistor Pair Mismatch
R T • RS
R T + RS
Δb is defined as the difference in the feedback factors:
RINM
RI
∆b =
RF
RT
VS
–
VVOCM
RS
RF2
+
R
•R
R T = INM S
RINM – RS
R2 = R T || RS =
V+IN
RT CHOSEN SO THAT RT || RINM = RS
R2 CHOSEN TO BALANCE RT || RS
RI
–
+
+
–
RI2
RI1
–
RI2 + RF2 RI1 + RF1
Here, VCM and VINDIFF are defined as the average and
the difference of the two input voltages VINP and VINM,
respectively:
RF
6409 F02
R2 = RS || RT
VCM =
VINP + VINM
2
VINDIFF = VINP – VINM
Figure 2. Optimal Compensation for Signal Source Impedance
Effects of Resistor Pair Mismatch
Figure 3 shows a circuit diagram which takes into consideration that real world resistors will not match perfectly.
Assuming infinite open loop gain, the differential output
relationship is given by the equation:
VOUTDIFF = V+OUT – V–OUT ≈ VINDIFF •
VCM •
RF
+
RI
∆b
∆b
– VOCM •
b AVG
b AVG
where RF is the average of RF1, and RF2, and RI is the
average of RI1, and RI2.
bAVG is defined as the average feedback factor from the
outputs to their respective inputs:
b AVG =
1  RI1
RI2 
•
+
2  RI1 + RF1 RI2 + RF2 
When the feedback ratios mismatch (Δb), common mode
to differential conversion occurs. Setting the differential
input to zero (VINDIFF = 0), the degree of common mode
to differential conversion is given by the equation:
VOUTDIFF = V+OUT – V–OUT ≈ (VCM – VOCM ) •
∆b
(3)
b AVG
In general, the degree of feedback pair mismatch is a
source of common mode to differential conversion of
both signals and noise. Using 0.1% resistors or better
will mitigate most problems and will provide about 54dB
worst case of common mode rejection. A low impedance
ground plane should be used as a reference for both the
input signal source and the VOCM pin.
There may be concern on how feedback factor mismatch
affects distortion. Feedback factor mismatch from using
1% resistors or better, has a negligible effect on distortion. However, in single supply level shifting applications
where there is a voltage difference between the input common mode voltage and the output common mode voltage,
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11
LTC6409
APPLICATIONS INFORMATION
resistor mismatch can make the apparent voltage offset
of the amplifier appear worse than specified.
enRI2
RI
RF
in+2
The apparent input referred offset induced by feedback
factor mismatch is derived from Equation (3):
VOSDIFF(APPARENT) ≈ (VCM – VOCM) • Δb
+
Using the LTC6409 in a single 5V supply application with
0.1% resistors, the input common mode grounded, and
the VOCM pin biased at 1.25V, the worst case mismatch
can induce 1.25mV of apparent offset voltage.
–
in–2
enRI2
If the circuits surrounding the amplifier are well balanced,
common mode noise (enVOCM) of the amplifier does not
appear in the differential output noise equation given
above. A plot of this equation and a plot of the noise
generated by the feedback components for the LTC6409
are shown in Figure 5.
The LTC6409’s input referred voltage noise contributes
the equivalent noise of a 75Ω resistor. When the feedback
network is comprised of resistors whose values are larger
than this, the output noise is resistor noise and amplifier
current noise dominant. For feedback networks consisting of resistors with values smaller than 75Ω, the output
noise is voltage noise dominant (see Figure 5).
eni2
RI
RF
enRF2
6409 F04
Figure 4. Simplified Noise Model
1000
NOISE DENSITY (nV/√Hz)
eno


2
 e •  1+ RF   + 2 • (i • R ) 2 +
n
F

 ni 
RI  


=
2

R 
2 •  enRI • F  + 2 • enRF 2
RI 

eno2
VOCM
Noise and Noise Figure
The LTC6409’s differential input referred voltage and
current noise densities are 1.1nV/√Hz and 8.8pA/√Hz,
respectively. In addition to the noise generated by the
amplifier, the surrounding feedback resistors also contribute noise. A simplified noise model is shown in Figure 4.
The output noise generated by both the amplifier and the
feedback components is given by the equation:
enRF2
100
TOTAL (AMPLIFIER AND
FEEDBACK NETWORK)
OUTPUT NOISE
10
FEEDBACK
NETWORK
NOISE
1
0.1
10
100
1000
RI = RF (Ω)
10000
6409 F05
Figure 5. LTC6409 Output Noise vs Noise
Contributed by Feedback Network Alone
Lower resistor values always result in lower noise at the
penalty of increased distortion due to increased loading
by the feedback network on the output. Higher resistor
values will result in higher output noise, but typically
improved distortion due to less loading on the output.
For this reason, when LTC6409 is configured in a differential gain of 1, using feedback resistors of at least 150Ω
is recommended.
To calculate noise figure (NF), a source resistance and the
noise it generates should also come into consideration.
Figure 6 shows a noise model for the amplifier which
includes the source resistance (RS). To generalize the
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APPLICATIONS INFORMATION
enRI2
RI
RF
Finally, noise figure can be obtained as:
enRF2

eno2

NF = 10log  1+

eno2(RS)

in+2
RS
RT
+
eno2
VOCM
enRS2
in–2
enRT2
enRI2
–
eni2
RI
RF
enRF2
6409 F06
Figure 6. A More General Noise Model Including
Source and Termination Resistors
calculation, a termination resistor (RT) is included and
its noise contribution is taken into account.
Now, the total output noise power (excluding the noise
contribution of RS) is calculated as:
eno






RF
2 =  e •  1+
 ni 


 R +  R T || RS 

I 


2 


2


  + 2 • (i • R ) 2 +
n
F


 

2





RF
 +2•e

2 •  enRI •
nRF



||
R
R

S 
RI +  T


2  



2
RF 
2RI || RS


•
 enRT •



RI  R T + ( 2RI || RS )  


2
+
Meanwhile, the output noise power due to noise of RS is
given by:
eno
2

RF

=
(RS)  e nRS •

RI


2
2RI || R T


•
 RS + ( 2RI || R T )  







Figure 7 specifies the measured total output noise (eno),
excluding the noise contribution of source resistance, and
noise figure (NF) of LTC6409 configured at closed loop
gains (AV = RF /RI) of 1V/V, 2V/V and 5V/V. The circuits
in the left column use termination resistors and transformers to match to the 50Ω source resistance, while the
circuits in the right column do not have such matching.
For simplicity, DC-blocking and bypass capacitors have
not been shown in the circuits, as they do not affect the
noise results.
Relationship Between Different Linearity Metrics
Linearity is, of course, an important consideration in many
amplifier applications. This section relates the inter-modulation distortion of fully differential amplifiers to other
linearity metrics commonly used in RF style blocks.
Intercept points are specifications that have long been
used as key design criteria in the RF communications
world as a metric for the intermodulation distortion
performance of a device in the signal chain (e.g., amplifiers, mixers, etc.). Intercept points, like noise figures,
can be easily cascaded back and forth through a signal
chain to determine the overall performance of a receiver
chain, thus resulting in simpler system-level calculations.
Traditionally, these systems use primarily single-ended RF
amplifiers as gain blocks designed to operate in a 50Ω
environment, just like the rest of the receiver chain. Since
intercept points are given in dBm, this implies an associated impedance of 50Ω.
However, for LTC6409 as a differential feedback amplifier
with low output impedance, a 50Ω resistive load is not
required (unlike an RF amplifier). This distinction is important when evaluating the intercept point for LTC6409. In
fact, the LTC6409 yields optimum distortion performance
when loaded with 200Ω to 1kΩ (at each output), very
similar to the input impedance of an ADC. As a result,
terminating the input of the ADC to 50Ω can actually be
detrimental to system performance.
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13
LTC6409
APPLICATIONS INFORMATION
1.3pF
150Ω
1:4
VIN
600Ω
+
–
150Ω
+
50Ω
150Ω
VIN
1:4
NF = 10.43dB
VIN
VOCM
+
–
–
100Ω
1pF
0.4pF
0.8pF
50Ω
eno = 11.69nV/√Hz
NF = 8.81dB
–
500Ω
VIN
VOCM
+
–
–
50Ω
0.4pF
NF = 16.66dB
250Ω
+
50Ω
eno = 9.76nV/√Hz
200Ω
1pF
500Ω
NF = 17.59dB
200Ω
+
50Ω
200Ω
VOCM
100Ω
100Ω
eno = 5.77nV/√Hz
eno = 5.88nV/√Hz
150Ω
1pF
+
+
–
150Ω
1pF
–
50Ω
–
1.3pF
VOCM
100Ω
VOCM
+
–
1.3pF
+
+
–
VIN
200Ω
100Ω
VIN
NF = 14.41dB
150Ω
+
50Ω
150Ω
100Ω
1:4
150Ω
eno = 4.70nV/√Hz
VOCM
–
50Ω
1.3pF
250Ω
eno = 14.23nV/√Hz
NF = 13.56dB
6409 F07
0.8pF
Figure 7. LTC6409 Measured Output Noise and Noise Figure at Different Closed Loop Gains with and without Source Impedance Matching
The definition of 3rd order intermodulation distortion
(IMD3) is shown in Figure 8. Also, a graphical representation of how to relate IMD3 to output/input 3rd
order intercept points (OIP3/IIP3) has been depicted in
Figure 9. Based on this figure, Equation (4) gives the
definition of the intercept point, relative to the intermodulation distortion.
IMD3
OIP3 = PO +
2
(4)
PO is the output power of each of the two tones at which
IMD3 is measured, as shown in Figure 9. It is calculated
in dBm as:
 V 2 PDIFF 

PO = 10log 
–3 
2
•
R
•
10
L


(5)
where RL is the differential load resistance, and VPDIFF is
the differential peak voltage for a single tone. Normally,
intermodulation distortion is specified for a benchmark
composite differential peak of 2VP-P at the output of the
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LTC6409
APPLICATIONS INFORMATION
results in a lower intercept point. Therefore, it is important to consider the impedance seen by the output of the
LTC6409 when working with intercept points.
∆f = f2 – f1 = f1 – (2f1 – f2) = (2f2 – f1) – f2
PO
POWER
PO
Comparing linearity specifications between different
amplifier types becomes easier when a common impedance level is assumed. For this reason, the intercept
points for LTC6409 are reported normalized to a 50Ω
load impedance. This is the reason why OIP3 in the
Electrical Characteristics table is 4dBm more than half
the absolute value of IMD3.
IMD3 = PS – PO
PS
PS
2f1 – f2 f1
f2
2f2 – f1
FREQUENCY
6409 F08
Figure 8. Definition of IMD3
POUT
(dBm)
If the top half of the LTC6409 demo board (DC1591A,
shown in Figure 12) is used to measure IMD3 and OIP3,
one should make sure to properly convert the power seen
at the differential output of the amplifier to the power that
appears at the single-ended output of the demo board.
Figure 10 shows an equivalent representation of the top
half of the demo board. This view ignores the DC-blocking
and bypass capacitors, which do not affect the analysis
here. The transmission line transformers (used mainly
for impedance matching) are modeled here as ideal 4:1
impedance transformers together with a –1dB block. This
separates the insertion loss of the transformer from its
ideal behavior. The 100Ω resistors at the LTC6409 output
create a differential 200Ω resistance, which is an impedance match for the reflected RL.
1×
OIP3
PO
PS
IMD3
IIP3
3×
PIN
(dBm)
6409 F10
Figure 9. Graphical Representation of the
Relationship between IMD3 and OIP3
As previously mentioned, IMD3 is measured for 2VP-P differential peak (i.e. 10dBm) at the output of the LTC6409,
corresponding to 1VP-P (i.e. 4dBm) at each output alone.
From LTC6409 output (location A in Figure 10) to the
input of the output transformer (location B), there is
a voltage attenuation of 1/2 (or –6dB) formed by the
amplifier, implying that each single tone is 1VP-P, resulting in VPDIFF = 0.5V. Using RL = 50Ω as the associated
impedance, PO is calculated to be close to 4dBm.
As seen in Equation (5), when a higher impedance is used,
the same level of intermodulation distortion performance
CF
RF
RS
50Ω
+
–
VS
RT
1dB
LOSS
100Ω
RI
IDEAL
1:4
RT
LTC6409
A
100Ω
RI
C
B
IDEAL
4:1
1dB
LOSS
RL
50Ω
6409 F10
RF
CF
Figure 10. Equivalent Schematic of the Top Half of the LTC6409 Demo Board
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15
LTC6409
APPLICATIONS INFORMATION
resistive divider between the RL • 4 = 200Ω differential
resistance seen at location B and the 200Ω formed by
the two 100Ω matching resistors at the LTC6409 output.
Thus, the differential power at location B is 10 – 6 = 4dBm.
Since the transformer ratio is 4:1 and it has an insertion
loss of about 1dB, the power at location C (across RL) is
calculated to be 4 – 6 – 1 = –3dBm. This means that IMD3
should be measured while the power at the output of the
demo board is –3dBm which is equivalent to having 2VP-P
differential peak (or 10dBm) at the output of the LTC6409.
GBW vs f–3dB
Gain-bandwidth product (GBW) and –3dB frequency
(f–3dB) have been both specified in the Electrical
Characteristics table as two different metrics for the speed
of the LTC6409. GBW is obtained by measuring the gain
of the amplifier at a specific frequency (fTEST) and calculate gain • fTEST. To measure gain, the feedback factor
(i.e. b = RI/(RI + RF)) is chosen sufficiently small so that
the feedback loop does not limit the available gain of the
LTC6409 at fTEST, ensuring that the measured gain is the
open loop gain of the amplifier. As long as this condition
is met, GBW is a parameter that depends only on the
internal design and compensation of the amplifier and is
a suitable metric to specify the inherent speed capability
of the amplifier.
f–3dB, on the other hand, is a parameter of more practical interest in different applications and is by definition
the frequency at which the gain is 3dB lower than its low
frequency value. The value of f–3dB depends on the speed
of the amplifier as well as the feedback factor. Since the
LTC6409 is designed to be stable in a differential signal
gain of 1 (where RI = RF or b = 1/2), the maximum f–3dB
is obtained and measured in this gain setting, as reported
in the Electrical Characteristics table.
In most amplifiers, the open loop gain response exhibits a
conventional single-pole roll-off for most of the frequencies before crossover frequency and the GBW and f–3dB
numbers are close to each other. However, the LTC6409
is intentionally compensated in such a way that its GBW
is significantly larger than its f–3dB. This means that at
lower frequencies (where the input signal frequencies
typically lie, e.g. 100MHz) the amplifier’s gain and thus
the feedback loop gain is larger. This has the important
advantage of further linearizing the amplifier and improving distortion at those frequencies.
Looking at the Frequency Response vs Closed Loop Gain
graph in the Typical Performance Characteristics section
of this data sheet, one sees that for a closed loop gain
(AV) of 1 (where RI = RF = 150Ω), f–3dB is about 2GHz.
However, for AV = 400 (where RI = 25Ω and RF = 10kΩ),
the gain at 100MHz is close to 40dB = 100V/V, implying
a GBW value of 10GHz.
Feedback Capacitors
When the LTC6409 is configured in low differential gains,
it is often advantageous to utilize a feedback capacitor (CF)
in parallel with each feedback resistor (RF). The use of CF
implements a pole-zero pair (in which the zero frequency
is usually smaller than the pole frequency) and adds positive phase to the feedback loop gain around the amplifier.
Therefore, if properly chosen, the addition of CF boosts
the phase margin and improves the stability response of
the feedback loop. For example, with RI = RF = 150Ω, it is
recommended for most general applications to use CF =
1.3pF across each RF. This value has been selected to
maximize f–3dB for the LTC6409 while keeping the peaking
of the closed loop gain versus frequency response under
a reasonable level (<1dB). It also results in the highest
frequency for 0.1dB gain flatness (f0.1dB).
However, other values of CF can also be utilized and tailored
to other specific applications. In general, a larger value
for CF reduces the peaking (overshoot) of the amplifier in
both frequency and time domains, but also decreases the
closed loop bandwidth (f–3dB). For example, while for a
closed loop gain (AV) of 5, CF = 0.8pF results in maximum
f–3dB (as previously shown in the Frequency Response vs
Closed Loop Gain graph of this data sheet), if CF = 1.2pF
is used, the amplifier exhibits no overshoot in the time
domain which is desirable in certain applications. Both the
circuits discussed in this section have been shown in the
Typical Applications section of this data sheet.
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For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
Board Layout and Bypass Capacitors
Driving ADCs
For single supply applications, it is recommended that
high quality 0.1µF||1000pF ceramic bypass capacitors
be placed directly between each V+ pin and its closest
V– pin with short connections. The V– pins (including the
Exposed Pad) should be tied directly to a low impedance
ground plane with minimal routing.
The LTC6409’s ground-referenced input, differential output and adjustable output common mode voltage make
it ideal for interfacing to differential input ADCs. These
ADCs are typically supplied from a single-supply voltage
and have an optimal common mode input range near midsupply. The LTC6409 interfaces to these ADCs by providing single-ended to differential conversion and common
mode level shifting.
For dual (split) power supplies, it is recommended that
additional high quality 0.1µF||1000pF ceramic capacitors be used to bypass V+ pins to ground and V– pins to
ground, again with minimal routing.
For driving heavy differential loads (<200Ω), additional
bypass capacitance may be needed for optimal performance. Keep in mind that small geometry (e.g., 0603)
surface mount ceramic capacitors have a much higher
self-resonant frequency than do leaded capacitors, and
perform best in high speed applications.
To prevent degradation in stability response, it is highly
recommended that any stray capacitance at the input
pins, +IN and –IN, be kept to an absolute minimum by
keeping printed circuit connections as short as possible.
This becomes especially true when the feedback resistor
network uses resistor values greater than 500Ω in circuits
with RI = RF.
At the output, always keep in mind the differential nature
of the LTC6409, because it is critical that the load impedances seen by both outputs (stray or intended), be as balanced and symmetric as possible. This will help preserve
the balanced operation of the LTC6409 that minimizes the
generation of even-order harmonics and maximizes the
rejection of common mode signals and noise.
The VOCM pin should be bypassed to the ground plane
with a high quality ceramic capacitor of at least 0.01µF.
This will prevent common mode signals and noise on this
pin from being inadvertently converted to differential signals and noise by impedance mismatches both externally
and internally to the IC.
The sampling process of ADCs creates a transient that is
caused by the switching in of the ADC sampling capacitor. This momentarily shorts the output of the amplifier
as charge is transferred between amplifier and sampling
capacitor. The amplifier must recover and settle from this
load transient before the acquisition period has ended, for
a valid representation of the input signal. The LTC6409
will settle quickly from these periodic load impulses. The
RC network between the outputs of the driver and the
inputs of the ADC decouples the sampling transient of
the ADC (see Figure 11). The capacitance serves to provide the bulk of the charge during the sampling process,
while the two resistors at the outputs of the LTC6409
are used to dampen and attenuate any charge injected
by the ADC. The RC filter gives the additional benefit of
band limiting broadband output noise. Generally, longer
time constants improve SNR at the expense of settling
time. The resistors in the decoupling network should be
at least 10Ω. These resistors also serve to decouple the
LTC6409 outputs from load capacitance. Too large of a
resistor will leave insufficient settling time. Too small of
a resistor will not properly dampen the load transient of
the sampling process, prolonging the time required for
settling. In 16-bit applications, this will typically require
a minimum of eleven RC time constants. For lowest distortion, choose capacitors with low dielectric absorption
(such as a C0G multilayer ceramic capacitor).
6409fb
For more information www.linear.com/LTC6409
17
LTC6409
APPLICATIONS INFORMATION
1.3pF
VIN
150Ω
150Ω
2
+IN
33.2Ω
1
–OUT
LTC6409
SHDN
SHDN
V–
3
CONTROL
V–
10
V+
5V
V+
4
0.1µF||1000pF
V+
V+
VOCM
9
5V
0.1µF||1000pF
V
VOCM
V–
5
6
150Ω
–IN
150Ω
7
–
AIN+
39pF
39pF
LTC2262-14
ADC
10Ω
–
0.1µF
10Ω
0.1µF||1000pF
+
AIN–
VCM GND VDD
D13
•
•
D0
1.8V
1µF
8
+OUT
1µF
6409 F11
33.2Ω
100Ω
1.3pF
Figure 11. Driving an ADC
6409fb
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For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
R5
150Ω, 0.1%
C22
1.3pF
V+
J1
IN
T1
TCM4-19
1:4
XFMR MINI-CIRCUITS
Sd 3
R14
0Ω
4
C23
0.1µF
6 Pd
R13
OPT
C25
0.1µF
CT 2
4
P
1
S
R9
150Ω, 0.1%
C24
0.1µF
2
5
R10
150Ω, 0.1%
R12
300Ω
6
3
R11
300Ω
VCM
C32
0.1µF
R15
OPT
R16
OPT
9
V+
1
+IN
VOCM
SHDN
R3
100Ω
C19
0.1µF
LTC6409UDB
–
V–
V
V–
11
10
8
+OUT
7
T2
TCM4-19
4:1
XFMR MINI-CIRCUITS
1
S
C18
0.1µF
–OUT
–IN
E2
V+
E4
VOCM
V+
C29
0.1µF
P
R1
0Ω
4
2 CT
3
R2
OPT
Pd 6
Sd
J2
OUT
R4
100Ω
C26
0.1µF
C28
0.1µF
SHDN1
1
DIS
2
3
EN
R17
10Ω
C27
1.3pF
R8
150Ω, 0.1%
JP1
CALIBRATION PATH
T3
TCM4-19
1:4
XFMR MINI-CIRCUITS
Sd 3
R18
0Ω
J3
CAL IN
C31
0.1µF
6 Pd
C30
0.1µF
CT 2
R19
OPT
4
P
C20
0.1µF
1
S
R21
75Ω
R20
300Ω
R24
75Ω
T4
TCM4-19
4:1
XFMR MINI-CIRCUITS
1
S
C14
0.1µF
R22
300Ω
R23
300Ω
C15
0.1µF
P
C21
0.1µF
R27
0Ω
4
2 CT
3
R26
OPT
Pd 6
Sd
R25
300Ω
C1
100pF
R28
150Ω, 0.1%
C2
0.01µF
C13
1.3pF
V+
4
J5
+IN
J6
–IN
R31
0Ω
R37
0Ω
V+
R33
150Ω, 0.1%
2
R32
OPT
R39 VOCM
150Ω, 0.1%
R38
OPT
C16
0.1µF
5
6
3
C3
0.1µF
9
V+
1
+IN
VOCM
SHDN
R34
50Ω
–OUT
LTC6409UDB
–IN
V–
V–
V–
11
10
8
+OUT
7
R40
50Ω
R36
0Ω
R35
OPT
R6
OPT
R7
0Ω
C4
0.47µF
J7
–OUT
C5
100pF
V+
C6
0.01µF
E1
V+
J8
+OUT
R30
10Ω
C17
1.3pF
R29
150Ω, 0.1%
C7
0.1µF
C10
1000pF
C12
10µF
C11
0.1µF
SHDN2
1
DIS
2
3
EN
J4
CAL OUT
C9
1000pF
C8
0.47µF
E3
GND
JP2
6409 F12
Figure 12. Demo Board DC1591A Schematic
6409fb
For more information www.linear.com/LTC6409
19
LTC6409
APPLICATIONS INFORMATION
Figure 13. Demo Board DC1591A Layout
6409fb
20
For more information www.linear.com/LTC6409
LTC6409
TYPICAL APPLICATIONS
DC-Coupled Level Shifting of an I/Q Demodulator Output
C5
0.9pF
5V
LT5575
5V
5V
65Ω
65Ω
I
RF IN
1900MHz
–10dBm
200mVP-P
5V
LO
1920MHz
0dBm
5V
C1
10pF
5V
R1
75Ω
R3
75Ω
R2
75Ω
C3
R4
12pF 75Ω
+ –
–OUT
LTC6409
– +
+OUT
VOCM
1.25V
65Ω
65Ω
3.4dBm
936mVP-P
C2
10pF
5pF
5pF
Q
–8.9dBm
227mVP-P
DC LEVEL
1.25V
R5
620Ω
DC LEVEL
3.9V
5pF
5pF
DC LEVEL
3.4V
DIFF OUTPUT Z
130Ω|฀|2.5pF
R6
620Ω
IDENTICAL
Q CHANNEL
C4
0.9pF
6409 TA02
GAIN: 1.1dB
GAIN: 12.3dB
Single-Ended to Differential Conversion Using LTC6409 and 50MHz Lowpass Filter (Only One Channel Shown)
3.3V
0.8pF
1.8V
0.1µF
1.8V
474Ω
150Ω
LTC6409
–
SHDN
+OUT
68pF
150pF
VOCM
75Ω
33pF
68pF
37.4Ω
180nH
150pF
180nH
+
B2 AIN1
O1A+ E8
–
B1 AIN1
O1A– E7
DCO+ G7
75Ω
B3
474Ω
C2
0.8pF
66.5Ω
C1
F2
GND
F1
F3
G2
G1
• • •
49.9Ω
OVDD
–OUT
N1
N2
DCO– G8
VCM12
AIN2+
AIN2–
AIN3+
AIN3–
FR+ H8
FR– H7
LTM9011-14
VCM34
AIN4+
AIN4–
AIN8+
AIN8–
6409 TA03
CLK–
–IN
+
B6
CLK+
+IN
180nH
VREF
66.5Ω
180nH
VDD
C5
37.4Ω
V+
SENSE
INPUT
150Ω
P5 P6
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For more information www.linear.com/LTC6409
21
LTC6409
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC6409#packaging for the most recent package drawings.
UDB Package
10-Lead Plastic QFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1848 Rev A)
0.25 ±0.05
0.95 ±0.05
0.65 ±0.05
2.50 ±0.05
1.10 ±0.05
0.75 ±0.05
0.90 ±0.05
0.05 ±0.05
DETAIL B
DETAIL B
0.25 ±0.10
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
0.85 ±0.05
0.90 ±0.10
0.05 ±0.10
DETAIL A
3.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.40 ±0.10
R = 0.13
TYP
8
2.00 ±0.05
3.00 ±0.05
0.75 ±0.05
0.20 REF
SIDE VIEW
1
0.80 7
BSC 6
0.50 ±0.10 0.25 ±0.05
0.50 BSC
0.70 ±0.10
10
DETAIL A
2
5
3
0.60 ±0.10
(UDB10) DFN 0910 REV A
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
6409fb
22
For more information www.linear.com/LTC6409
LTC6409
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
12/10
Revised Typical Application drawing
21
B
05/17
Corrected spelling of “reflectometry”
1
6409fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its information
circuits as described
herein will not infringe on existing patent rights.
For more
www.linear.com/LTC6409
23
LTC6409
TYPICAL APPLICATIONS
LTC6409 Externally Compensated for Maximum Gain Flatness and for No-Overshoot Time-Domain Response
1.3pF
Gain 0.1dB Flatness
0.5
150Ω
0.1µF 75Ω
PORT 1
50Ω
PORT 2
50Ω
150Ω
VOCM = 1.25V
0.1µF
0.4
5V
75Ω
150Ω
– +
LTC6409
+ –
150Ω
150Ω
0.1µF
0.1µF
0.3
1/2 AGILENT
E5071A
PORT 3
50Ω
0.2
GAIN (dB)
1/2 AGILENT
E5071A
PORT 4
50Ω
0.1
0
–0.1
–0.2
–0.3
150Ω
–0.4
–0.5
1.3pF
1.2pF
1
10
100
1000
FREQUENCY (MHz)
10000
No-Overshoot Step Response
250Ω
50Ω
0.4VP-P
+
–
VIN
5V
50Ω
0.1µF VOCM = 1.25V
50Ω
– +
LTC6409
+ –
150Ω
150Ω
0.1µF
0.1µF
49.9Ω
–OUT
TEKTRONIX
CSA8200 SCOPE
CHANNEL 1
50Ω
0.2V/DIV
0.1µF
CHANNEL 2
50Ω
6409 TA04
+OUT
250Ω
2ns/DIV
1.2pF
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC6400-8/LTC6400-14/ 1.8GHz Low Noise, Low Distortion, Differential
LTC6400-20/LTC6400-26 ADC Drivers
–71dBc IM3 at 240MHz 2VP-P Composite, IS = 90mA,
A V = 8dB/14dB/20dB/26dB
LTC6401-8/LTC6401-14/ 1.3GHz Low Noise, Low Distortion, Differential
LTC6401-20/LTC6401-26 ADC Drivers
–74dBc IM3 at 140MHz 2VP-P Composite, IS = 50mA,
A V = 8dB/14dB/20dB/26dB
LTC6406/LTC6405
3GHz/2.7GHz Low Noise, Rail-to-Rail Input
Differential Amplifier/Driver
–70dBc/–65dBc Distortion at 50MHz, IS = 18mA, 1.6nV/√Hz Noise,
3V/5V Supply
LTC6416
2GHz Low Noise, Differential 16-Bit ADC Buffer
–72.5dBc IM3 at 300MHz 2VP-P Composite, 150mW on 3.6V Supply
LTC2209
16-Bit, 160Msps ADC
100dB SFDR, VDD = 3.3V, VCM = 1.25V
LTC2262-14
14-Bit, 150Msps Ultralow Power 1.8V ADC
88dB SFDR, 149mW, VDD = 1.8V, VCM = 0.9V
6409fb
24
LT 0517 REV B • PRINTED IN USA
For more information www.linear.com/LTC6409
www.linear.com/LTC6409
 LINEAR TECHNOLOGY CORPORATION 2010