INDEX MX23L1622 16M-BIT MASK ROM (16/32 BIT OUTPUT) FEATURES ORDER INFORMATION • Bit organization - 1M x 16 (word mode) - 512K x 32 (double word mode) • Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) • Page - 8 double words per page • Current - Operating:60mA - Standby:50uA • Supply voltage - 3.3V±10% • Package - 70 pin SSOP (500mil) Part No. MX23L1622 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 Package Time Time MX23L1622MC-10 100ns 30ns 70 pin SSOP MX23L1622MC-12 120ns 45ns 70 pin SSOP PIN DESCRIPTION Symbol A0~A18 D0~D30 D31/A-1 CE OE Word VCC VSS NC PIN CONFIGURATION A0 A1 A2 A3 A4 A5 VCC D0 D16 D1 D17 VSS VCC D2 D18 D3 D19 D4 D20 D5 D21 VSS VCC D6 D22 D7 D23 VSS A6 A7 A8 A9 A10 A11 A12 Access Page Access NC NC NC WORD OE CE VSS D31/A-1 D15 D30 D14 VSS VCC D29 D13 D28 D12 D27 D11 D26 D10 VSS VCC D25 D9 D24 D8 VCC NC A18 A17 A16 A15 A14 A13 Pin Function Address Inputs Data Outputs D31 (Double Word Mode)/ LSB Address (Word Mode) Chip Enable Input Output Enable Input Double Word/ Word Mode Selection Power Supply Pin Ground Pin No Connection MODE SELECTION CE OE Word D31/A-1D0~D15 D16~D31 Mode Power H X X X High Z High Z - Stand-by L H X X High Z High Z - Active L L H L L L Output D0~D15 D16~D31 Double Active Word P/N:PM0400 Input D0~D15 High Z Word Active REV. 1.9, FEB. 01, 1999 1 INDEX MX23L1622 BLOCK DIAGRAM A0/(A-1) A2 A3 Address Memory Page Page Buffer Array Buffer Decoder Double Word/ Word A18 D0 Output Buffer D31/(D15) CE WORD OE ABSOLUTE MAXIMUM RATINGS Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -1.3V to VCC+2.0V (Note) 0°C to 70°C -65°C to 125°C Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns. DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%) Item Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Operating Current Symbol VOH VOL VIH VIL ILI ILO ICC1 MIN. 2.4V 2.2V -0.3V - MAX. 0.4V VCC+0.3V 0.8V 5uA 5uA 60mA 0V, VCC 0V, VCC tRC = 100ns, all output open Standby Current (TTL) Standby Current (CMOS) Input Capacitance Output Capacitance ISTB1 ISTB2 CIN COUT - 1mA 50uA 10pF 10pF CE = VIH CE>VCC-0.2V Ta = 25°C, f = 1MHZ Ta = 25°C, f = 1MHZ P/N:PM0400 Conditions IOH = -0.4mA IOL = 1.6mA REV. 1.9, FEB. 01, 1999 2 INDEX MX23L1622 AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%) Item Symbol Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Z Delay tRC tAA tACE tPA tOE tOH tHZ 23L1622-10 MIN. MAX. 100ns 100ns 100ns 30ns 30ns 0ns 20ns 23L1622-12 MIN. MAX. 120ns 120ns 120ns 45ns 45ns 0ns 20ns Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested. AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.5V 0.8 and 2.0V See Figure IOH (load)=-04.mA DOUT IOL (load)=1.6mA C<100pF Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance. P/N:PM0400 REV. 1.9, FEB. 01, 1999 3 INDEX MX23L1622 TIMING DIAGRAM RANDOM READ ADD ADD ADD ADD tRC tACE CE tOE OE DATA tHZ tOH tAA VALID VALID VALID PAGE READ VALID ADD A3-A18 (A-1),A0,A1,A2 2'nd ADD 1'st ADD tAA DATA 3'rd ADD tPA VALID VALID VALID Note: CE, OE are enable. Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode. P/N:PM0400 REV. 1.9, FEB. 01, 1999 4 INDEX MX23L1622 REVISION HISTORY Revision 1.8 1.9 Description 1) Added Block Diagram. 2) Added note to describe the minimum and maximum overshoot ranges. 3) Changed page mode access time (tPA) and output enable time (tOE) as 45ns instead of 50ns. 4) Added 100ns speed grade. AC CHARACTERISTICS tOH 10ns-->0ns P/N:PM0400 Page Date MAR/25/1998 P3 FEB/01/1999 REV. 1.9, FEB. 01, 1999 5 INDEX MX23L1622 MACRONIX INTERNATIONAL CO., LTD. HEADQUARTERS: TEL:+886-3-578-8888 FAX:+886-3-578-8887 EUROPE OFFICE: TEL:+32-2-456-8020 FAX:+32-2-456-8021 JAPAN OFFICE: TEL:+81-44-246-9100 FAX:+81-44-246-9105 SINGAPORE OFFICE: TEL:+65-747-2309 FAX:+65-748-4090 TAIPEI OFFICE: TEL:+886-3-509-3300 FAX:+886-3-509-2200 MACRONIX AMERICA, INC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the rignt to change product and specifications without notice. 6