FSLV16211 24-Bit Bus Switch Features Description The FSLV16211 is a 24-bit, high-speed, low-voltage bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. 5Ω switch connection between two ports Minimal propagation delay through the switch Low lCC Zero bounce in flow-through mode Packaged in Fine-Pitch Ball Grid Array (FBGA) and Thin Shrink Small Outline Package (TSSOP) This device’s design allows this part to be used as a 12bit or 24-bit bus switch. When OE1 is LOW, Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected to Port 2B. Ordering Information Part Number Operating Pb-Free Temperature Range Package Packing Method 54-Ball, Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Tape and Reel FSLV16211GX Yes -40°C to 85°C FSLV16211MTD Yes 56-Lead, Thin Shrink Small Outline -40°C to 85°C Package (TSSOP), JEDEC M0-153, 6.1mm Wide Trays FSLV16211MTDX Yes 56-Lead, Thin Shrink Small Outline -40°C to 85°C Package (TSSOP), JEDEC M0-153, 6.1mm Wide Tape and Reel Application Diagram Figure 1. Logic Diagram © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com FSLV16211 ⎯ 24-Bit Bus Switch March 2007 Pin Description Pin Name Description OE1, OE2 Bus Switch Enables 1A, 2A Bus A 1B, 2B Bus B NC No Connect FSLV16211 ⎯ 24-Bit Bus Switch Connection Diagram FBGA Pin Assignments Figure 2. Pin Assignments for TSSOP (Top Through View) 1 2 3 4 5 6 A 1A2 1A1 NC OE2 1B1 1B2 B 1A4 1A3 1A7 OE1 1B3 1B4 C 1A6 1A5 GND 1B7 1B5 1B6 D 1A10 1A9 1A8 1B8 1B9 1B10 E 1A12 1A11 2A1 2B1 1B11 1B12 F 2A4 2A3 2A2 2B2 2B3 2B4 G 2A6 2A5 VCC GND 2B5 2B6 H 2A8 2A7 2A9 2B9 2B7 2B8 I 2A12 2A11 2A10 2B10 2B11 2B12 Truth Table Inputs Figure 3. Pin Assignments for FBGA (Top Through View) © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 Inputs/Outputs OE1 OE2 1A,1B 2A, 2B Low Low 1A=1B 2A=2B Low High 1A=1B Z High Low Z 2A=2B High High Z Z www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC Parameter Supply Voltage (1) Min. Max. Unit -0.5 4.6 V 4.6 V VS DC Switch Voltage -0.5 VIN DC Input Voltage -0.5 4.6 V IIK DC Input Diode Current -50 mA IOUT DC Output Sink Current 128 mA +/-100 mA 150 °C ICC/IGNG TSTG DC VCC/GND Current Storage Temperature Range -65 FSLV16211⎯ 24-Bit Bus Switch Absolute Maximum Ratings Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.(2) Symbol Parameter Min. Max. Unit 2.3 3.6 V VCC Power Supply Operating VIN Input Voltage 0 3.6 V VOUT Output Voltage 0 3.6 V tr, tf Input Rise and Fall Time TA Free Air Operating Temperature Switch Control Input 0 4.0 ns/V Switch I/O 0 DC ns/V -40 85 °C Note: 2. Unused control inputs must be held HIGH or LOW. They may not float. © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 3 Not all conditions may appear on all switch types. Symbol Parameter Conditions TA = -40°C to +85°C Min. Typ. Clamp Diode Voltage VIH HIGH Level Control Input Voltage 2.3-2.7 1.7 2.7-3.6 2.0 VIL LOW Level Control Input Voltage 2.3-2.7 0.7 2.7-3.6 0.8 Force VI = 3.6V, IOUT = 0.0A 2.3 10.0 Force VI = 3.6V 0.0 10.0 0 ≤ VIN ≤ 3.6V 3.6 1.0 Quiescent Supply Current VIN = VCC or GND, IOUT = 0A 3.6 10.0 µA Increase in ICC per Input One Input at 3V Other Inputs at VCC or GND 3.6 300.0 µA Off-State Leakage 0.0 ≤ A, B ≤ 3.6V 3.6 1.0 µA IIN = 64mA, VI = 0.0V 3.0 IIN = 30mA, VI = 0.0V 3.0 5.0 7.0 IIN = 15mA, VI = 2.4V 3.0 10.0 15.0 IIN = 15mA, VI = 3.0V 2.3 IIN = 64mA, VI = 0.0V 2.3 5.0 8.0 IIN = 30mA, VI = 0.0V 2.3 5.0 8.0 IIN = 15mA, VI = 1.7V 2.3 10.0 15.0 IIN = 15mA, VI = 2.0V 2.3 ICC ∆ICC IOZ RON Input Leakage Current Switch On Resistance 3.0 Units Max. VIK IL IIN = -18mA VCC (V) -1.2 V V -1.0 5.0 V FSLV16211⎯ 24-Bit Bus Switch DC Electrical Characteristics µA 7.0 20.0 Ω 20.0 AC Electrical Characteristics Symbol Parameter TA=-40°C to +85°C TA=40°C to +85°C CL=30pF, RL=500Ω CL=50pF, RL=500Ω VCC = 2.5V ± 0.20V VCC=3.3V ± 0.30V Min. (3) Max. tPHL, tPLH Propagation Delay tPHZ, tPLZ Enable Time 0.5 4.7 tPZH, tPZL Disable Time 0.5 5.1 Min. 0.15 Units Max. 0.25 ns 1.0 7.0 ns 1.0 5.5 ns Note: 3. This parameter is guaranteed by design, but is not production tested. The bus switch contributes no propagation delay other than the RC delay of the typical on resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 4 TA = +25°C, f = 1MHz, unless otherwise noted. Symbols Parameter Conditions Min. Typ. Max. Units CIN Control Pin Input Capacitance VCC – 3.3V 4.5 pF CI/O Input/Output Capacitance VCC,OE= 3.3V 18.0 pF Capacitance is characterized, but not production tested. AC Loading Waveforms TEST SWITCH tPD Open tPLZ/tPZL VIN tPHZ/tPZH GND FSLV16211⎯ 24-Bit Bus Switch Capacitance Figure 4. AC Test Circuit Figure 5. AC Waveforms VCC Symbol 3.3V ± 0.3V 2.5V ± 0.2V VMI 1.5V VCC/2 VMO 1.5V VCC/2 VMVO 0.3V 0.15V VIN 6.0V 2 x VCC VCCV 3.0V VCC tr/tf 2ns 2.5ns © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 5 FSLV16211⎯ 24-Bit Bus Switch Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 6. 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 6 FSLV16211⎯ 24-Bit Bus Switch Physical Dimensions (Continued) Dimensions are in millimeters (inches) unless otherwise noted. Figure 7. 56-Lead Thin-Shrink Small Outline Package (TSSOP), JEDEC MO153, 6.1mm Wide © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 7 FSLV16211⎯ 24-Bit Bus Switch © 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 8