2–Input NAND Gate MC74VHC1G00 The MC74VHC1G00 is an advanced high speed CMOS 2–input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The MC74VHC1G00 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74VHC1G00 to be used to interface 5 V circuits to 3 V circuits. • High Speed: t PD = 3.0 ns (Typ) at V CC = 5 V • Low Power Dissipation: I CC = 2 mA (Max) at T A = 25°C • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Pin and Function Compatible with Other Standard Logic Families MARKING DIAGRAMS 5 4 1 2 V1d 3 SC–70/SC–88A/SOT–353 DF SUFFIX CASE 419A Pin 1 d = Date Code Figure 1. Pinout (Top View) 5 4 V1d 1 2 3 SOT–23/TSOP–5/SC–59 DT SUFFIX CASE 483 Figure 2. Logic Symbol Pin 1 d = Date Code FUNCTION TABLE Inputs PIN ASSIGNMENT 1 2 3 4 5 IN B IN A GND OUT Y V CC A L L H H B L H L H Output Y H H H L ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. VH0–1/4 MC74VHC1G00 MAXIMUM RATINGS Symbol V CC V IN V OUT I IK I OK I OUT I CC T STG TL TJ θ JA Parameter Value Unit DC Supply Voltage – 0.5 to + 7.0 V DC Input Voltage – 0.5 to V CC + 0.5 V DC Output Voltage – 0.5 to V CC + 0.5 V DC Input Diode Current ± 20 mA DC Output Diode Current ± 20 mA DC Output Sink Current ± 12.5 mA DC Supply Current per Supply Pin ± 25 mA Storage Temperature Range – 65 to + 150 °C Lead Temperature, 1 mm from Case for 10 Seconds 260 °C Junction Temperature Under Bias + 150 °C Thermal Resistance SC–70/SC–88A (Note 1) 150 °C/W TSOP–5 200 PD Power Dissipation in Still Air at 85C SC–70/SC–88A 150 mW TSOP–5 230 MSL Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 30% – 35% UL 94 V–0 (0.125 in) FR V ESD ESD Withstand Voltage Human Body Model (Note 2) >2000 V Machine Model (Note 3) > 200 Charged Device Model (Note 4) N/A I LATCH–UP Latch–Up Performance Above V CC and Below GND at 85C (Note 5) ± 500 mA Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm–by–1 inch, 2–ounce copper trace with no air flow. 2. Tested to EIA/JESD22–A114–A. 3. Tested to EIA/JESD22–A115–A. 4. Tested to JESD22–C101–A. 5. Tested to EIA/JESD78. DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature °C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Min 2.0 0.0 0.0 – 55 0 0 V CC = 3.3 ± 0.3 V V CC = 5.0 ± 0.5 V Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 NORMALIZED FAILURE RATE RECOMMENDED OPERATING CONDITIONS Symbol Parameter V CC DC Supply Voltage V IN DC Input Voltage V OUT DC Output Voltage TA Operating Temperature Range t r ,t f Input Rise and Fall Time Max 5.5 5.5 V CC + 125 100 20 Unit V V V °C ns/V 1 1 10 100 1000 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature VH0–2/4 MC74VHC1G00 DC ELECTRICAL CHARACTERISTICS V Symbol V IH Parameter Minimum High–Level Test Conditions Input Voltage V IL Maximum Low–Level Input Voltage V OH V OL Min 1.5 Max Min 1.5 Max Min 1.5 3.0 4.5 2.1 3.15 2.1 3.15 2.1 3.15 5.5 2.0 3.85 3.85 3.85 V 0.5 0.5 0.9 1.35 0.9 1.35 2.0 1.9 1.9 3.0 4.5 2.9 4.4 3.0 4.0 2.9 4.4 2.9 4.4 V IN = V IH or V IL I OH = –4 mA 3.0 2.58 2.48 2.34 I OH = –8 mA V IN = V IH or V IL 4.5 2.0 3.94 3.80 I OL = 50 µA 3.0 4.5 I OH = – 50 µA Unit V 0.9 1.35 1.9 Output Voltage V IN = V IH or V IL Max 0.5 5.5 2.0 V IN = V IH or V IL Output Voltage V IN = V IH or V IL Typ T A < 85°C –55°C to 125°C (V) 2.0 3.0 4.5 Minimum High–Level Maximum Low–Level T A = 25°C CC 1.65 1.65 1.65 V 3.66 0.0 0.1 0.1 0.1 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 V V IN = V IH or V IL I OL = 4 mA 3.0 0.36 0.44 0.52 4.5 0 to5.5 0.36 ±0.1 0.44 ±1.0 0.52 ±1.0 µA 5.5 2.0 20 40 µA I IN Maximum Input I OL = 8 mA V IN = 5.5 V or GND I CC Leakage Current Maximum Quiescent V IN = V CC or GND Supply Current AC ELECTRICAL CHARACTERISTICS C load = 50 pF, Input t r = t f = 3.0 ns Symbol t PLH , t PHL Parameter Maximum Propagation Delay, Test Conditions Min T A < 85°C –55°C<TA <125°C T A = 25°C Typ Max Min Max Min Max Unit V CC = 3.3± 0.3 V C L = 15 pF C L = 50 pF 4.5 5.6 7.9 11.4 9.5 13.0 11.0 15.1 V CC = 5.0± 0.5 V C L = 15 pF 3.0 5.5 6.5 8.0 C L = 50 pF 3.8 5.5 7.5 10 8.5 10 10.0 10 ns Input A or B to Y C IN Maximum Input pF Capacitance Typical @ 25°C, V CC = 5.0 V C PD Power Dissipation Capacitance (Note 6) 10 pF 6. C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC(OPR) = C PD • V CC • f in + I CC . C PD is used to determine the no– load dynamic power consumption; P D = C PD • V CC 2 • f in + I CC • V CC . *Includes all probe and jig capacitance. A 1–MHz square input wave is recommended for propagation delay tests. Figure 4. Switching Waveforms Figure 5. Test Circuit VH0–3/4 MC74VHC1G00 DEVICE ORDERING INFORMATION Device Nomenclature Device Order Number Logic Temp Circuit Range Technology Indicator Identifier Package Type Device Package Tape and Function Suffix Reel Suffix MC74VHC1G00DFT MC 74 VHC1G 00 DF T1 MC74VHC1G00DFT2 MC 74 VHC1G 00 DF T2 MC74VHC1G00DTT1 MC 74 VHC1G 00 DT T1 (Name/SOT#/ Common Name) SC–70/SC–88A/ SOT–353 SC–70/SC–88A/ SOT–353 SOT–23/TSOP–5/ SC–59 Tape and Reel Size 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit VH0–4/4