PD - 95514A
IRFR3410PbF
IRFU3410PbF
HEXFET® Power MOSFET
Applications
High frequency DC-DC converters
l Lead-Free
l
Benefits
Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
VDSS
RDS(on) max
ID
39mΩ
31A
100V
l
D-Pak
IRFR3410
I-Pak
IRFU3410
Absolute Maximum Ratings
Symbol
VDS
VGS
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
PD @TA = 25°C
dv/dt
TJ
TSTG
Parameter
Drain-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Maximum Power Dissipation
Maximum Power Dissipation
Linear Derating Factor
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
100
± 20
31
22
125
110
3.0
0.71
15
-55 to + 175
V
A
W
mW°C
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
–––
1.4
40
110
°C/W
Notes through are on page 10
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1
12/03/04
IRFR/U3410PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
100
–––
–––
2.0
–––
–––
–––
–––
Typ.
–––
0.11
34
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
39
mΩ VGS = 10V, ID = 18A
4.0
V
VDS = VGS, ID = 250µA
20
VDS = 100V, VGS = 0V
µA
250
VDS = 80V, VGS = 0V, TJ = 150°C
200
VGS = 20V
nA
-200
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
33
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
37
10
11
12
27
40
13
1690
220
26
1640
130
250
Max. Units
Conditions
–––
S
VDS = 25V, ID = 18A
56
I D = 18A
–––
nC
VDS = 50V
–––
VGS = 10V,
–––
VDD = 50V
–––
ID = 18A
ns
–––
RG = 9.1Ω
–––
VGS = 10V
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 80V
Avalanche Characteristics
Parameter
EAS
IAR
Single Pulse Avalanche Energy
Avalanche Current
Typ.
Max.
Units
–––
–––
140
18
mJ
A
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 31
showing the
A
G
integral reverse
––– ––– 125
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 18A, VGS = 0V
––– 84 –––
ns
TJ = 25°C, IF = 18A
––– 260 –––
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFR/U3410PbF
1000
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
10
4.5V
20µs PULSE WIDTH
Tj = 25°C
1
10
10
20µs PULSE WIDTH
Tj = 175°C
0.1
100
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000
3.0
100
T J = 175°C
T J = 25°C
10
VDS = 50V
20µs PULSE WIDTH
1
ID = 30A
VGS = 10V
2.0
(Normalized)
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α)
4.5V
1
1
0.1
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
TOP
1.0
0.0
4.0
5.0
6.0
7.0
8.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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9.0
-60 -40 -20
0
20
40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U3410PbF
100000
ID= 18A
VGS , Gate-to-Source Voltage (V)
Coss
10000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
= Cds + Cgd
Ciss
1000
Coss
100
Crss
16
12
8
4
0
10
1
10
0
100
10
30
40
50
60
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
20
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
100.0
OPERATION IN THIS AREA
LIMITED BY RDS (on)
100
TJ = 175°C
10.0
1.0
TJ = 25°C
100µsec
10
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
10msec
0.1
0.1
0.0
0.5
1.0
1.5
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS = 80V
VDS= 50V
VDS= 20V
2.0
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U3410PbF
32
28
ID , Drain Current (A)
RD
V DS
LIMITED BY PACKAGE
VGS
RG
24
D.U.T.
+
-VDD
20
VGS
16
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
12
Fig 10a. Switching Time Test Circuit
8
VDS
4
90%
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U3410PbF
L
VDS
D.U.T
RG
IAS
VGS
20V
tp
DRIVER
+
V
- DD
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
250
15V
TOP
BOTTOM
200
ID
7.3A
13A
18A
150
100
50
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFR/U3410PbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
+
-
-
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U3410PbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
WITH ASSEMBLY
LOT CODE 1234
AS SEMBLED ON WW 16, 1999
IN T HE ASSEMBLY LINE "A"
PART NUMBER
INTERNATIONAL
RECT IFIER
LOGO
Note: "P" in as sembly line position
indicates "Lead-Free"
IRFU120
12
916A
34
ASSEMBLY
LOT CODE
DATE CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INTE RNATIONAL
RECTIFIER
LOGO
IRFU120
12
AS S E MBLY
LOT CODE
8
34
DATE CODE
P = DESIGNAT ES LEAD-FRE E
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WE EK 16
A = ASS EMBLY SITE CODE
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IRFR/U3410PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
E XAMPLE: T HIS IS AN IRFU120
WIT H ASSE MBLY
LOT CODE 5678
AS SEMBLED ON WW 19, 1999
IN T HE ASSE MBLY LINE "A"
PART NUMBE R
INT E RNAT IONAL
RECT IF IE R
LOGO
IRF U120
919A
56
78
ASS EMBLY
LOT CODE
Note: "P" in as s embly line
pos ition indicates "Lead-Free"
DAT E CODE
YEAR 9 = 1999
WEE K 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFU120
56
AS SEMBLY
LOT CODE
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78
DAT E CODE
P = DESIGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = AS SEMBLY SIT E CODE
9
IRFR/U3410PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.85mH
R G = 25Ω, IAS = 18A.
ISD ≤ 18A, di/dt ≤ 360A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 30A.
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/