ON NCP1422MNR2 800 ma sync−rect pfm step−up dc−dc converter with true−cutoff and ring−killer Datasheet

NCP1422
800 mA Sync−Rect PFM
Step−Up DC−DC Converter
with True−Cutoff and
Ring−Killer
NCP1422 is a monolithic micropower high−frequency step−up
switching converter IC specially designed for battery−operated
hand−held electronic products up to 800 mA loading. It integrates
Sync−Rect to improve efficiency and to eliminate the external
Schottky Diode. High switching frequency (up to 1.2 MHz) allows
for a low profile, small−sized inductor and output capacitor to be
used. When the device is disabled, the internal conduction path from
LX or BAT to OUT is fully blocked and the OUT pin is isolated from
the battery. This True−Cutoff function reduces the shutdown current
to typically only 50 nA. Ring−Killer is also integrated to eliminate
the high−frequency ringing in discontinuous conduction mode. In
addition to the above, Low−Battery Detector, Logic−Controlled
Shutdown, Cycle−by−Cycle Current Limit and Thermal Shutdown
provide value−added features for various battery−operated
applications. With all these functions on, the quiescent supply
current is typically only 8.5 A. This device is available in the
compact and low profile DFN−10 package.
Features
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MARKING
DIAGRAM
DFN−10
MN SUFFIX
CASE 485C
•
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•
•
•
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•
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Typical Applications
•
•
•
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•
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Personal Digital Assistants (PDA)
Handheld Digital Audio Products
Camcorders and Digital Still Cameras
Hand−held Instruments
Conversion from one to two Alkaline, NiMH, NiCd Battery Cells
to 3.0−5.0 V or one Lithium−ion cells to 5.0 V
White LED Flash for Digital Cameras
© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 3
1
1422
ALYWG
G
1
1422 = Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
• Pb−Free Package is Available*
• High Efficiency: 94% for 3.3 V Output at 200 mA from 2.5 V Input
88% for 3.3 V Output at 500 mA from 2.5 V Input
High Switching Frequency, up to 1.2 MHz (not hitting current limit)
Output Current up to 800 mA at VIN = 2.5 V and VOUT = 3.3 V
True−Cutoff Function Reduces Device Shutdown Current to
typically 50 nA
Anti−Ringing Ring−Killer for Discontinuous Conduction Mode
High Accuracy Reference Output, 1.20 V $1.5% @ 25°C, can
Supply 2.5 mA Loading Current when VOUT > 3.3 V
Low Quiescent Current of 8.5 A
Integrated Low−Battery Detector
Open Drain Low−Battery Detector Output
1.0 V Startup at No Load Guaranteed
Output Voltage from 1.5 V to 5.0 V Adjustable
1.5 A Cycle−by−Cycle Current Limit
Multi−Function Logic−Controlled Shutdown Pin
On Chip Thermal Shutdown with Hysteresis
1
PIN CONNECTIONS
FB
1
LBI/EN
2
10 OUT
DFN−10
9
NC
8
LX
LBO
3
NC
4
7
GND
REF
5
6
BAT
(Top View)
ORDERING INFORMATION
Device
NCP1422MNR2
NCP1422MNR2G
Package
Shipping†
DFN−10
3000 Tape & Reel
DFN−10
(Pb−Free)
3000 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
Publication Order Number:
NCP1422/D
NCP1422
VBAT
M3
+
−
ZLC
0.5 V
Chip
Enable
+
VDD
20 mV
TRUE CUTOFF
CONTROL
CONTROL LOGIC
_ZCUR
_TSDON
M2
VDD
BAT
6
LX
8
VOUT
OUT
10
SENSEFETt
_MSON
M1
_MAINSW2ON
7
GND
FB
1
GND
_CEN
+
−
VDD
_PFM
_MAINSWOFD
PFM
_SYNSW2ON
REF
5
GND
_SYNSWOFD
Voltage
Reference
_VREFOK
_ILIM
+
−
1.20 V
LBI/EN
2
RSENSE
+
LBO
3
+
GND
−
GND
Figure 1. Detailed Block Diagram
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NCP1422
PIN FUNCTION DESCRIPTIONS
Pin
Symbol
Description
1
FB
2
LBI/EN
Low−Battery Detector Input and IC Enable. With this pin pulled down below 0.5 V, the device is disabled and
enters the shutdown mode.
3
LBO
Open−Drain Low−Battery Detector Output. Output is LOW when VLBI is < 1.20 V. LBO is high impedance in
shutdown mode.
4
NC
No Connect Pin
5
REF
1.20 V Reference Voltage Output, bypass with 300 nF capacitor. If this pin is loaded, bypass with 1.0 F
capacitor; this pin can be loaded up to 2.5 mA @ VOUT = 3.3 V.
6
BAT
Battery input connection for internal ring−killer.
7
GND
Ground.
Output Voltage Feedback Input.
8
LX
N−Channel and P−Channel Power MOSFET drain connection.
9
NC
No Connect Pin
10
OUT
Power Output. OUT also provides bootstrap power to the device.
MAXIMUM RATINGS (TA = 25°C unless otherwise noted.)
Rating
Symbol
Value
Unit
VOUT
−0.3, 5.5
V
Input/Output Pins (Pin 1−3, Pin 5−8)
VIO
−0.3, 5.5
V
Thermal Characteristics
DFN−10 Plastic Package
Thermal Resistance Junction−to−Air (Note 5)
PD
RJA
1824
68.5
mW_
C/W
Operating Junction Temperature Range
TJ
−40 to +150
_C
Operating Ambient Temperature Range
TA
−40 to +85
_C
Storage Temperature Range
Tstg
−55 to +150
_C
Power Supply (Pin 10)
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
1. This device contains ESD protection and exceeds the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114. *Except OUT pin, which is 1k V.
Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115. *Except OUT pin, which is 100 V.
2. The maximum package power dissipation limit must not be exceeded.
TJ(max) * TA
PD +
RJA
3. Latchup Current Maximum Rating: ±150 mA per JEDEC standard: JESD78.
4. Moisture Sensitivity Level: MSL 1 per IPC/JEDEC standard: J−STD−020A.
5. Measured on approximately 1x1 inch sq. of 1 oz. Copper.
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NCP1422
ELECTRICAL CHARACTERISTICS (VOUT = 3.3 V, TA = 25°C for typical value, −40°C v TA v 85°C for min/max values unless
otherwise noted.)
Symbol
Min
Typ
Max
Unit
VIN
1.0
−
5.0
V
VOUT
1.5
−
5.0
V
Reference Voltage
(VOUT = 3.3 V, ILOAD = 0 A, CREF = 200 nF, TA = 25°C)
VREF_NL
1.183
1.200
1.217
V
Reference Voltage
(VOUT = 3.3 V, ILOAD = 0 A, CREF = 200 nF, TA = −40°C to 85°C)
VREF_NL
1.174
−
1.220
V
Reference Voltage Temperature Coefficient
TCVREF
−
0.03
−
mV/°C
IREF
−
2.5
−
mA
Reference Voltage Load Regulation
(VOUT = 3.3 V, ILOAD = 0 to 100 A, CREF = 1.0 F)
VREF_LOAD
−
0.05
1.0
mV
Reference Voltage Line Regulation
(VOUT from 1.5 V to 5.0 V, CREF = 1.0 F)
VREF_LINE
−
0.05
1.0
mV/V
FB Input Threshold (ILOAD = 0 mA, TA = 25°C)
VFB
1.192
1.200
1.208
V
FB Input Threshold (ILOAD = 0 mA, TA = −40°C to 85°C)
VFB
1.184
−
1.210
V
LBI Input Threshold (ILOAD = 0 mA, TA = 25_C)
VLBI
1.182
1.200
1.218
V
LBI Input Threshold (ILOAD = 0 mA, TA= −40_C to 85_C)
VLBI
1.162
1.230
V
Internal N−FET ON−Resistance
RDS(ON)_N
−
0.3
−
Internal P−FET ON−Resistance
RDS(ON)_P
−
0.3
−
ILIM
−
1.5
−
A
Operating Current into BAT
(VBAT = 1.8 V, VFB = 1.8 V, VLX = 1.8 V, VOUT = 3.3 V)
IQBAT
−
1.3
3.0
A
Operating Current into OUT (VFB = 1.4 V, VOUT = 3.3 V)
IQ
−
8.5
14
A
LX Switch MAX. ON−Time (VFB = 1.0 V, VOUT = 3.3 V, TA = 25_C)
tON
0.46
0.72
1.15
s
LX Switch MIN. OFF−Time (VFB = 1.0 V, VOUT = 3.3 V, TA = 25_C)
tOFF
−
0.12
0.22
s
IFB
−
1.0
50
nA
True−Cutoff Current into BAT
(LBI/EN = GND, VOUT = 0 V, VIN = 3.3 V, LX = 3.3 V)
IBAT_SD
−
50
−
nA
BAT−to−LX Resistance (VFB = 1.4 V, VOUT = 3.3 V) (Note 8)
RBAT_LX
−
100
−
ILBI
−
1.5
50
nA
VLBO_L
−
−
0.2
V
TSS
−
1.5
20
ms
EN Pin Shutdown Threshold (TA = 25°C)
VSHDN
0.35
0.5
0.67
V
Thermal Shutdown Temperature (Note 8)
TSHDN
−
−
145
°C
Thermal Shutdown Hysteresis (Note 8)
TSDHYS
−
30
−
°C
Characteristic
Operating Voltage
Output Voltage Range
Reference Voltage Load Current
(VOUT = 3.3 V, VREF = VREF_NL "1.5% CREF = 1.0 F) (Note 6)
LX Switch Current Limit (N−FET) (Note 8)
FB Input Current
LBI/EN Input Current
LBO Low Output Voltage (VLBI = 0 V, ISINK = 1.0 mA)
Soft−Start Time (VIN = 2.5 V, VOUT = 5.0 V, CREF = 200 nF) (Note 7)
6. Loading capability increases with VOUT.
7. Design guarantee, value depends on voltage at VOUT.
8. Values are design guaranteed.
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NCP1422
TYPICAL OPERATING CHARACTERISTICS
1.220
1.220
REFERENCE VOLTAGE, VREF/V
1.210
1.200
REFERENCE VOLTAGE, VREF/V
VIN = 1.5 V
VOUT = 3.3 V
L = 10 H
CIN = 22 F
COUT = 22 F
CREF = 1.0 F
TA = 25_C
VIN = 2.0 V
VIN = 2.5 V
1.190
1.180
1
10
100
CREF = 200 nF
IREF = 0 mA
TA = 25°C
1.210
1.200
1.190
1.180
1.5
1000
2.5
3
3.5
4
4.5
5
OUTPUT CURRENT, ILOAD/mA
VOLTAGE AT OUT PIN, VOUT/V
Figure 2. Reference Voltage vs. Output Current
Figure 3. Reference Voltage vs. Voltage at OUT Pin
SWITCH ON RESISTANCE, RDS(ON)/
REFERENCE VOLTAGE, VREF/V
1.205
1.200
1.195
1.190
VOUT = 3.3 V
CREF = 200 nF
IREF = 0 mA
1.185
1.180
−40
−20
0
20
40
60
80
100
0.6
VOUT = 3.3 V
0.5
0.4
P−FET (M2)
0.3
0.2
N−FET (M1)
0.1
0.0
−40
AMBIENT TEMPERATURE, TA/°C
0
20
40
60
80
100
Figure 5. Switch ON Resistance vs. Temperature
1.0
MINIMUM STARTUP BATTERY
VOLTAGE, VBATT/V
1.6
0.9
0.8
0.7
0.6
0.5
−40
−20
AMBIENT TEMPERATURE, TA/°C
Figure 4. Reference Voltage vs. Temperature
LX SWITCH MAXIMUM, ON TIME, tON/S
2
−20
0
20
40
60
80
1.4
1.1
0.9
TA = 25°C
0.6
0
100
AMBIENT TEMPERATURE, TA/°C
50
100
150
200
250
OUTPUT LOADING CURRENT, ILOAD/mA
Figure 6. LX Switch Max. ON Time vs. Temperature
Figure 7. Minimum Startup Battery Voltage vs.
Loading Current
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NCP1422
TYPICAL OPERATING CHARACTERISTICS
10
OUTPUT VOLTAGE CHANGE/%
OUTPUT VOLTAGE CHANGE/%
10
5
VIN = 2.5 V
0
VOUT = 3.3 V
L = 5.6 H
CIN = 22 F
COUT = 22 F
TA = 25_C
−5
VIN = 2.0 V
−10
5
VIN = 3.3 V
0
VOUT = 5.0 V
L = 5.6 H
CIN = 22 F
COUT = 33 F
TA = 25_C
−5
VIN = 1.5 V
VIN = 2.5 V
−10
1
10
100
1000
1
OUTPUT LOADING CURRENT, ILOAD/mA
10
100
1000
OUTPUT LOADING CURRENT, ILOAD/mA
Figure 9. Output Voltage Change vs. Load Curren
Figure 8. Output Voltage Change vs. Load Current
RIPPLE VOLTAGE, VRIPPLE/mVp−p
50
VIN = 2.5 V
VOUT = 3.3 V
L = 6.8 H
CIN = 22 F
COUT = 22 F
TA = 25_C
40
30
500 mA
20
300 mA
10
100 mA
0
1.5
1.7
1.9
2.1
2.3
2.5
Upper Trace: Voltage at LBI Pin, 1.0 V/Division
Lower Trace: Voltage at LBO Pin, 1.0 V/Division
BATTERY INPUT VOLTAGE, VBATT/V
NO LOAD OPERATING CURRENT, IBATT/A
Figure 10. Battery Input Voltage vs. Output Ripple
Voltage
Figure 11. Low Battery Detect
15
12.5
10
7.5
VIN = 2.5 V
VOUT = 5.0 V
ILOAD = 10 mA
5.0
2.5
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Upper Trace: Input Voltage Waveform, 1.0 V/Division
Lower Trace: Output Voltage Waveform, 2.0 V/Division
INPUT VOLTAGE AT OUT PIN, VOUT/V
Figure 12. No Load Operating Current vs. Input
Voltage at OUT Pin
Figure 13. Startup Transient Response
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NCP1422
TYPICAL OPERATING CHARACTERISTICS
(VIN = 2.5 V, VOUT = 3.3 V, ILOAD = 50 mA; L = 5.6 H)
Upper Trace: Output Voltage Ripple, 20 mV/Division
Lower Trace: Voltage at Lx pin, 1.0 V/Division
(VIN = 2.5 V, VOUT = 3.3 V, ILOAD = 500 mA; L = 5.6 H)
Upper Trace: Output Voltage Ripple, 20 mV/Division
Lower Trace: Voltage at LX pin, 1.0 V/Division
Figure 14. Discontinuous Conduction Mode
Switching Waveform
Figure 15. Continuous Conduction Mode
Switching Waveform
(VIN = 1.5 V to 2.5 V; L = 5.6 H, COUT = 22F, ILOAD = 100 mA)
Upper Trace: Output Voltage Ripple, 100 mV/Division
Lower Trace: Battery Voltage, VIN, 1.0 V/Division
(VIN = 1.5 V to 2.5 V; L = 5.6 H, COUT = 22F, ILOAD = 100 mA)
Upper Trace: Output Voltage Ripple, 100 mV/Division
Lower Trace: Battery Voltage, VIN, 1.0 V/Division
Figure 16. Line Transient Response for VOUT = 3.3 V
Figure 17. Line Transient Response For VOUT = 5.0 V
(VOUT = 3.3 V, ILOAD = 100 mA to 800 mA; L = 5.6 H, COUT = 22 F)
Upper Trace: Output Voltage Ripple, 200 mV/Division
Lower Trace: Load Current, ILOAD, 500 mA/Division
(VOUT = 5.0 V, ILOAD = 100 mA to 800 mA; L = 5.6 H, COUT = 22 F)
Upper Trace: Output Voltage Ripple, 500 mV/Division
Lower Trace: Load Current, ILOAD, 500 mA/Division
Figure 18. Load Transient Response For VIN = 2.5 V
Figure 19. Load Transient Response For VIN = 3.0 V
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NCP1422
TYPICAL OPERATING CHARACTERISTICS
100
100
VIN = 2.5 V
VIN = 3.3 V
90
EFFICIENCY/%
EFFICIENCY/%
90
80
VIN = 1.5 V
70
60
50
1
NCP1422
VOUT = 5.0 V
L = 6.8 H
CIN = 22 F
COUT = 22 F
TA = 25_C
10
VIN = 2.5 V
80
VIN = 2.0 V
70
60
100
NCP1422
VOUT = 3.3 V
L = 6.8 H
CIN = 22 F
COUT = 22 F
TA = 25_C
VIN = 1.5 V
50
1
1000
10
100
OUTPUT LOADING CURRENT, IOUT/mA
OUTPUT LOADING CURRENT, IOUT/mA
Figure 20. Efficiency vs. Load Current
Figure 21. Efficiency vs. Load Current
1000
100
EFFICIENCY/%
90
VIN = 1.5 V
80
70
60
50
1
VIN = 1.2 V
NCP1422
VOUT = 1.8 V
L = 6.8 H
CIN = 22 F
COUT = 22 F
TA = 25_C
10
100
1000
OUTPUT LOADING CURRENT, IOUT/mA
Figure 22. Efficiency vs. Load Current
DETAILED OPERATION DESCRIPTION
PFM Regulation Scheme
NCP1422 is a monolithic micropower high−frequency
step−up voltage switching converter IC specially designed
for battery operated hand−held electronic products up to
800 mA loading. It integrates a Synchronous Rectifier to
improve efficiency as well as to eliminate the external
Schottky diode. High switching frequency (up to 1.2 MHz)
allows for a low profile inductor and output capacitor to be
used. Low−Battery Detector, Logic−Controlled Shutdown,
and Cycle−by−Cycle Current Limit provide value−added
features for various battery−operated applications. With all
these functions ON, the quiescent supply current is
typically only 8.5 A. This device is available in a compact
DFN−10 package.
From the simplified functional diagram (Figure 1), the
output voltage is divided down and fed back to pin 1 (FB).
This voltage goes to the non−inverting input of the PFM
comparator whereas the comparator’s inverting input is
connected to the internal voltage reference, REF. A
switching cycle is initiated by the falling edge of the
comparator, at the moment the main switch (M1) is turned
ON. After the maximum ON−time (typically 0.72 S)
elapses or the current limit is reached, M1 is turned OFF
and the synchronous switch (M2) is turned ON. The M1
OFF time is not less than the minimum OFF−time
(typically 0.12 S), which ensures complete energy
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NCP1422
transfer from the inductor to the output capacitor. If the
regulator is operating in Continuous Conduction Mode
(CCM), M2 is turned OFF just before M1 is supposed to be
ON again. If the regulator is operating in Discontinuous
Conduction Mode (DCM), which means the coil current
will decrease to zero before the new cycle starts, M1 is
turned OFF as the coil current is almost reaching zero. The
comparator (ZLC) with fixed offset is dedicated to sense
the voltage drop across M2 as it is conducting; when the
voltage drop is below the offset, the ZLC comparator
output goes HIGH and M2 is turned OFF. Negative
feedback of closed−loop operation regulates voltage at
pin1 (FB) equal to the internal reference voltage (1.20 V).
Cycle−by−Cycle Current Limit
Synchronous Rectification
The voltage at REF is typically set at 1.20 V and can
output up to 2.5 mA with load regulation ±2% at VOUT
equal to 3.3 V. If VOUT is increased, the REF load
capability can also be increased. A bypass capacitor of
200 nF is required for proper operation when REF is not
loaded. If REF is loaded, a 1.0 F capacitor at the REF pin
is needed.
In Figure 1, a SENSEFET is used to sample the coil
current as M1 is ON. With that sample current flowing
through a sense resistor, a sense−voltage is developed. The
threshold detector (ILIM) detects whether the
sense−voltage is higher than the preset level. If the sense
voltage is higher than the present level, the detector output
notifies the Control Logic to switch OFF M1, and M1 can
only be switched ON when the next cycle starts after the
minimum OFF−time (typically 0.12 S). With proper
sizing of the SENSEFET and sense resistor, the peak coil
current limit is typically set at 1.5 A.
Voltage Reference
The Synchronous Rectifier is used to replace the
Schottky Diode to reduce the conduction loss contributed
by the forward voltage of the Schottky Diode. The
Synchronous Rectifier is normally realized by powerFET
with gate control circuitry that incorporates relatively
complicated timing concerns.
As the main switch (M1) is being turned OFF and the
synchronous switch M2 is just turned ON with M1 not
being completely turned OFF, current is shunt from the
output bulk capacitor through M2 and M1 to ground. This
power loss lowers overall efficiency and possibly damages
the switching FETs. As a general practice, a certain amount
of dead time is introduced to make sure M1 is completely
turned OFF before M2 is turned ON.
The previously mentioned situation occurs when the
regulator is operating in CCM, M2 is turned OFF, M1 is just
turned ON, and M2 is not completely turned OFF. A dead
time is also needed to make sure M2 is completely turned
OFF before M1 is turned ON.
As coil current is dropped to zero when the regulator is
operating in DCM, M2 should be OFF. If this does not
occur, the reverse current flows from the output bulk
capacitor through M2 and the inductor to the battery input,
causing damage to the battery. The ZLC comparator comes
with fixed offset voltage to switch M2 OFF before any
reverse current builds up. However, if M2 is switched OFF
too early, large residue coil current flows through the body
diode of M2 and increases conduction loss. Therefore,
determination of the offset voltage is essential for optimum
performance. With the implementation of the synchronous
rectification scheme, efficiency can be as high as 94% with
this device.
True−Cutoff
The NCP1422 has a True−Cutoff function controlled by
the multi−function pin LBI/EN (pin 2). Internal circuitry
can isolate the current through the body diode of switch M2
to load. Thus, it can eliminate leakage current from the
battery to load in shutdown mode and significantly reduce
battery current consumption during shutdown. The
shutdown function is controlled by the voltage at pin 2
(LBI/EN). When pin 2 is pulled to lower than 0.3 V, the
controller enters shutdown mode. In shutdown mode, when
switches M1 and M2 are both switched OFF, the internal
reference voltage of the controller is disabled and the
controller typically consumes only 50 nA of current. If the
pin 2 voltage is raised to higher than 0.5 V (for example, by
a resistor connected to VIN), the IC is enabled again, and the
internal circuit typically consumes 8.5 A of current from
the OUT pin during normal operation.
Low−Battery Detection
A comparator with 30 mV hysteresis is applied to
perform the low−battery detection function. When pin 2
(LBI/EN) is at a voltage (defined by a resistor divider from
the battery voltage) lower than the internal reference
voltage of 1.20 V, the comparator output turns on a 50 low side switch. It pulls down the voltage at pin 3 (LBO)
which has hundreds of k of pull−high resistance. If the
pin 2 voltage is higher than 1.20 V + 30 mV, the comparator
output turns off the 50 low side switch. When this occurs,
pin 3 becomes high impedance and its voltage is pulled
high again.
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NCP1422
APPLICATIONS INFORMATION
Output Voltage Setting
voltage/current waveforms. The currents flowing into and
out of the capacitors multiply with the Equivalent Series
Resistance (ESR) of the capacitor to produce ripple voltage
at the terminals. During the Syn−Rect switch−off cycle, the
charges stored in the output capacitor are used to sustain the
output load current. Load current at this period and the ESR
combine and reflect as ripple at the output terminals. For
all cases, the lower the capacitor ESR, the lower the ripple
voltage at output. As a general guideline, low ESR
capacitors should be used. Ceramic capacitors have the
lowest ESR, but low ESR tantalum capacitors can also be
used as an alternative.
A typical application circuit is shown in Figure 23. The
output voltage of the converter is determined by the
external feedback network comprised of R1 and R2. The
relationship is given by:
VOUT + 1.20 V
ǒ1 ) R1
Ǔ
R2
where R1 and R2 are the upper and lower feedback
resistors, respectively.
Low Battery Detect Level Setting
The Low Battery Detect Voltage of the converter is
determined by the external divider network that is
comprised of R3 and R4. The relationship is given by:
VLB + 1.20 V
PCB Layout Recommendations
Good PCB layout plays an important role in switching
mode power conversion. Careful PCB layout can help to
minimize ground bounce, EMI noise, and unwanted
feedback that can affect the performance of the converter.
Hints suggested below can be used as a guideline in most
situations.
ǒ1 ) R3
Ǔ
R4
where R3 and R4 are the upper and lower divider resistors
respectively.
Inductor Selection
Grounding
The NCP1422 is tested to produce optimum performance
with a 5.6 H inductor at VIN = 2.5 V and VOUT = 3.3 V,
supplying an output current up to 800 mA. For other
input/output requirements, inductance in the range 3 H to
10 H can be used according to end application
specifications. Selecting an inductor is a compromise
between output current capability, inductor saturation
limit, and tolerable output voltage ripple. Low inductance
values can supply higher output current but also increase
the ripple at output and reduce efficiency. On the other
hand, high inductance values can improve output ripple
and efficiency; however, it is also limited to the output
current capability at the same time.
Another parameter of the inductor is its DC resistance.
This resistance can introduce unwanted power loss and
reduce overall efficiency. The basic rule is to select an
inductor with the lowest DC resistance within the board
space limitation of the end application. In order to help with
the inductor selection, reference charts are shown in
Figures 24 and 25.
A star−ground connection should be used to connect the
output power return ground, the input power return ground,
and the device power ground together at one point. All
high−current paths must be as short as possible and thick
enough to allow current to flow through and produce
insignificant voltage drop along the path. The feedback
signal path must be separated from the main current path
and sense directly at the anode of the output capacitor.
Components Placement
Power components (i.e., input capacitor, inductor and
output capacitor) must be placed as close together as
possible. All connecting traces must be short, direct, and
thick. High current flowing and switching paths must be
kept away from the feedback (FB, pin 1) terminal to avoid
unwanted injection of noise into the feedback path.
Feedback Network
Feedback of the output voltage must be a separate trace
detached from the power path. The external feedback
network must be placed very close to the feedback (FB,
pin 1) pin and sense the output voltage directly at the anode
of the output capacitor.
Capacitors Selection
In all switching mode boost converter applications, both
the input and output terminals see impulsive
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NCP1422
TYPICAL APPLICATION CIRCUIT
VIN
C1
22 F
C4
10 p*
R2 200 k
R3
220 k
R1
350 k
NCP1422
FB
Shutdown
Open Drain
Input
OUT
LBI/EN
R4
330 k
L
6.5 H
LX
LBO
GND
REF
BAT
C2
33 F
VOUT = 3.3 V
800 mA
+
C3
200 nF
Low Battery
Open Drain
Output
*Optional
Figure 23. Typical Application Schematic for 2 Alkaline Cells Supply
GENERAL DESIGN PROCEDURES
Switching mode converter design is considered a
complicated process. Selecting the right inductor and
capacitor values can allow the converter to provide
optimum performance. The following is a simple method
based on the basic first−order equations to estimate the
inductor and capacitor values for NCP1422 to operate in
Continuous Conduction Mode (CCM). The set component
values can be used as a starting point to fine tune the
application circuit performance. Detailed bench testing is
still necessary to get the best performance out of the circuit.
Design Parameters:
VIN = 1.8 V to 3.0 V, Typical 2.4 V
VOUT = 3.3 V
IOUT = 500 mA
VLB = 2.0 V
VOUT−RIPPLE = 40 mVp−p at IOUT = 500 mA
Determine the Steady State Duty Ratio, D, for typical
VIN. The operation is optimized around this point:
VOUT
+ 1
1*D
VIN
D+1*
Determine the average inductor current, ILAVG, at
maximum IOUT:
I
ILAVG + OUT + 500 mA + 688 mA
1 * 0.273
1*D
Determine the peak inductor ripple current, IRIPPLE−P,
and calculate the inductor value:
Assume IRIPPLE−P is 20% of ILAVG. The inductance of the
power inductor can be calculated as follows:
L+
Calculate the feedback network:
Select R2 = 200 k
R1 + R2
3.3 V * 1Ǔ + 350 k
ǒ1.20
V
VOUT−RIPPLE = 40 mVP−P at IOUT = 500 mA
IOUT tON
COUT u
VOUT*RIPPLE * IOUT
Calculate the Low Battery Detect divider:
VLB = 2.0 V
Select R4 = 330 k
R3 + R4
ǒVVLB
R3 + 300 k
REF
*1
VIN tON
2.4 V 0.75 S
+
+ 6.5 H
2 IRIPPLE*P
2 (137.6 mA)
A standard value of 6.5 H is selected for initial trial.
Determine the output voltage ripple, VOUT−RIPPLE, and
calculate the output capacitor value:
ǒVVOUT
* 1Ǔ
REF
R1 + 200 k
VIN
+ 1 * 2.4 V + 0.273
VOUT
3.3 V
ESRCOUT
where tON = 0.75 S and ESRCOUT = 0.05 ,
500 mA 0.75 S
COUT u
+ 18.75 F
45 mV * 500 mA 0.05 Ǔ
2.0 V * 1Ǔ + 220 k
ǒ1.20
V
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11
NCP1422
From the previous calculations, you need at least 18.75
F in order to achieve the specified ripple level at the
conditions stated. Practically, a capacitor that is one level
larger is used to accommodate factors not taken into
account in the calculations. Therefore, a capacitor value of
22 F is selected. The NCP1422 is internally compensated
for most applications, but in case additional compensation
is required, the capacitor C4 can be used as external
compensation adjustment to improve system dynamics.
In order to provide an easy way for customers to select
external parts for NCP1422 in different input voltage and
output current conditions, values of inductance and
capacitance are suggested in Figures 24, 25 and 26.
12
10
INDUCTOR VALUE (H)
INDUCTOR VALUE (H)
12
8
6
IOUT = 700 mA
4
9
6
IOUT = 700 mA
3
2
0
1.8
2.0
2.4
2.2
2.6
2.8
0
2.2
3.0
2.5
2.8
3.1
3.4
3.7
4.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 24. Suggested Inductance of VOUT = 3.3 V
Figure 25. Suggested Inductance of VOUT = 5.0 V
40
25
30
33
25
50
20
VOUT−RIPPLE = 45 mA
15
10
100
CAPACITOR ESR (m)
CAPACITOR VALUE (F)
35
5
0
100
200
300
400
500
600
700
800
OUTPUT CURRENT (mA)
Figure 26. Suggested Capacitance for Output Capacitor
Table 1. Suggestions for Passive Components
Output Current
Inductors
Capacitors
800 mA
Sumida CR43, CR54,CDRH6D28 series
Panasonic ECJ series
Kemet TL494 series
250 mA
Sumida CR32 series
Panasonic ECJ series
Kemet TL494 series
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NCP1422
PACKAGE DIMENSIONS
DFN10, 3 x 3mm, 0.5mm Pitch
CASE 485C−01
ISSUE A
D
PIN 1
REFERENCE
A
B
ÇÇÇ
ÇÇÇ
ÇÇÇ
EDGE OF PACKAGE
L1
E
DETAIL A
Bottom View
(Optional)
0.15 C
2X
TOP VIEW
0.15 C
2X
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
(A3)
DETAIL B
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. TERMINAL b MAY HAVE MOLD COMPOUND
MATERIAL ALONG SIDE EDGE. MOLD
FLASHING MAY NOT EXCEED 30 MICRONS
ONTO BOTTOM SURFACE OF TERMINAL b.
6. DETAILS A AND B SHOW OPTIONAL VIEWS
FOR END OF TERMINAL LEAD AT EDGE OF
PACKAGE.
A
10X
0.08 C
SIDE VIEW
SEATING
PLANE
A1
C
EXPOSED Cu
D2
10X
MOLD CMPD
DETAIL A
e
L
1
5
A1
K
10
10X
6
b
0.10 C A B
0.05 C
A3
DETAIL B
Side View
(Optional)
E2
10X
ÉÉ
ÉÉ
BOTTOM VIEW
SOLDERING FOOTPRINT*
NOTE 3
2.6016
1.8508
2.1746
3.3048
10X
0.5651
10X
0.5000 PITCH
0.3008
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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13
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.18
0.30
3.00 BSC
2.45
2.55
3.00 BSC
1.75
1.85
0.50 BSC
0.19 TYP
0.35
0.45
0.00
0.03
NCP1422
SENSEFET is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
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NCP1422/D
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