LM1036 www.ti.com SNAS525C – JAN 1995 – REVISED APRIL 2013 LM1036 Dual DC Operated Tone/Volume/Balance Circuit Check for Samples: LM1036 FEATURES DESCRIPTION • • • • • The LM1036 is a DC controlled tone (bass/treble), volume and balance circuit for stereo applications in car radio, TV and audio systems. An additional control input allows loudness compensation to be simply effected. 1 2 • • Wide Supply Voltage Range, 9V to 16V Large Volume Control Range, 75 dB Typical Tone Control, ±15 dB Typical Channel Separation, 75 dB Typical Low Distortion, 0.06% Typical for An Input Level of 0.3 Vrms High Signal to Noise, 80 dB Typical for an Input Level of 0.3 Vrms Few External Components Required Four control inputs provide control of the bass, treble, balance and volume functions through application of DC voltages from a remote control system or, alternatively, from four potentiometers which may be biased from a zener regulated supply provided on the circuit. Each tone response is defined by a single capacitor chosen to give the desired characteristic. Block and Connection Diagram Figure 1. PDIP and SOIC Packages See Package Numbers NFH0020A or DW0020B 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1995–2013, Texas Instruments Incorporated LM1036 SNAS525C – JAN 1995 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage 16V Control Pin Voltage (Pins 4, 7, 9, 12, 14) VCC Operating Temperature Range 0°C to +70°C −65°C to +150°C Storage Temperature Range Power Dissipation 1W Lead Temp. (Soldering, 10 seconds) (1) (2) 260°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Electrical Characteristics (1) VCC=12V, TA=25°C (unless otherwise stated) Parameter Supply Voltage Range Conditions Min Pin 11 Supply Current Zener Regulated Output Typ 9 35 V 45 mA 5 mA 5.4 Current V Pins 8, 13; f=1 kHz VCC=9V, Maximum Gain Maximum Input Voltage Units 16 Pin 17 Voltage Maximum Output Voltage Max 0.8 Vrms VCC=12V 0.8 1.0 Vrms Pins 2, 19; f=1 kHz, VCC 2V 1.3 1.6 Vrms 20 30 kΩ Gain=−10 dB Input Resistance Pins 2, 19; f=1 kHz Output Resistance Pins 8, 13; f=1 kHz Maximum Gain V(Pin 12)=V(Pin 17); f=1 kHz −2 0 Volume Control Range f=1 kHz 70 75 Gain Tracking f=1 kHz Channel 1–Channel 2 0 dB through −40 dB 1 −40 dB through −60 dB 2 dB Balance Control Range Pins 8, 13; f=1 kHz 1 dB Bass Control Range (2) f=40 Hz, Cb=0.39 μF Treble Control Range (2) Total Harmonic Distortion Channel Separation (1) (2) 2 Ω 20 2 dB dB 3 dB −26 −20 dB V(Pin 14)=V(Pin 17) 12 15 18 dB V(Pin 14)=0V −12 −15 −18 dB f= 16 kHz, Ct,=0.01 μF V(Pin 4)=V(Pin 17) 12 15 18 dB V(Pin 4)=0V −12 −15 −18 dB Gain=0 dB 0.06 0.3 % Gain=−30 dB 0.03 % 75 dB f=1 kHz, VIN=0.3 Vrms f=1 kHz, Maximum Gain 60 The maximum permissible input level is dependent on tone and volume settings. See Application Notes. The tone control range is defined by capacitors Cb and Ct. See Application Notes. Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 LM1036 www.ti.com SNAS525C – JAN 1995 – REVISED APRIL 2013 Electrical Characteristics(1) (continued) VCC=12V, TA=25°C (unless otherwise stated) Parameter Signal/Noise Ratio Conditions Min Unweighted 100 Hz–20 kHz Typ Max Units 80 dB 79 dB Maximum Gain, 0 dB=0.3 Vrms CCIR/ARM (3) Gain=0 dB, VIN=0.3 Vrms 75 Gain=−20 dB, VIN=1.0 Vrms 72 Output Noise Voltage at Minimum Gain CCIR/ARM (3) 10 Supply Ripple Rejection 200 mVrms, 1 kHz Ripple Control Input Currents Pins 4, 7, 9, 12, 14 (V=0V) −0.6 Frequency Response −1 dB (Flat Response 250 35 dB 16 50 μV dB −2.5 μA kHz 20 Hz–16 kHz) (3) Gaussian noise, measured over a period of 50 ms per channel, with a CCIR filter referenced to 2 kHz and an average-responding meter. Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 3 LM1036 SNAS525C – JAN 1995 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics 4 Volume Control Characteristics Balance Control Characteristic Figure 2. Figure 3. Tone Control Characteristic Tone Characteristic (Gain vs Frequency) Figure 4. Figure 5. Tone Characteristic (Gain vs Frequency) Loudness Compensated Volume Characteristic Figure 6. Figure 7. Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 LM1036 www.ti.com SNAS525C – JAN 1995 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Input Signal Handling vs Supply Voltage THD vs Gain Figure 8. Figure 9. Channel Separation vs Frequency Loudness Control Characteristic Figure 10. Figure 11. Output Noise Voltage vs Gain THD vs Input Voltage Figure 12. Figure 13. Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 5 LM1036 SNAS525C – JAN 1995 – REVISED APRIL 2013 www.ti.com Application Notes TONE RESPONSE The maximum boost and cut can be optimized for individual applications by selection of the appropriate values of Ct (treble) and Cb (bass). The tone responses are defined by the relationships: where • • ab=at=0 for maximum bass and treble boost respectively ab=at=1 for maximum cut (1) For the values of Cb and Ct of 0.39 μF and 0.01 μF as shown in the Application Circuit, 15 dB of boost or cut is obtained at 40 Hz and 16 kHz. ZENER VOLTAGE A zener voltage (pin 17=5.4V) is provided which may be used to bias the control potentiometers. Setting a DC level of one half of the zener voltage on the control inputs, pins 4, 9, and 14, results in the balanced gain and flat response condition. Typical spread on the zener voltage is ±100 mV and this must be taken into account if control signals are used which are not referenced to the zener voltage. If this is the case, then they will need to be derived with similar accuracy. LOUDNESS COMPENSATION A simple loudness compensation may be effected by applying a DC control voltage to pin 7. This operates on the tone control stages to produce an additional boost limited by the maximum boost defined by Cb and Ct. There is no loudness compensation when pin 7 is connected to pin 17. Pin 7 can be connected to pin 12 to give the loudness compensated volume characteristic as illustrated without the addition of further external components. (Tone settings are for flat response, Cb and Ct as given in Application Circuit.) Modification to the loudness characteristic is possible by changing the capacitors Cb and Ct for a different basic response or, by a resistor network between pins 7 and 12 for a different threshold and slope. SIGNAL HANDLING The volume control function of the LM1036 is carried out in two stages, controlled by the DC voltage on pin 12, to improve signal handling capability and provide a reduction of output noise level at reduced gain. The first stage is before the tone control processing and provides an initial 15 dB of gain reduction, so ensuring that the tone sections are not overdriven by large input levels when operating with a low volume setting. Any combination of tone and volume settings may be used provided the output level does not exceed 1 Vrms, VCC=12V (0.8 Vrms, VCC=9V). At reduced gain (<−6 dB) the input stage will overload if the input level exceeds 1.6 Vrms, VCC=12V(1.1 Vrms, VCC=9V). As there is volume control on the input stages, the inputs may be operated with a lower overload margin than would otherwise be acceptable, allowing a possible improvement in signal to noise ratio. 6 Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 LM1036 www.ti.com SNAS525C – JAN 1995 – REVISED APRIL 2013 Application Circuit Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 7 LM1036 SNAS525C – JAN 1995 – REVISED APRIL 2013 www.ti.com APPLICATIONS INFORMATION OBTAINING MODIFIED RESPONSE CURVES The LM1036 is a dual DC controlled bass, treble, balance and volume integrated circuit ideal for stereo audio systems. In the various applications where the LM1036 can be used, there may be requirements for responses different to those of the standard application circuit given in the data sheet. This application section details some of the simple variations possible on the standard responses, to assist the choice of optimum characteristics for particular applications. TONE CONTROLS Summarizing the relationship given in the data sheet, basically for an increase in the treble control range Ct must be increased, and for increased bass range Cb must be reduced. Figure 14 shows the typical tone response obtained in the standard application circuit. (Ct=0.01 μF, Cb=0.39 μF). Response curves are given for various amounts of boost and cut. Figure 14. Tone Characteristic (Gain vs Frequency) Figure 15 and Figure 16 show the effect of changing the response defining capacitors Ct and Cb to 2Ct, Cb/2 and 4Ct, Cb/4 respectively, giving increased tone control ranges. The values of the bypass capacitors may become significant and affect the lower frequencies in the bass response curves. Figure 15. Tone Characteristic (Gain vs Frequency) 8 Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 LM1036 www.ti.com SNAS525C – JAN 1995 – REVISED APRIL 2013 Figure 16. Tone Characteristic (Gain vs Frequency) Figure 17 shows the effect of changing Ct and Cb in the opposite direction to Ct/2, 2Cb respectively giving reduced control ranges. The various results corresponding to the different Ct and Cb values may be mixed if it is required to give a particular emphasis to, for example, the bass control. The particular case with Cb/2, Ct is illustrated in Figure 18. Restriction of Tone Control Action at High or Low Frequencies It may be desired in some applications to level off the tone responses above or below certain frequencies for example to reduce high frequence noise. This may be achieved for the treble response by including a resistor in series with Ct. The treble boost and cut will be 3 dB less than the standard circuit when R=XC. A similar effect may be obtained for the bass response by reducing the value of the AC bypass capacitors on pins 5 (channel 1) and 16 (channel 2). The internal resistance at these pins is 1.3 kΩ and the bass boost/cut will be approximately 3 dB less with XC at this value. An example of such modified response curves is shown in Figure 19. The input coupling capacitors may also modify the low frequency response. It will be seen from Figure 15 and Figure 16 that modifying Ct and Cb for greater control range also has the effect of flattening the tone control extremes and this may be utilized, with or without additional modification as outlined above, for the most suitable tone control range and response shape. Other Advantages of DC Controls The DC controls make the addition of other features easy to arrange. For example, the negative-going peaks of the output amplifiers may be detected below a certain level, and used to bias back the bass control from a high boost condition, to prevent overloading the speaker with low frequency components. LOUDNESS CONTROL The loudness control is achieved through control of the tone sections by the voltage applied to pin 7; therefore, the tone and loudness functions are not independent. There is normally 1 dB more bass than treble boost (40 Hz–16 kHz) with loudness control in the standard circuit. If a greater difference is desired, it is necessary to introduce an offset by means of Ct or Cb or by changing the nominal control voltage ranges. Figure 20 shows the typical loudness curves obtained in the standard application circuit at various volume levels (Cb=0.39 μF). Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 9 LM1036 SNAS525C – JAN 1995 – REVISED APRIL 2013 www.ti.com Figure 17. Tone Characteristic (Gain vs Frequency) Figure 18. Tone Characteristic (Gain vs Frequency) Figure 19. Tone Characteristic (Gain vs Frequency) Figure 20. Loudness Compensated Volume Characteristic Figure 21 and Figure 22 illustrate the loudness characteristics obtained with Cb changed to Cb/2 and Cb/4 respectively, Ct being kept at the nominal 0.01 μF. These values naturally modify the bass tone response as in Figure 15 and Figure 16. With pins 7 (loudness) and 12 (volume) directly connected, loudness control starts at typically −8 dB volume, with most of the control action complete by −30 dB. Figure 23 and Figure 24 show the effect of resistively offsetting the voltage applied to pin 7 towards the control reference voltage (pin 17). Because the control inputs are high impedance, this is easily done and high value resistors may be used for minimal additional loading. It is possible to reduce the rate of onset of control to extend the active range to −50 dB volume control and below. The control on pin 7 may also be divided down towards ground bringing the control action on earlier. This is illustrated in Figure 25, With a suitable level shifting network between pins 12 and 7, the onset of loudness control and its rate of change may be readily modified. 10 Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 LM1036 www.ti.com SNAS525C – JAN 1995 – REVISED APRIL 2013 Figure 21. Loudness Compensated Volume Characteristic Figure 22. Loudness Compensated Volume Characteristic Figure 23. Loudness Compensated Volume Characteristic Figure 24. Loudness Compensated Volume Characteristic Figure 25. Loudness Compensated Volume Characteristic When adjusted for maximum boost in the usual application circuit, the LM1036 cannot give additional boost from the loudness control with reducing gain. If it is required, some additional boost can be obtained by restricting the tone control range and modifying Ct, Cb, to compensate. A circuit illustrating this for the case of bass boost is shown in Figure 26. The resulting responses are given in Figure 27 showing the continuing loudness control action possible with bass boost previously applied. Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 11 LM1036 SNAS525C – JAN 1995 – REVISED APRIL 2013 www.ti.com USE OF THE LM1036 ABOVE AUDIO FREQUENCIES The LM1036 has a basic response typically 1 dB down at 250 kHz (tone controls flat) and therefore by scaling Cb and Ct, it is possible to arrange for operation over a wide frequency range for possible use in wide band equalization applications. As an example Figure 28 shows the responses obtained centered on 10 kHz with Cb=0.039 μF and Ct=0.001 μF. Figure 26. Modified Application Circuit for Additional Bass Boost with Loudness Control Figure 27. Loudness Compensated Volume Characteristic 12 Figure 28. Tone Characteristic (Gain vs Frequency) Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 LM1036 www.ti.com SNAS525C – JAN 1995 – REVISED APRIL 2013 Simplified Schematic Diagram (One Channel) *Connections reversed Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 13 LM1036 SNAS525C – JAN 1995 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision B (April 2013) to Revision C • 14 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 13 Submit Documentation Feedback Copyright © 1995–2013, Texas Instruments Incorporated Product Folder Links: LM1036 PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM1036M/NOPB LIFEBUY SOIC DW 20 36 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR 0 to 70 LM1036M LM1036MX/NOPB LIFEBUY SOIC DW 20 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR 0 to 70 LM1036M LM1036N/NOPB LIFEBUY PDIP NFH 20 18 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM 0 to 70 LM1036N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM1036MX/NOPB Package Package Pins Type Drawing SOIC DW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 330.0 24.4 Pack Materials-Page 1 10.9 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.3 3.25 12.0 24.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM1036MX/NOPB SOIC DW 20 1000 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA NFH0020A N0020A N20A (Rev G) www.ti.com PACKAGE OUTLINE DW0020A SOIC - 2.65 mm max height SCALE 1.200 SOIC C 10.63 TYP 9.97 SEATING PLANE PIN 1 ID AREA A 0.1 C 20 1 13.0 12.6 NOTE 3 18X 1.27 2X 11.43 10 11 B 7.6 7.4 NOTE 4 20X 0.51 0.31 0.25 C A B 2.65 MAX 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0 -8 0.3 0.1 1.27 0.40 DETAIL A TYPICAL 4220724/A 05/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side. 5. Reference JEDEC registration MS-013. www.ti.com EXAMPLE BOARD LAYOUT DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM (R0.05) TYP 10 11 (9.3) LAND PATTERN EXAMPLE SCALE:6X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK 0.07 MAX ALL AROUND 0.07 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4220724/A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM 11 10 (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X 4220724/A 05/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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