G1428 Global Mixed-mode Technology Inc. 2W Stereo Audio Amplifier 2X\6X\12X\24X Selectable Gain Settings Features General Description G1428 is a stereo audio power amplifier in 24pin TSSOP thermal pad package. It can drive 2.0W continuous RMS power into 4Ω load per channel in Bridge-Tied Load (BTL) mode at 5V supply voltage. Its THD is smaller than 1% under the above operation condition. To simplify the audio system design in the notebook application, G1428 supports the Bridge-Tied Load (BTL) mode for driving the speakers, Single-End (SE) mode for driving the headphone. For the low current consumption applications, the SHDN mode is supported to disable G1428 when it is idle. The current consumption can be reduced to 160µA (typically). Internal Gain Control, Which Eliminates External Gain-Setting Resistors Depop Circuitry Integrated Output Power at 1% THD+N, VDD=5V --2.0W/CH (typical) into a 4Ω Load --1.2W/CH (typical) into a 8Ω Load Bridge-Tied Load (BTL), Single-Ended (SE) Stereo Input MUX PC-Beep Input Fully differential Input Shutdown Control Available Surface-Mount Power Package 24-Pin TSSOP-P Amplifier gain is internally configured and controlled by two terminals (GAIN0, GAIN1). BTL gain settings of 2, 6, 12, 24V/V are provided, while SE gain is always configured as 1V/V for headphone driving. G1428 also supports two input paths, that means two different amplitude AC signals can be applied and chosen by setting HP/ LINE pin. It enhances the hardware designing flexibility. Applications Stereo Power Amplifiers for Notebooks or Desktop Computers Multimedia Monitors Stereo Power Amplifiers for Portable Audio Systems Ordering Information ORDER NUMBER ORDER NUMBER (Pb free) MARKING TEMP. RANGE PACKAGE G1428F31U G1428F31Uf G1428 -40°C to +85°C TSSOP-24 (FD) Note: U: Tape & Reel (FD): Thermal Pad Pin Configuration GND/HS 1 24 GND/HS GAIN0 2 23 RLINEIN GAIN1 3 22 SHUTDOWN LOUT+ 4 21 ROUT+ LLINEIN 5 6 20 RHPIN LPHIN 19 VDD PVDD 7 18 PVDD RIN 8 17 HP/LINE LOUT- 9 16 ROUT- LIN 10 BYPASS 11 15 14 SE/BTL GND/HS 12 13 GND/HS Thermal Pad PC-BEEP 14 Bottom View Top View TSSOP-24 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 1 G1428 Global Mixed-mode Technology Inc. Absolute Maximum Ratings Power Dissipation (1) TA ≤ 25°C …...…….….…………….….………..2.7W TA ≤ 70°C …………….………………..………..1.7W Electrostatic Discharge, VESD Human body mode..………………………………3000(2) Supply Voltage, VCC…………………..…...…….……...6V Operating Ambient Temperature Range TA…….…………………………….……….-40°C to +85°C Maximum Junction Temperature, TJ…..……….….150°C Storage Temperature Range, TSTG….…-65°C to+150°C Reflow Temperature (soldering, 10sec)….……..260°C Note: (1) : Recommended PCB Layout (2) : Human body model : C = 100pF, R = 1500Ω, 3 positive pulses plus 3 negative pulses Electrical Characteristics DC Electrical Characteristics, TA=+25°C PARAMETER SYMBOL Supply voltage VDD High-Level Input voltage, VIH VDD VIH Low-Level Input voltage, VIL VIL CONDITION MIN TYP MAX UNIT 4.5 5 5.5 V 3.5 --- --- V SE/ BTL , HP/ LINE , SHUTDOWN , GAIN0, --- --- 1 V GAIN1 VDD = 5V,Gain = 2 --- mV SE/ BTL , HP/ LINE , SHUTDOWN , GAIN0 , GAIN1 DC Differential Output Voltage VO(DIFF) Supply Current in Mute Mode IDD in Shutdown IDD VDD = 5V ISD VDD = 5V Stereo BTL Stereo SE ----- 5 50 7.5 13 4 160 7 300 mA µA (AC Operation Characteristics, VDD = 5.0V, TA=+25°C, RL = 4Ω, unless otherwise noted) PARAMETER Output power (each channel) see Note SYMBOL P(OUT) Total harmonic distortion plus noise THD+N Maximum output power bandwidth BOM Power supply ripple rejection PSRR Channel-to-channel output separation Line/HP input separation BTL attenuation in SE mode Input impedance Signal-to-noise ratio Output noise voltage MIN TYP MAX THD = 1%, BTL, RL = 4Ω G=-2V/V THD = 1%, BTL, RL = 8Ω G=-2V/V THD = 10%, BTL, RL = 4Ω G=-2V/V CONDITION ------- 2 1.25 2.5 ------- THD = 10%, BTL, RL = 8Ω G=-2V/V --- 1.6 --- THD = 0.1%, SE, RL = 32Ω PO = 1.6W, BTL, RL = 4Ω G=-2V/V ----- 85 100 ----- PO = 1W, BTL, RL = 8Ω G=-2V/V PO = 75mW, SE, RL = 32Ω VI = 1V, RL = 10KΩ, SE ------- 60 80 30 ------- THD = 5% --- >15 --- kHz F=1kHz, BTL mode G=-2V/V CBYP=1µF f = 1kHz --- 68 --- dB ----- 80 80 ----- dB dB 85 --See Table 2 --90 ----45 --- dB MΩ --ZI Vn PO = 500mW, BTL, G=-2V/V BTL, G=-2V/V, A Weighted filter UNIT W mW m% dB µV (rms) Note :Output power is measured at the output terminals of the IC at 1kHz. TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 2 G1428 Global Mixed-mode Technology Inc. Typical Characteristics Table of Graphs FIGURE THD +N Total harmonic distortion plus noise vs Frequency 1,2,7,8,13,14,19,21 vs Output Power 3,4,5,6,9,10,11,12,15,16,17,18,20 vs Output Voltage 22 Output noise voltage vs Frequency 27 Supply ripple rejection ratio vs Frequency 23,24 Crosstalk vs Frequency 25,26 PO Output power vs Load Resistance 28,29 PD Power dissipation vs Output Power 30,31 Vn Toal Harmonic Distortion Plus Noise vs Frequency Toal Harmonic Distortion Plus Noise vs Frequency 10 5 2 1 10 VDD=5V RL=3Ω BTL Po=1.75W 5 2 Av=-24V/V VDD=5V RL=3Ω BTL,Av=-2V/V 1 0.5 0.5 % % 0.2 0.2 Av=-2V/V 0.1 0.1 0.05 0.02 Po=0.5W Po=1W 0.05 Av=-12V/V Av=-6V/V 0.01 20 50 100 200 5 00 1k 0.02 2k 5k 10k Po=1.75W 0.01 20 20 k 50 100 20 0 5 00 Hz 2k 5k 10k Figure 1 Figure 2 Toal Harmonic Distortion Plus Noise vs Output Power Toal Harmonic Distortion Plus Noise vs Output Power 10 20 k 10 VDD=5V RL=3Ω BTL,Av=-2V/V 15kHz 5 2 2 1 0.5 0.5 1kHz % 15kHz 5 1 1kHz % 0.2 0.2 0.1 0.1 0.05 0.05 20Hz 0.02 0.01 3m 1k Hz 0.02 5m 10m 20m 50 m 100m 200 m 50 0m 1 2 0.01 3m 3 W VDD=5V RL=3Ω BTL,Av=-6V/V 5m 10m 20m 20Hz 50 m 100m 200m 50 0m 1 2 3 W Figure 3 Figure 4 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 3 G1428 Global Mixed-mode Technology Inc. Toal Harmonic Distortion Plus Noise vs Output Power Toal Harmonic Distortion Plus Noise vs Output Power 10 10 15kHz 5 5 2 2 1 1kHz 15kHz 1 1kHz 0.5 0.5 % % 0.2 20Hz VDD=5V RL=3Ω BTL,Av=-12V/V 0.05 0.1 0.05 0.02 0.01 3m 20Hz 0.2 0.1 VDD=5V RL=3Ω BTL,Av=-24V/V 0.02 5m 10m 20m 50 m 100m 200 m 50 0m 1 2 0.01 3m 3 5m 10m 20m 50 m 100m W Figure 5 1 2 3 Toal Harmonic Distortion Plus Noise vs Frequency 10 10 5 5 Av=-24V/V 2 2 1 1 0.5 VDD=5V RL=4Ω BTL,Av=-2V/V 0.5 % 0.2 VDD=5V RL=4Ω BTL Po=1.75W 0.1 0.05 Av=-2V/V 0.01 20 50 Av=-6V/V 100 Po=0.25W % Av=-12V/V 0.2 200 5 00 1k 2k 5k Po=1.5W 0.1 0.05 0.02 10k Po=1W 0.01 20 20 k 50 100 20 0 5 00 Hz 1k 2k 5k 10k 20 k Hz Figure 7 Figure 8 Toal Harmonic Distortion Plus Noise vs Output Power Toal Harmonic Distortion Plus Noise vs Output Power 10 10 5 VDD=5V RL=4Ω BTL,Av=-2V/V 15kHz 2 5 15kHz 2 1 1 0.5 0.5 1kHz % 1kHz % 0.2 0.2 0.1 0.1 0.05 0.05 20Hz 0.02 0.01 3m 50 0m Figure 6 Toal Harmonic Distortion Plus Noise vs Frequency 0.02 200m W 0.02 5m 10m 20m 50 m 100m 200 m 50 0m 1 2 0.01 3m 3 W VDD=5V RL=4Ω BTL,Av=-6V/V 5m 10m 20m 20Hz 50 m 100m 200m 50 0m 1 2 3 W Figure 10 Figure 9 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 4 G1428 Global Mixed-mode Technology Inc. Toal Harmonic Distortion Plus Noise vs Output Power Toal Harmonic Distortion Plus Noise vs Output Power 10 10 15kHz 5 5 2 15kHz 2 1kHz 1 1kHz 1 0.5 0.5 % % 0.2 0.1 0.05 0.2 VDD=5V RL=4Ω BTL,Av=-12V/V 0.1 20Hz 0.05 0.02 0.01 3m 20Hz VDD=5V RL=4Ω BTL,Av=-24V/V 0.02 5m 10m 20m 50 m 100m 200 m 50 0m 1 2 0.01 3m 3 5m 10m 20m 50 m 100m W 2 Toal Harmonic Distortion Plus Noise vs Frequency Toal Harmonic Distortion Plus Noise vs Frequency 2 3 10 VDD=5V RL=8Ω BTL,Av=-2V/V 5 2 1 0.5 VDD=5V RL=8Ω BTL Po=1W Av=-24V/V 0.5 % Av=-12V/V % Po=0.25W 0.2 0.2 0.1 0.1 Po=1W 0.05 Po=0.5W 0.01 20 50 Av=-2V/V 0.05 0.02 100 20 0 5 00 1k 2k Av=-6V/V 0.02 5k 10k 0.01 20 20 k 50 100 20 0 5 00 Hz 1k 2k 5k 10k 20 k Hz Figure 13 Figure 14 Toal Harmonic Distortion Plus Noise vs Output Power Toal Harmonic Distortion Plus Noise vs Output Power 10 10 VDD=5V RL=8Ω BTL,Av=-2V/V 5 15kHz 5 1 0.5 0.5 % 1kHz % 1kHz 0.2 0.2 0.1 0.1 0.05 0.05 20Hz 0.02 5m 10m VDD=5V RL=8Ω BTL,Av=-6V/V 15kHz 2 1 0.01 3m 1 Figure 12 1 2 50 0m Figure 11 10 5 200 m W 20Hz 0.02 20m 50 m 100m 200 m 50 0m 1 2 0.01 3m 3 W 5m 10m 20m 50 m 100m 200 m 50 0m 1 2 3 W Figure 15 Figure 16 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 5 G1428 Global Mixed-mode Technology Inc. Toal Harmonic Distortion Plus Noise vs Output Power Toal Harmonic Distortion Plus Noise vs Output Power 10 10 15kHz 5 15kHz 5 2 2 1 1 1kHz 0.5 1kHz 0.5 % % 0.2 0.1 0.05 0.2 0.05 20Hz 0.02 0.01 3m 5m 10m 20m VDD=5V RL=8Ω BTL,Av=-24V/V 0.1 VDD=5V RL=8Ω BTL,Av=-12V/V 50m 100m 200m 500m 20Hz 0.02 1 2 0.01 3m 3 5m 10m 20m 50m W 500m 1 2 3 Figure 18 Toal Harmonic Distortion Plus Noise vs Frequency Toal Harmonic Distortion Plus Noise vs Output Power 10 10 VDD=5V RL=32Ω SE,Av=-1V/V 5 2 5 2 1 1 0.5 0.5 Po=50mW % 0.1 0.1 0.05 0.02 100 200 500 1k 2k 5k 20Hz 1kHz 0.02 Po=25mW 50 15kHz 0.2 0.05 0.01 20 VDD=5V RL=32Ω SE,Av=-1V/V % Po=75mW 0.2 10k 0.01 1m 20k 2m 5m 10m 20m Hz 50m 100m 200m 500m 1 W Figure 19 Figure 20 Toal Harmonic Distortion Plus Noise vs Frequency Toal Harmonic Distortion Plus Noise vs Output Voltage 10 10 5 1 200m W Figure 17 2 100m 5 VDD=5V RL=10kΩ SE,Av=-1V/V Cout=1000µF 2 1 0.5 VDD=5V RL=10Ω SE,Av=-1V/V Cout=1000µF 0.5 % % 0.2 0.2 0.1 0.1 Vo=1Vrms 0.05 0.05 0.02 0.02 0.01 20 0.01 100m 50 100 200 500 1k 2k 5k 10k 20k Hz 20Hz 15kHz 1kHz 200m 300m 400m 500m 700m 1 2 3 Vo-Output Voltage-Vrms Figure 21 Figure 22 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 6 G1428 Global Mixed-mode Technology Inc. Supply Ripple Rejection Ratio vs Frequency +0 T T -10 -20 -30 T VDD=5V RL=8Ω Cb=1µF BTL T T +0 T T VDD=5V RL=8Ω Cb=1µF SE -10 -20 -30 -40 d B Supply Ripple Rejection Ratio vs Frequency -40 Av=-24V/V d B -50 -60 -50 -60 -70 -70 Av=-2V/V -80 -80 -90 -90 -100 20 -100 20 50 100 200 5 00 1k 2k 5k 10k 20 k 50 100 200 Hz -40 -45 -50 10k 20 k 10k 20 k Channel Separation -10 VDD=5V Po=1W RL=8Ω BTL,Av=-2V/V VDD=5V Vo=1Vrms RL=10kΩ SE,Av=-1V/V -20 -30 -40 -50 -55 d B 5k +0 T -25 -35 2k Figure 24 Channel Separation -30 1k Hz Figure 23 -20 5 00 d B -60 -65 L TO R -70 L TO R -70 -60 -80 -75 -90 -80 -85 R TO L -100 -90 R TO L -95 -100 20 50 100 200 5 00 1k -110 2k 5k 10k -120 20 20 k 50 100 200 5 00 1k 2k 5k Hz Hz Figure 25 Figure 26 Output Power vs Load Resistance Output Noise vs Frequency 2.5 5 00u 4 00u 2 00u VDD=5V RL=4Ω BTL,Av=-2V/V A-Weighted filter 1 00u V VDD=5V THD+N=1% BTL Each Channel 2 Output Power(W) 3 00u 70u 60u 50u 40u 1.5 1 30u 0.5 20u 10u 20 50 100 200 5 00 1k 2k 5k 10k 0 20 k 0 Hz 10 20 30 40 Load Resistance(Ω) Figure 27 Figure 28 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 7 G1428 Global Mixed-mode Technology Inc. Power Dissipation vs Output Power Output Power vs Load Resistance 1.8 0.7 1.6 0.5 0.4 RL=3Ω 1.4 VDD=5V THD+N=1% SE Each Channel Power Dissipation Output Power(W) 0.6 0.3 0.2 1.2 RL=4Ω 1 VDD=5V BTL Each Channel 0.8 0.6 0.4 0.1 RL=8Ω 0.2 0 0 4 8 12 16 20 24 28 32 0 0.5 1 1.5 2 2.5 Po-Output Power(W) Load Resistance(Ω) Figure 29 Figure 30 Power Dissipation vs Output Power Recommended PCB Footprint 0.35 Power Dissipation(W) 0.3 RL=4Ω 0.25 RL=8Ω 0.2 0.15 VDD=5V SE Each Channel 0.1 0.05 RL=32Ω 0 0 0.2 0.4 0.6 0.8 Po-Output Power(W) Figure 31 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 8 G1428 Global Mixed-mode Technology Inc. Pin Description PIN NAME 1,12,13,24 2 GND/HS GAIN0 I/O I Ground connection for circuitry, directly connected to thermal pad. Bit 0 of gain control 3 4 GAIN1 LOUT+ I O Bit 1 of gain control Left channel + output in BTL mode, + output in SE mode. 5 LLINEIN I Left channel line input, selected when HP/ LINE pin is held low. 6 LPHIN I Left channel headphone input, selected when HP/ LINE pin is held high. 7,18 8 9 10 11 14 PVDD RIN LOUTLIN BYPASS PC-BEEP I I O I 15 SE/ BTL I Power supply for output stages. Common right input for fully differential inputs. AC ground for single-ended inputs. Left channel - output in BTL mode, and high impedance in SE mode. Common left input for fully differential inputs. AC ground for single-ended inputs. Tap to voltage divider for internal mid-supply bias generator. The input for PC-BEEP mode. PC-BEEP is enabled when at least eight continuous > 1-VPP (peak to peak) square waves is input to PC-BEEP pin. Hold low for BTL mode, hold high for SE mode. 16 17 ROUTHP/ LINE O I 19 VDD Right channel - output in BTL mode, high impedance state in SE mode. MUX control input, hold high to select headphone inputs (6,20), hold low to select line inputs (5,23). Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance. I FUNCTION 20 RHPIN I Right channel headphone input, selected when HP/ LINE pin is held high. 21 22 ROUT+ O I Right channel + output in BTL mode, positive output in SE mode. Places entire IC in shutdown mode when held low, expect PC-BEEP remains active. I Right channel line input, selected when HP/ LINE pin is held low. SHUTDOWN 23 RLINEIN TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 9 G1428 Global Mixed-mode Technology Inc. Block Diagram RLINEIN RHPIN Right MUX _ ROUT+ + RIN PC-Beep PC-Beep _ GAIN0 GAIN1 SE/BTL HP/LINE LLINEIN LHPIN ROUT- + BYPASS Depop Circuitry Gain/MUX Control PVDD Power Management VDD SHUTDOWN GND Left MUX LOUT+ _ + LIN LOUT- _ + TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 10 G1428 Global Mixed-mode Technology Inc. Application Circuit Right Linein Negative Differential Input 1µF 23 RLINEIN 20 RHPIN Right MUX 1µF Right Hpin Negative Differential Input _ 8 14 PC-Beep 11 BYPASS 2 3 15 GAIN0 GAIN1 17 HP/LINE 5 LLINEIN 6 LHPIN SE/BTL Depop Circuitry 220µF VDD PVDD Gain/MUX Control Power Management VDD SHUTDOWN Left MUX LOUT+ 7,18 VDD 22 1µF 10µF Note 100K 1K 4 _ + 10 1K 19 1,12,13,24 GND Left Hpin Negative 1µF Differential Input Left Hpin/Linein Positive Differential Input 16 PC-Beep _ 2.2µF Left Linein Negative Differential Input 1µF ROUT- RIN + 1µF PC-BEEP Input Signal 21 + Right Hpin/Linein Positive 1µF Differential Input ROUT+ 220µF LIN 1µF LOUT- 3 _ + 0.1µF Application Circuit Using Differential Inputs Note: 1µF ceramic capacitor should be placed as close as possible to the IC to filter the higher-frequency noise. TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 11 G1428 Global Mixed-mode Technology Inc. Application Circuit (Continued) Right Hpin Input 1µF 23 RLINEIN 20 RHPIN Right MUX 1µF _ Right Linein Input ROUT+ 21 ROUT- 16 + RIN 14 PC-Beep 11 BYPASS 2 3 15 GAIN0 GAIN1 17 HP/LINE 5 LLINEIN 6 LHPIN 2.2µF Left Hpin Input 1µF SE/BTL Depop Circuitry Power Management VDD SHUTDOWN Left MUX LOUT+ 1K 7,18 VDD 19 22 1µF 10µF 1,12,13,24 GND 1µF Note 100K 1K 4 + 10 220µF VDD PVDD Gain/MUX Control _ Left Linein Input PC-Beep _ 1µF PC-BEEP Input Signal 8 + 1µF 220µF LIN 1µF LOUT- 3 _ + 0.1µF Application Circuit Using Single-Ended Inputs Note: 1µF ceramic capacitor should be placed as close as possible to the IC to filter the higher-frequency noise. TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 12 G1428 Global Mixed-mode Technology Inc. Application Information Table 2 Gain setting via GAIN0 and GAIN1 inputs The internal gain setting is determined by two input terminals, GAIN0 and GAIN1. The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This will cause the internal input impedance, ZI, to be dependent on the gain setting. Although the real input impedance will shift by 30% due to process variation from part-to-part, the actual gain settings are controlled by the ratios of the resistors and the actual gain distribution from part-topart is quite good. GAIN1 SE/ BTL AV (V/V) 0 0 0 -2 0 1 0 -6 1 0 0 -12 1 1 0 -24 X X 1 -1 AV (V/V) 15 -24 30 -12 45 -6 90 -2 Input Capacitor In the typical application, an input capacitor Ci is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case ,Ci and the input impedance of the amplifier, Zi, form a high-pass filter with the -3dB determined by the equation: f-3dB= 1/ (2πRI Ci) Table 1 GAIN0 Zi (Kohm) The value of Ci is important to consider as it directly affects the bass performance of the application circuit. For example, if the input resistor is 15kΩ, the input capacitor is 1µF, the flat bass response will be down to 10.6Hz. Because the small leakage current of the input capacitors will cause the dc offset voltage at the input to the amplifier that reduces the operation headroom, especially at the high gain applications. The lowleakage tantalum or ceramic capacitors are suggested to be used as the input coupling capacitors. When using the polarized capacitors, it is important to let the positive side connecting to the higher dc level of the application. Input Resistance The typical input impedance at each gain setting is given in the Table 2. Each gain setting is achieved by varying the input resistance of the amplifier, which can be over 6 times from its minimum value to the maximum value. As a result, if a single capacitor is used in the input high pass filter, the -3dB or cut-off frequency will be also change over 6 times. To reduce the variation of the cut-off frequency, an additional resistor can be connected from the input pin of the amplifier to the ground, as shown in Figure 1. With the extra resistor, the cut-off frequency can be re-calculated using equation : f-3dB= 1/ 2πC(R||RI). Using small external R can reduce the variation of the cut-off frequency. But the side effect is small external R will also let (R||RI) become small, the cut-off frequency will be larger and degraded the bass-band performance. The other side effect is with extra power dissipation through the external resistor R to the ground. So using the external resistor R to flatting the variation of the cut-off frequency, the user must also consider the bass-band performance and the extra power dissipation to choose the accepted external resistor R value. Power Supply Decoupling The G1428 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to make sure the output total harmonic distortion (THD) as low as possible. The optimum decoupling is using two capacitors with different types that target different types of noise on the power supply leads. For high frequency transients, spikes, a good low ESR ceramic capacitor works best, typically 0.1µF/1µF used and placed as close as possible to the G1428 VDD lead. A larger aluminum electrolytic capacitor of 10uF or greater placed near the device power is recommended for filtering low-frequency noise. Optimizing DEPOP Operation C Zi Input Signal Circuitry has been implemented in G1428 to minimize the amount of popping heard at power-up and when coming out of shutdown mode. Popping occurs whenever a voltage step is applied to the speaker and making the differential voltage generated at the two ends of the speaker. To avoid the popping heard, the bypass capacitor should be chosen promptly, 1/(CBx170kΩ) ≦ 1/(CI*(RI+RF)). Zf IN R Figure 1 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 13 G1428 Global Mixed-mode Technology Inc. Where 170kΩ is the output impedance of the mid-rail generator, CB is the mid-rail bypass capacitor, CI is the input coupling capacitor, RI is the input impedance, RF is the gain setting impedance which is on the feedback path. CB is the most important capacitor. Besides it is used to reduce the popping, CB can also determine the rate at which the amplifier starts up during startup or recovery from shutdown mode. De-popping circuitry of G1428 is shown as below Figure 2. The PNP transistor limits the voltage drop across the 120kΩ by slewing the internal node slowly when power is applied. At start-up, the voltage at BYPASS capacitor is 0. The PNP is ON to pull the mid-point of the bias circuit down. So the capacitor sees a lower effective voltage, and thus the charging is slower. This appears as a linear ramp (while the PNP transistor is conducting), followed by the expected exponential ramp of an R-C circuit. Output coupling capacitor G1428 can drive clean, low distortion SE output power with gain –1V/V into headphone loads (generally 16Ω or 32Ω) as in Figure 3. Please refer to Electrical Characteristics to see the performances. A coupling capacitor is needed to block the dc-offset voltage, allowing pure ac signals into headphone loads. Choosing the coupling capacitor will also determine the -3dB point of the high-pass filter network, as Figure 4. fC=1/(2πRLCC) For example, a 220µF capacitor with 32Ω headphone load would attenuate low frequency performance below 22.6Hz. So the coupling capacitor should be well chosen to achieve the excellent bass performance when in SE mode operation. VDD Vo(PP) For better performance, CB is recommended to be at least 1.5 times of input coupling capacitor CI. For example, if using 1uF input coupling capacitor, 2.2µF ceramic or tantalum low-ESR capacitors are recommended to achieve the better THD performance. CC RL Vo(PP) Figure 3 VDD 100 kΩ 120 kΩ Bypass -3 dB 100 kΩ fc Figure 4 Figure 2 TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 14 G1428 Global Mixed-mode Technology Inc. Bridged-Tied Load Mode Operation G1428 has two linear amplifiers to drive both ends of the speaker load in Bridged-Tied Load (BTL) mode operation. Figure 5 shows the BTL configuration. The differential driving to the speaker load means that when one side is slewing up, the other side is slewing down, and vice versa. This configuration in effect will double the voltage swing on the load as compared to a ground reference load. In BTL mode, the peak-to-peak voltage VO(PP) on the load will be two times than a ground reference configuration. The voltage on the load is doubled, this will also yield 4 times output power on the load at the same power supply rail and loading. Another benefit of using differential driving configuration is that BTL operation cancels the dc offsets, which eliminates the dc coupling capacitor that is needed to cancelled dc offsets in the ground reference configuration. Low-frequency performance is then limited only by the input network and speaker responses. Cost and PCB space can be minimized by eliminating the dc coupling capacitors. Shutdown mode When the normal operation, the SHUTDOWN pin should be held high. Pulling SHUTDOWN low will mute the outputs and deactivate almost circuits except PC-BEEP monitoring block. At this moment, the current of this device will be reduced to about 160uA to save the battery energy. The SHUTDOWN pin should never be left unconnected during the normal applications. INPUT * HP/ LINE SE/ BTL SHUTDOWN X Low High Low High High High Low High High High High INPUT OUTPUT X Line Line headphone headphone Mute BTL SE BTL SE PC-BEEP Operation The PC-BEEP input allows a system beep to be sent directly from a computer through the amplifier to the speakers with a few external components. It is activated automatically by detecting the PC-BEEP input. The preferred input signal is a square wave or pulse train with an amplitude of 1-VPP or greater. To be accurately detected, the signal must be with at least 1 -VPP amplitude, 8 continuous rising edges, rise and fall times less than 0.1us. When the signal is no longer detected, the amplifier will return its previous operating mode and volume setting. Vo(PP) RL X Low Low * Inputs should never be left unconnected X= do not care VDD VDD AMPLIFIER STATE 2xVo(PP) -Vo(PP) Figure 5 When the PC-BEEP mode is activated, both the LINEIN and HPIN are deselected and the outputs will be driven in BTL mode with the signal from PC-BEEP. The gain setting will be also fixed at 0.3V/V, independent of the volume setting. If the device is in the SHUTDOWN mode, activating PC-BEEP will take the device out of shutdown mode and output the PC-BEEP input signal until the PC-BEEP signal no longer detected. And then the device will return the shutdown mode when no PC-BEEP signal is detected. Input MUX And SE/BTL Operation The G1428 allows two different input sources applied to the audio amplifiers, which can be independent to the SE/BTL setting. When HP/LINE is held high, the headphone inputs are active. When the HP/LINE is held low, the line inputs are selected. When SE/BTL is held low, all four internal audio amplifiers are activated to drive the stereo speakers. When SE/BTL is held high, two amplifiers are activated to drive the stereo headphones. The other two amplifiers are disable and keeping the outputs high impedance. The PC-BEEP input can also be dc-coupled to save the coupling capacitor. This pin is set at mid-rail normally when no signal is present. If AC-coupling is desired, the value of the coupling capacitor should be chosen to satisfy the equation : CPCB≧ 1/( 2πfPCB*150KΩ) CPCB is the PC-BEEP AC-coupling capacitor. fPCB is the frequency of applied PC-BEEP input signal. TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 15 G1428 Global Mixed-mode Technology Inc. Package Information C D 24 L 1.88 1.88 3.85 E1 E 2.8 0.71 1 Note 5 θ A2 A A1 e b Note: 1. Package body sizes exclude mold flash protrusions or gate burrs 2. Tolerance ±0.1mm unless otherwise specified 3. Coplanarity : 0.1mm 4. Controlling dimension is millimeter. Converted inch dimensions are not necessarily exact. 5. Die pad exposure size is according to lead frame design. 6. Follow JEDEC MO-153 SYMBOL A A1 A2 b C D E E1 e L y θ MIN. DIMENSION IN MM NOM. MAX. MIN. DIMENSION IN INCH NOM. MAX. ----0.00 0.80 0.19 0.09 7.70 6.20 4.30 ----0.45 ----0º --------1.00 --------7.80 6.40 4.40 0.65 0.60 --------- 1.15 0.10 1.05 0.30 0.20 7.90 6.60 4.50 ----0.75 0.10 8º ----0.000 0.031 0.007 0.004 0.303 0.244 0.169 ----0.018 ----0º --------0.039 --------0.307 0.252 0.173 0.026 0.024 --------- 0.045 0.004 0.041 0.012 0.008 0.311 2.260 0.177 ----0.030 0.004 8º Taping Specification PACKAGE TSSOP-24 (FD) Q’TY/BY REEL 2,500 ea F e e d D ir e c tio n T y p ic a l T S S O P P a c k a g e O r ie n ta tio n GMT Inc. does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and GMT Inc. reserves the right at any time without notice to change said circuitry and specifications. TEL: 886-3-5788833 http://www.gmt.com.tw Ver: 1.2 Mar 31, 2005 16