YAGEO CC1812 Surface-mount ceramic multilayer capacitors mid-voltage: np0 x7r (pb free & rohs compliant) Datasheet

DATA SHEET
SURFACE-MOUNT CERAMIC
MULTILAYER CAPACITORS
Mid-voltage: NP0/X7R
(Pb Free & RoHS compliant)
100 V TO 500 V
Product specification – Sep 08, 2005 V. 0
10 pF to 470 nF
Product specification
Surface-Mount Ceramic Multilayer Capacitors
SCOPE
`
This specification describes Midvoltage NP0/X7R series chip
capacitors with lead-free
terminations.
NP0/X7R
100 V to 500 V
2
16
ORDERING INFORMATION
Part number is identified by the series, size, tolerance, packing style, TC
material, rated voltage and capacitance value.
YAGEO ORDERING CODE
CC
XXXX X X XXX X
(1)
APPLICATIONS
PCs, hard disk, game PCs
Power supplies
LCD panel
ADSL, modem
Mid-voltage
(2) (3) (4)
B
(5)
X XXX
(6)
(7)
(1) SIZE – INCH BASED (METRIC)
0603 (1608)
0805 (2012)
1206 (3216)
1210 (3225)
FEATURES
Supplied in tape on reel
Nickel-barrier end termination
1808 (4520)
1812 (4532)
(2) TOLERANCE
J = ±5%
K = ±10%
(3) PACKING STYLE
R = 7” paper tape
K = 7” blister tape
P = 13” paper tape
F = 13” blister tape
C = Bulk case
(4) TC MATERIAL
NP0
X7R
(5) RATED VOLTAGE
0 = 100 V
A = 200 V
Y = 250 V
B = 500 V
(6) PROCESS
B = BME
N = NME
(7) CAPACITANCE VALUE:
First two for significant figures and 3rd for number of zero
Letter “R” for decimal point
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
3
16
CONSTRUCTION
The capacitor consists of a
rectangular block of ceramic
dielectric in which a number of
interleaved metal electrodes are
contained. This structure gives
rise to a high capacitance per
unit volume.
The inner electrodes are
connected to the two end
terminations and finally covered
with a layer of plated tin (NiSn).
The terminations are lead-free. A
cross section of the structure is
shown in Fig.1.
terminations
electrodes
MLB457
ceramic material
Fig. 1 Surface mounted multilayer ceramic capacitor construction
DIMENSION
Table 1
For dimension see Table 1
W
T
L2
L4
L1
L3
TYPE
CC0603
CC0805
CC1206
CC1210
CC1808
CC1812
L1 (mm)
1.6 ±0.10
2.0 ±0.20
3.2±0.20
3.2 ±0.20
4.5 ±0.30
4.5 ±0.30
W (mm)
0.8 ±0.07 1.25 ±0.20
1.6±0.20
2.5 ±0.20
2.0 ±0.30
3.2 ±0.30
T
(mm)
MBB211
Fig. 2 Surface mounted multilayer
ceramic capacitor dimension
L2/L3
(mm)
L4
(mm)
Refer to table 2 to 7
min.
0.20
0.25
0.25
0.25
0.25
0.25
max.
0.50
0.75
0.75
0.75
0.75
0.75
min.
0.60
0.55
1.40
1.40
2.20
2.20
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
4
16
CAPACITANCE RANGE & THICKNESS FOR NP0 100V
Table 2 For NP0 100 V sizes from 0603 to 1812
CAPACITANCE
(pF)
100 V
0603
0805
0.8 ±0.10
0.6 ±0.10
1206
1210
1808
1812
0.6 ±0.10
1.25 ±0.20
1.25 ±0.20
10
12
15
18
22
27
33
39
47
56
68
82
100
120
150
0.6 ±0.10
180
220
270
330
390
470
560
680
820
1,000
1,200
1,500
0.85 ±0.10
1,800
2,200
2,700
3,300
3,900
1.25 ±0.20
0.85 ±0.10
4,700
5,600
1.15±0.15
0.85 ±0.10
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
5
16
Table 2 For NP0 100 V sizes from 0603 to 1812 (continued)
CAPACITANCE
(pF)
100 V
0603
0805
6,800
1206
1210
1808
1812
1.15±0.15
8,200
1.25 ±0.20
10,000
12,000
15,000
0.85 ±0.10
1.25 ±0.20
1.25 ±0.20
0.85 ±0.10
18,000
1.15±0.15
22,000
27,000
33,000
39,000
47,000
NOTE
1. Values in shaded cells indicate thickness class in mm.
2. Capacitance range < 10 pF is on request.
CAPACITANCE RANGE & THICKNESS FOR NP0 200/250 V
Table 3 For NP0 200/250 V sizes from 0603 to 1812
CAPACITANCE
(pF)
200/250 V
0603
0805
1206
0.8 ±0.10
0.6 ±0.10
0.6 ±0.10
1210
1808
1812
10
12
15
18
22
27
33
39
47
56
68
82
100
120
150
180
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Table 3
Mid-voltage
NP0/X7R
100 V to 500 V
6
16
For NP0 200/250 V sizes from 0603 to 1812 (continued)
CAPACITANCE
(pF)
200/250 V
0603
0805
0.8 ±0.10
0.85 ±0.10
1206
1210
1808
1812
220
270
330
390
0.6 ±0.10
470
560
1.25 ±0.20
680
820
0.8 ±0.10
1,000
0.85 ±0.10
1,200
1.25 ±0.20
1,500
1.25 ±0.20
1.15±0.15
1,800
0.8 ±0.10
2,200
1.25 ±0.20
0.85 ±0.10
1.25 ±0.20
2,700
1.25 ±0.20
3,300
1.15±0.15
3,900
0.85 ±0.10
4,700
1.25 ±0.20
1.15±0.15
5,600
6,800
8,200
10,000
NOTE
1. Values in shaded cells indicate thickness class in mm.
2. Capacitance range < 10 pF is on request.
CAPACITANCE RANGE & THICKNESS FOR NP0 500 V
Table 4 For NP0 500 V sizes from 0805 to 1812
CAPACITANCE
(pF)
500 V
0805
1206
0.6 ±0.10
0.6 ±0.10
1210
1808
1812
10
12
15
18
22
27
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
7
16
Table 4 For NP0 500 V sizes from 0805 to 1812 (continued)
CAPACITANCE
500 V
(pF)
0805
1206
0.6 ±0.10
0.6 ±0.10
1210
1808
1812
33
39
47
56
68
82
100
120
150
180
0.85 ±0.10
220
270
330
0.85 ±0.10
390
470
0.85 ±0.10
560
680
820
1.25 ±0.20
1.15±0.15
1,000
1,200
0.8 ±0.10
1,500
1,800
2,200
2,700
1.15±0.15
1.25 ±0.20
1.25 ±0.20
1.25 ±0.20
1.25 ±0.20
1.15±0.15
3,300
3,900
4,700
1.25 ±0.20
5,600
6,800
8,200
10,000
NOTE
1. Values in shaded cells indicate thickness class in mm.
2. Capacitance range < 10 pF is on request.
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
8
16
CAPACITANCE RANGE & THICKNESS FOR X7R 100V
Table 5 For X7R 100 V sizes from 0805 to 1812
CAPACITANCE
(pF)
100 V
0603
0805
1206
0.6 ±0.10
0.85 ±0.10
1210
1808
1812
100
150
220
330
470
680
1,000
0.8 ±0.10
1,500
2,200
3,300
4,700
6,800
10,000
15,000
22,000
33,000
47,000
0.85 ±0.10
1.25 ±0.20
68,000
100,000
0.85 ±0.10
1.15±0.15
0.85 ±0.10
150,000
1.15±0.15
220,000
1.6 ±0.20
1.25 ±0.20
1.15±0.15
330,000
470,000
1.6 ±0.20
680,000
1,000,000
NOTE
1. Values in shaded cells indicate thickness class in mm.
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
9
16
CAPACITANCE RANGE & THICKNESS FOR X7R 200/250 V
Table 6 For X7R 200/250 V sizes from 0805 to 1812
CAPACITANCE
(pF)
200/250 V
0805
1206
1210
1808
1812
100
150
220
330
470
680
1,000
0.85 ±0.10
1,500
2,200
3,300
0.85 ±0.10
4,700
6,800
10,000
1.25 ±0.20
15,000
0.8 ±0.10
22,000
1.25 ±0.20
33,000
47,000
68,000
100,000
0.85 ±0.10
1.15±0.15
1.15±0.15
1.25 ±0.20
1.25 ±0.20
1.25 ±0.20
1.15±0.15
150,000
220,000
1.6 ±0.20
330,000
2.0 ±0.20
470,000
680,000
1,000,000
NOTE
1. Values in shaded cells indicate thickness class in mm.
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
10
16
CAPACITANCE RANGE & THICKNESS FOR X7R 500 V
Table 7 For X7R 500 V sizes from 0805 to 1812
CAPACITANCE
(pF)
500 V
0805
1206
1210
1808
1812
100
150
220
330
470
680
1,000
0.8 ±0.10
1,500
1.15±0.15
2,200
3,300
4,700
1.15±0.15
0.85 ±0.10
6,800
10,000
1.25 ±0.20
1.25 ±0.20
15,000
1.25 ±0.20
22,000
33,000
47,000
1.15±0.15
1.25 ±0.20
1.6 ±0.20
1.25 ±0.20
68,000
100,000
1.6 ±0.20
150,000
220,000
330,000
470,000
680,000
1,000,000
NOTE
1. Values in shaded cells indicate thickness class in mm.
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
NP0/X7R
Mid-voltage
100 V to 500 V
11
16
THICKNESS CLASSES AND PACKING QUANTITY
Table 8
DESCRIPTION
SIZE
CODE
THICKNESS
CLASSIFICATION
(mm)
8 mm TAPE WIDTH/AMOUNT PER REEL
Ø180 mm, 7”
Ø330 mm, 13”
12 mm TAPE WIDTH
/AMOUNT PER REEL
Paper
Blister
Paper
Blister
Ø180 mm, 7” Blister
0603
0.8 ±0.10
4,000
---
---
---
---
0805
0.6 ±0.10
4,000
---
---
---
---
0.8 ±0.10
4,000
---
---
---
---
0.85 ±0.1
4,000
---
---
---
---
1.25 ±0.20
---
3,000
---
---
---
0.6 ±0.10
4,000
---
20,000
---
---
0.8 ±0.10
4,000
---
---
---
---
0.85 ±0.10
4,000
---
15,000
---
---
1.00 ±0.10
---
3,000
---
10,000
---
1.15 ±0.15
---
3,000
---
10,000
---
1.25 ±0.20
---
3,000
---
---
---
0.6 ±0.10
---
4,000
---
15,000
---
0.85 ±0.10
---
4,000
---
10,000
---
1.15 ±0.15
---
3,000
---
10,000
---
1.25 ±0.20
---
3,000
---
---
---
1.6 ±0.20
---
2,000
---
---
---
1.15 ±0.15
---
---
---
---
1,500
1.25 ±0.20
---
---
---
---
3,000
1.35 ±0.15
---
---
---
---
1,000
1.5 ±0.10
---
---
---
---
1,000
1.6 ±0.20
---
---
---
---
2,000
2.0 ±0.20
---
---
---
---
2,000
0.85 ±0.10
---
---
---
---
2,000
1.15 ±0.15
---
---
---
---
1,500
1.25 ±0.20
---
---
---
---
1,000
1.35 ±0.15
---
---
---
---
1,000
1.5 ±0.1
---
---
---
---
1,000
1.6 ±0.2
---
---
---
---
1,000
2.0 ±0.20
---
---
---
---
2,000
1206
1210
Mid / High
voltage
1808
1812
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
12
16
100 V to 500 V
ELECTRICAL CHARACTERISTICS
NP0/X7R DIELECTRIC CAPACITORS; NISN TERMINATIONS
Unless otherwise stated all electrical values apply at an ambient temperature of 20±1 °C, an atmospheric
pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%.
Table 9
VALUE
DESCRIPTION
Capacitance range (1)
Capacitance
tolerance (1)
10 pF to 470 nF
:
NP0
X7R
Dissipation factor
NP0
X7R
±5%
±10%
(D.F.) (1):
Insulation resistance after 1 minute at Ur (DC)
≤ 0.1%
≤ 2.5%
Rins ≥ 10 GΩ or Rins × C ≥ 500 seconds whichever is less
Maximum capacitance change as a function of temperature
(temperature characteristic/coefficient):
NP0
X7R
Operating temperature range:
NP0/X7R
±30 ppm/°C
±15%
–55 °C to +125 °C
NOTE
1. NP0: frequency = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms; frequency = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms
X7R: frequency = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms.
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
13
16
TESTS AND REQUIREMENTS
Table 10 Test condition, procedure and requirements
TEST
Mounting
Visual
inspection and
dimension
check
Capacitance
TEST METHOD
PROCEDURE
REQUIREMENTS
IEC 6038421/22
4.3
The capacitors may be mounted on printed-circuit boards or
ceramic substrates
No visible damage
4.4
Any applicable method using × 10 magnification
In accordance with
specification
4.5.1
NP0:
f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C;
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
Within specified tolerance
X7R:
f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C
Dissipation
factor (D.F.)
4.5.2
NP0: f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20
°C; f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
In accordance with
specification
X7R: f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20
°C
Insulation
resistance
Voltage proof
4.5.3
At Ur (DC) for 1 minute
In accordance with
specification
4.5.4.2
Test voltage (DC) applied for 1 minute
No breakdown or
flashover
Ur ≤ 100 V: 2.5 × Ur applied to NP0/X7R series
100 V < Ur ≤ 200 V: 1.5 × Ur +100 V applied to NP0/X7R series
200 V < Ur ≤ 500 V: 1.3 × Ur +100 V applied to NP0/X7R series
Ur > 500 V: 1.3 × Ur applied to NP0/X7R series
I: 7.5 mA
Temperature
characteristic
Adhesion
4.6
Between minimum and maximum temperature
NP0: l∆C/Cl: 30 ppm/°C
X7R: l∆C/Cl: 15%
4.15
A force applied for 10 seconds to the line joining the terminations
and in a plane parallel to the substrate
for size ≥ 0603: a force of 5 N applied
for size 0402: a force of 2.5 N applied
No visible damage
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
14
16
Table 10 Test condition, procedure and requirements (continued)
TEST
Bond strength
of plating on
end face
TEST METHOD
PROCEDURE
REQUIREMENTS
IEC 6038421/22
Mounting in accordance with IEC 60384-22 paragraph
4.3
No visible damage
Conditions: bending 1 mm at a rate of 1 mm/s, radius jig
340 mm
NP0: l∆C/Cl: ≤ 1% or 0.5 pF
whichever is greater
4.8
X7R: l∆C/Cl: ≤ 10%
Resistance to
soldering heat
4.9
Precondition: 150 +0/–10 °C for 1 hour, then keep for
24 ±1 hours at room temperature
Preheating: for size ≤ 1206: 120 to 150 °C for 1 minute
Preheating: for size >1206: 100 to 120 °C for 1 minute
and 170 to 200 °C for 1 minute
Solder bath temperature: 260 ±5 °C
Dipping time: 10 ±0.5 seconds
The termination shall be well tinned
NP0: l∆C/Cl: ≤ 0.5% or 0.5 pF
whichever is greater
X7R: l∆C/Cl: ≤ 10%
D.F.: within initial specified value
Rins: within initial specified value
Recovery time: 24 ±2 hours.
Solderability
4.10
Unmounted chips completely immersed in a solder bath
at 235 ±5 °C
The termination shall be well
tinned.
Dipping time: 2 ±0.5 seconds
Depth of immersion: 10 mm
Rapid change
of
temperature
4.11
Preconditioning;
150 +0/–10 °C for 1 hour, then keep for 24 ±1 hours at
room temperature
No visual damage
5 cycles with following detail:
30 minutes at lower category temperature;
30 minutes at upper category temperature
X7R: l∆C/Cl: ≤ 15%
NP0: l∆C/Cl: ≤ 1% or 1 pF
whichever is greater
D.F.: within initial specified value
Rins: within initial specified value
Recovery time 24 ±2 hours.
Damp heat,
with Ur load
4.13
Initial measurements; after 150 +0/-10 °C for 1 hour,
then keep for 24 ±1 hours at room temperature
NP0: l∆C/Cl: ≤ 2% or 1 pF
whichever is greater
Duration and conditions: 500 ±12 hours at 40 ±2 °C;
90 to 95% RH; Ur applied
X7R: l∆C/Cl: ≤ 15%
Final measurement: perform a heat treatment at
150 +0/–10 °C for 1 hour, final measurements shall be
carried out 24 ±1 hours after recovery at room
temperature without load.
NP0: D.F.: 2 × initial value max.
X7R ≥ 100 V: D.F. ≤ 5%
NP0: Rins ≥ 2,500 MΩ or Rins × Cr
≥ 25 seconds, whichever is less
X7R: Rins ≥ 500 MΩ or Rins × Cr ≥
25 seconds, whichever is less
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
15
16
Table 10 Test condition, procedure and requirements (continued)
TEST
Endurance
TEST METHOD
PROCEDURE
REQUIREMENTS
IEC 6038421/22
Preconditioning;
Initial measurements; after 150 +0/-10 °C for 1 hour,
then keep for 24 ±1 hours at room temperature
NP0: l∆C/Cl: ≤ 2% or 1 pF whichever
is greater
4.14
X7R: l∆C/Cl: ≤ 15%
Duration and conditions: 1,000 ±12 hours at upper
category temperature with 1.5 × Ur voltage applied
NP0: D.F.: 2 × initial value max.
Final measurement: perform a heat treatment at 150
+0/–10 °C for 1 hour, final measurements shall be
carried out 24 ±1 hours after recovery at room
temperature without load.
NP0: Rins ≥ 4,000 MΩ or Rins × Cr ≥
40 seconds, whichever is less
X7R ≥ 100 V: D.F. ≤ 5%
X7R: Rins ≥ 1,000 MΩ or Rins × Cr ≥
50 seconds, whichever is less
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Sep 08, 2005 V.0
Product specification
Surface-Mount Ceramic Multilayer Capacitors
Mid-voltage
NP0/X7R
100 V to 500 V
16
16
REVISION HISTORY
REVISION DATE
CHANGE NOTIFICATION
DESCRIPTION
Version 0
-
- New
Sep 08, 2005
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Sep 08, 2005 V.0
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