LTC1164-6 Low Power 8th Order Pin Selectable Elliptic or Linear Phase Lowpass Filter U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ 8th Order Pin Selectable Elliptic or Bessel Filter in a 14-Pin Package 4mA Supply Current with ±5V Supplies 64dB Attenuation at 1.44 fCUTOFF (Elliptic Response) fCUTOFF up to 30kHz (50:1 fCLK to fCUTOFF Ratio) 110µVRMS Wideband Noise with ±5V Supplies Operates at Single 5V Supply with 1VRMS Input Range Operates up to ±8V Supplies TTL/CMOS Compatible Clock Input No External Components UO APPLICATI ■ ■ Anti-Aliasing Filters Battery-Operated Instruments Telecommunication Filters The LTC1164-6 provides an elliptic lowpass rolloff with stopband attenuation of 64dB at 1.44 fCUTOFF and an fCLKto-fCUTOFF ratio of 100:1 (pin 10 to V –). For a ratio of 100:1, fCUTOFF can be clock-tuned up to 10kHz. For a fCLK-tofCUTOFF ratio of 50:1 (pin 10 to V +), the LTC1164-6 provides an elliptic lowpass filter with fCUTOFF frequencies up to 20kHz. When pin 10 is connected to ground, the LTC1164-6 approximates an 8th order linear phase response with 65dB attenuation at 4.5 f – 3dB and fCLK / f – 3dB ratio of 160:1. The LTC1164-6 is pin compatible with the LTC1064-1. UO ■ S The LTC1164-6 is a monolithic 8th order elliptic lowpass filter featuring clock-tunable cutoff frequency and low power supply current. Low power operation is achieved without compromising noise or distortion performance. At ±5V supplies the LTC1164-6 uses only 4mA supply current while keeping wideband noise below 110µVRMS. With a single 5V supply, the LTC1164-6 can provide up to 10kHz cutoff frequency and 80dB signal-to-noise ratio while consuming only 2.5mA. TYPICAL APPLICATI 10kHz Anti-Aliasing Elliptic Filter VIN 1 14 2 13 3 8V 4 12 LTC1164-6 11 5 10 6 9 7 8 0 NC –10 –8V –20 CLK = 1MHz –8V VOUT GAIN (dB) NC Frequency Response –30 –40 –50 –60 1164-6 TA01 –70 WIDEBAND NOISE = 115µVRMS NOTE: THE CONNECTION FROM PIN 7 TO PIN 14 SHOULD BE MADE UNDER THE PACKAGE. THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1µF CAPACITOR AS CLOSE TO THE PACKAGE AS POSSIBLE. –80 1 10 FREQUENCY (kHz) 100 1164-6 TA02 1 LTC1164-6 W W W AXI U U ABSOLUTE RATI GS (Note 1) Total Supply Voltage (V + to V –) ............................. 16V Input Voltage (Note 2) ......... (V ++ 0.3V) to (V – – 0.3V) Output Short-Circuit Duration ......................... Indefinite Power Dissipation............................................. 400mW Burn-In Voltage ...................................................... 16V Operating Temperature Range LTC1164-6C ...................................... – 40°C to 85°C LTC1164-6M ................................... – 55°C to 125°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U W U PACKAGE/ORDER I FOR ATIO TOP VIEW ORDER PART NUMBER TOP VIEW NC 1 14 CONNECT 2 NC 1 16 CONNECT 2 VIN 2 13 NC VIN 2 15 NC 3 V– GND 3 14 V – GND 12 V+ 4 11 CLK GND 5 10 ELL/BESS LP6 6 9 CONNECT 1 7 J PACKAGE 14-LEAD CERAMIC DIP 8 VOUT LTC1164-6CN LTC1164-6CJ LTC1164-6MJ V+ GND 5 12 CLK NC 6 11 ELL/BESS LP6 7 NC 10 NC CONNECT 1 8 N PACKAGE 14-LEAD PLASTIC DIP LTC1164-6CS 13 NC 4 ORDER PART NUMBER 9 VOUT S PACKAGE 16-LEAD PLASTIC SOL TJMAX = 150°C, θJA = 65°C/W (J) TJMAX = 110°C, θJA = 65°C/W (N) TJMAX = 110°C, θJA = 85°C/W ELECTRICAL CHARACTERISTICS VS = ±7.5V, RL = 10k, TA = 25°C, fCLK = 400kHz, TTL or CMOS level (maximum clock rise or fall time ≤ 1µs) and all gain measurements are referenced to passband gain, unless otherwise specified. (fCLK /fCUTOFF) = 4kHz at 100:1 and 8kHz at 50:1. PARAMETER Passband Gain 0.1Hz to 0.25 fCUTOFF (Note 4) Passband Ripple with VS = Single 5V Gain at 0.50 fCUTOFF (Note 3) Gain at 0.90 fCUTOFF (Note 3) Gain at 0.95 fCUTOFF (Note 3) Gain at fCUTOFF (Note 3) Gain at 1.44 fCUTOFF (Note 3) Gain at 2.0 fCUTOFF (Note 3) Gain with fCLK = 20kHz Gain with VS = ±2.375V Input Frequency Range (Tables 3, 4) Maximum fCLK (Table 3) 2 CONDITIONS fIN = 1kHz, (fCLK / fC) = 100:1 1Hz to 0.8 fC (Table 2) fIN = 2kHz, (fCLK / fC) = 100:1 fIN = 3.6kHz, (fCLK / fC) = 100:1 fIN = 3.8kHz, (fCLK / fC) = 100:1 fIN = 4kHz, (fCLK / fC) = 100:1 fIN = 8kHz, (fCLK / fC) = 50:1 fIN = 5.76kHz, (fCLK / fC) = 100:1 fIN = 8kHz, (fCLK / fC) = 100:1 fIN = 200Hz, (fCLK / fC) = 100:1 fIN = 400kHz, fIN = 2kHz, (fCLK / fC) = 100:1 fIN = 400kHz, fIN = 4kHz, (fCLK / fC) = 100:1 (fCLK / fC) = 100:1 (fCLK / fC) = 50:1 VS ≥ ±7.5V VS ≤ ±5V VS = Single 5V, AGND = 2V ● ● ● ● ● ● ● ● MIN – 0.50 – 0.45 – 0.75 –1.40 – 3.50 – 3.00 –69 – 69 – 3.50 – 0.50 – 3.30 TYP – 0.15 0.1 to – 0.3 – 0.10 – 0.30 – 0.70 – 2.70 – 2.10 – 64 – 64 – 2.70 – 0.10 – 2.50 0 – <fCLK/2 0 – <fCLK 1.5 1.0 1.0 MAX 0.25 0.10 0.10 – 0.40 – 2.30 – 1.50 – 58 – 58 – 2.30 0.30 – 2.00 UNITS dB dB dB dB dB dB dB dB dB dB dB dB kHz kHz MHz MHz MHz LTC1164-6 ELECTRICAL CHARACTERISTICS VS = ±7.5V, RL = 10k, TA = 25°C, fCLK = 400kHz, TTL or CMOS level (maximum clock rise or fall time ≤ 1µs) and all gain measurements are referenced to passband gain, unless otherwise specified. (fCLK / fCUTOFF) = 4kHz at 100:1 and 8kHz at 50:1. PARAMETER Clock Feedthrough CONDITIONS Input at GND, f = fCLK, Square Wave VS = ±7.5V, (fCLK / fC) = 100:1 VS = ±5V, (fCLK / fC) = 50:1 Input at GND, 1Hz ≤ f < fCLK VS = ±7.5V VS = ±2.5V Wideband Noise Input Impedance Output DC Voltage Swing MIN VS = ±2.375V VS = ±5V VS = ±7.5V VS = ±5V, (fCLK / fC) = 100:1 VS = ±5V, (fCLK / fC) = 100:1 VS = ±2.375V, TA > 25°C Output DC Offset Output DC Offset TempCo Power Supply Current ● ● ● TYP 30 ±1.25 ±3.70 ±5.40 MAX 500 200 µVRMS µVRMS 115 ± 5% 100 ± 5% 40 ±1.50 ±4.10 ±5.90 ±100 ±100 2.5 µVRMS µVRMS kΩ V V V mV µV/°C mA mA mA mA mA mA V ● VS = ±5V, TA > 25°C 4.5 ● VS = ±7.5V, TA > 25°C 7.0 ● ±2.375 Power Supply Range The ● denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which life of the device may be impaired. Note 2: Connecting any pin to voltages greater than V + or less than V – UNITS 70 ±160 4.0 4.5 7.0 8.0 11.0 12.5 ±8 may cause latch-up. It is recommended that no sources operating from external supplies be applied prior to power-up of the LTC1164-6. Note 3: All gains are measured relative to passband gain. Note 4: The cutoff frequency of the filter is abbreviated as fCUTOFF or fC. U W TYPICAL PERFOR A CE CHARACTERISTICS Stopband Gain vs Frequency (Elliptic Response) Stopband Gain vs Frequency (Elliptic Response) 10 10 0 –10 GAIN (dB) –20 –30 –40 –50 –10 –20 –30 –40 –50 –60 –60 –70 –70 –80 –80 –90 2 4 6 8 10 12 14 16 18 20 22 FREQUENCY (kHz) 1164-6 G01 VS = ±5V fCLK = 250kHz (fCLK /fC) = 50:1 (PIN 10 AT V +) TA = 25°C WITH EXTERNAL SINGLE POLE LOWPASS RC FILTER (f – 3dB = 10kHz) 0 GAIN (dB) VS = ±5V fCLK = 500kHz fC = 5kHz (fCLK /fC) = 100:1 (PIN 10 AT V – ) TA = 25°C –90 2 4 6 8 10 12 14 16 18 20 22 FREQUENCY (kHz) 1164-6 G02 3 LTC1164-6 U W TYPICAL PERFOR A CE CHARACTERISTICS Stopband Gain vs Frequency (Linear Phase Response) Passband Gain and Phase vs Frequency 10 GAIN (dB) –20 –30 GAIN (dB) –10 –40 –50 –60 0 1.5 –45 1.0 –90 0.5 –135 0 –180 –0.5 –225 –1.0 –2.0 B –80 –270 VS = ±5V fCLK = 500kHz fC = 5kHz (fCLK /fC) = 100:1 (PIN 10 AT V – ) TA = 25°C –1.5 A –70 –90 2.0 –2.5 –315 –360 –405 –450 –3.0 2 6 10 14 18 22 26 30 34 38 42 FREQUENCY (kHz) 4 2 3 FREQUENCY (kHz) 1 5 1164-6 G03 0.4 0 3 0 0.4 2 –30 0.2 1 –60 0 –90 –0.2 PHASE 0 GAIN (dB) –0.8 VS = ±5V fCLK = 500kHz fC = 5kHz (fCLK /fC) = 100:1 (PIN 10 AT V – ) TA = 25°C (10 REPRESENTATIVE UNITS) –1.6 –2.0 –2.4 –2.8 –1 –120 GAIN –2 –3 –4 –5 –6 –150 –180 VS = ±5V fCLK = 800kHz fC = 5kHz (fCLK /fC) = 160:1 (PIN 10 AT GND) TA = 25°C –7 0.4 1.0 2.2 2.8 1.6 FREQUENCY (kHz) 3.4 4.0 1 4 2 3 FREQUENCY (kHz) 0 – 0.5 –1.0 –1.5 D –1.2 –270 –1.4 –300 –1.6 5 FREQUENCY (kHz) 1 1 5 INPUT FREQUENCY (kHz) 10 1164-6 G07 0 –45 –90 A –135 0 B –1 PHASE –2 –3 –4 –7 –8 –180 A –225 –270 B –315 VS = ±5V fCLK = 250kHz fC = 5kHz (fCLK /fC) = 50:1 (PIN 10 AT V – ) TA = 25°C –360 –405 –450 –495 –540 –9 10 1164-6 G06 4 –240 VS = ±5V fCLK = 1MHz fC = 10kHz (fCLK /fC) = 100:1 (PIN 10 AT V – ) 2 –6 –2.0 – 3.0 –1.0 3 –5 C –0.8 –210 1 GAIN (dB) GAIN (dB) 0.5 B –0.6 1 2 3 4 FREQUENCY (kHz) 5 1164-6 G08 PHASE (DEG) A. fCLK = 400kHz f CUTOFF = 4kHz B. fCLK = 600kHz f CUTOFF = 6kHz C. fCLK = 800kHz f CUTOFF = 8kHz D. fCLK = 1MHz f CUTOFF = 10kHz VS = ±5V (fCLK /fC) = 100:1 (PIN 10 AT V – ) TA = 25°C A A.T A = 125°C B.T A = 85°C D.T A = –40°C Passband Gain and Phase vs Frequency and fCLK 2.0 –2.5 B C 1164-6 G11 Passband vs Frequency and fCLK 1.0 A –0.4 5 1164-6 G05 1.5 PHASE (DEG) –0.4 –1.2 Maximum Passband over Temperature GAIN (dB) 0.8 GAIN (dB) 1164-6 G04 Passband Gain and Phase vs Frequency (Linear Phase Response) Passband Gain vs Frequency PHASE (DEG) A.RESPONSE WITHOUT EXTERNAL RC FILTER B.RESPONSE WITH AN EXTERNAL SINGLE POLE LOWPASS RC FILTER (f – 3dB AT 10kHz) VS = ±5V fCLK = 800kHz fC = 5kHz (fCLK /fC) = 160:1 (PIN 10 AT GND) TA = 25°C 0 A.RESPONSE WITHOUT EXTERNAL SINGLE POLE RC FILTER B.RESPONSE WITH AN EXTERNAL SINGLE POLE LOWPASS RC FILTER (f – 3dB AT 10kHz) LTC1164-6 U W TYPICAL PERFOR A CE CHARACTERISTICS Maximum Passband over Temperature Passband vs Frequency and fCLK 2.0 1.0 0 –0.5 A B –1.0 –1.5 1.5 1.0 C –2.5 1 0 TA = –40°C –0.5 –1.0 VS = SINGLE 5V (fCLK /fC) = 50:1 GND = 2V WITH EXTERNAL RC LOWPASS FILTER (f – 3dB = 40kHz) –1.5 VS = ±8V (fCLK /f C) = 50:1 (PIN 10 AT V +) TA = 25°C –2.0 TA = 70°C 0.5 GAIN (dB) GAIN (dB) 0.5 –3.0 2.0 A. fCLK = 250kHz f CUTOFF = 5kHz B. fCLK = 500kHz f CUTOFF = 10kHz C. fCLK = 1MHz f CUTOFF = 20kHz 1.5 –2.0 –2.5 10 FREQUENCY (kHz) –3.0 30 2 4 6 8 10 12 14 16 18 20 22 FREQUENCY (kHz) 1164-6 G09 Group Delay vs Frequency (Linear Phase Response) Group Delay vs Frequency (Elliptic Response) – 40 A.f CLK = 250kHz, (fCLK /fC) = 50:1 WITH EXTERNAL RC LOWPASS FILTER (f C = 10kHz) B.f CLK = 500kHz (f CLK /fC) = 100:1 GROUP DELAY (µs) 600 150 100 500 400 300 200 2 3 4 5 6 7 8 FREQUENCY (kHz) 9 2 4 3 FREQUENCY (kHz) 1 5 THD + NOISE (dB) – 50 –70 –75 –55 –40 VS = SINGLE 5V, VIN = 0.7VRMS fCLK = 500kHz, fC = 5kHz, (fCLK /fC) = 100:1, TA = 25°C (5 REPRESENTATIVE UNITS) –50 –60 –65 –70 –75 –55 –60 –65 –70 –75 –80 –80 –85 –85 –85 –90 –90 0.5 5 FREQUENCY (kHz) 10 –90 1 5 FREQUENCY (kHz) 1164-6 G14 VS = ±5V VIN = 1VRMS fCLK = 800kHz fC = 5kHz (fCLK /fC) = 160:1 TA = 25°C –45 –80 1 5 4 THD + Noise vs Frequency (Linear Phase Response) THD + NOISE (dB) –45 –65 2 3 FREQUENCY (kHz) 1164-6 G13 – 40 VS = ±5V, VIN = 1VRMS, fCLK = 500kHz, fC = 10kHz, (fCLK /fC) = 50:1, TA = 25°C, WITH EXTERNAL RC LOWPASS FILTER (f – 3dB = 20kHz) (5 REPRESENTATIVE UNITS) –60 –75 THD + Noise vs Frequency (Elliptic Response) – 40 –55 –70 1164-6 G12 THD + Noise vs Frequency (Elliptic Response) – 50 –65 –90 1 10 11 1164-6 G22 –45 –60 –85 0 1 –55 –80 VS = ±5V fC = 5kHz TA = 25°C 100 0 – 50 A B 50 VS = ±5V, VIN = 1VRMS (20k RESISTOR PIN 14 TO V – ) fCLK = 500kHz, fC = 5kHz (fCLK /fC) = 100:1, TA = 25°C (5 REPRESENTATIVE UNITS) –45 THD + NOISE (dB) fCLK = 800kHz (fCLK /fC) = 160:1 fC = 5kHz 200 THD + NOISE (dB) THD + Noise vs Frequency (Elliptic Response) 700 250 GROUP DELAY (µs) 1164-6 G10 1164-6 G16 1 2 3 FREQUENCY (kHz) 5 4 1164-6 G23 5 LTC1164-6 U W TYPICAL PERFOR A CE CHARACTERISTICS THD + Noise vs RMS Input (Elliptic Response) – 40 –40 –45 – 50 –50 –55 –55 –60 VS = ±5V –65 –70 –75 –80 11 A –65 –70 –75 –85 –90 0.1 –90 0.1 5 25°C 7 125°C 6 5 4 2 A. GND = 2.5V B. GND = 2V 1 0 1 2 0 INPUT (VRMS) 1164-6 G17 1 2 3 4 5 6 7 8 POWER SUPPLY (V + OR V –) 1164-6 G18 Transient Response 9 10 1164-6 G19 2V/DIV 2V/DIV Transient Response 1ms/DIV U U U PI FU CTIO S 1164-6 G21 VS = ±7.5V, VIN = ±3V 100Hz SQUARE WAVE fCLK = 800kHz, (fCLK /f C) = 160:1, fCUTOFF = 5kHz LINEAR PHASE RESPONSE (14-Lead Dual-In-Line Package) Power Supply Pins (4, 12) – 1ms/DIV 1164-6 G20 VS = ±7.5V, VIN = ±3V 100Hz SQUARE WAVE fCLK = 500kHz, (fCLK /f C) = 100:1, fCUTOFF = 5kHz ELLIPTIC RESPONSE The V (pin 4) and the V (pin 12) should be bypassed with a 0.1µF capacitor to an adequate analog ground. The filter’s power supplies should be isolated from other digital or high voltage analog supplies. A low noise linear supply is recommended. Using a switching power supply will lower the signal-to-noise ratio of the filter. The supply during power-up should have a slew rate less than 1V/µs. When V + is applied before V – and V – could go above ground, a signal diode must be used to clamp V –. Figures 6 8 3 INPUT (VRMS) + 9 B –60 –85 –55°C 10 –80 VS = ±7.5V 1 12 (fCLK /fC) = 100:1 OR 50:1 fIN = 1kHz, TA = 25°C CURRENT (mA) (fCLK /fC) = 100:1 OR 50:1 fIN = 1kHz, TA = 25°C THD + NOISE (dB) THD + NOISE (dB) –45 Power Supply Current vs Power Supply Voltage THD + Noise vs RMS Input for Single 5V (Elliptic Response) 1 and 2 show typical connections for dual and single supply operation. Clock Input Pin (11) Any TTL or CMOS clock source with a square-wave output and 50% duty cycle (±10%) is an adequate clock source for the device. The power supply for the clock source should not be the filter’s power supply. The analog ground for the filter should be connected to clock’s ground at a single point only. Table 1 shows the clock’s low and high LTC1164-6 U U U PI FU CTIO S (14-Lead Dual-In-Line Package) level threshold value for a dual or single supply operation. A pulse generator can be used as a clock source provided the high level ON time is greater than 0.5µs. Sine waves are not recommended for clock input frequencies less than 100kHz, since excessively slow clock rise or fall times generate internal clock jitter (maximum clock rise or fall time ≤ 1µs). The clock signal should be routed from the right side of the IC package to avoid coupling into any input or output analog signal path. A 1k resistor between clock source and pin 11 will slow down the rise and fall times of the clock to further reduce charge coupling, Figures 1 and 2. V– VIN 1 14 2 13 3 12 4 V+ 0.1µF LTC1164-6 0.1µF 1k 11 5 10 6 9 7 * CLOCK SOURCE * OPTIONAL VOUT 1164-6 F01 Figure 1. Dual Supply Operation for fCLK/fCUTOFF = 100:1 1 14 2 13 3 12 4 V+ 0.1µF 10k 10k LTC1164-6 The filter performance depends on the quality of the analog signal ground. For either dual or single supply operation, an analog ground plane surrounding the package is recommended. The analog ground plane should be connected to any digital ground at a single point. For dual supply operation, pins 3 and 5 should be connected to the analog ground plane. For single supply operation pins 3 and 5 should be biased at 1/2 supply and they should be bypassed to the analog ground plane with at least a 1µF capacitor (Figure 2). For single 5V operation at the highest fCLK of 1MHz, pins 3 and 5 should be biased at 2V. This minimizes passband gain and phase variations (see Typical Performance Characteristics curves: Maximum Passband for Single 5V, 50:1; and THD + Noise vs RMS Input for Single 5V, 50:1). Elliptic/Linear Phase Select Pin (10) + GND DIGITAL SUPPLY 8 VIN Analog Ground Pins (3, 5) 11 5 10 6 9 7 8 1k CLOCK SOURCE + GND DIGITAL SUPPLY + The DC level at this pin selects the desired filter response, elliptic or linear phase and determines the ratio of the clock frequency to the cutoff frequency of the filter. Pin 10 connected to V – provides an elliptic lowpass filter with clock-to-fCUTOFF ratio of 100:1. Pin 10 connected to analog ground provides a linear phase lowpass filter with a clock- to-f –3dB ratio of 160:1 and a transient response overshoot of 1%. When pin 10 is connected to V + the clock-to-fCUTOFF ratio is 50:1 and the filter response is elliptic. Bypassing pin 10 to analog ground reduces the output DC offsets. If the DC level at pin 10 is switched mechanically or electrically at slew rates greater than 1V/ µs while the device is operating, a 10k resistor should be connected between pin 10 and the DC source. 1µF Filter Input Pin (2) VOUT 1164-6 F02 Figure 2. Single Supply Operation for fCLK/fCUTOFF = 100:1 The input pin is connected internally through a 50k resistor tied to the inverting input of an op amp. Table 1. Clock Source High and Low Threshold Levels Filter Output Pins (9, 6) POWER SUPPLY Dual Supply = ±7.5V Dual Supply = ±5V Dual Supply = ±2.5V Single Supply = 12V Single Supply = 5V Pin 9 is the specified output of the filter; it can typically source or sink 1mA. Driving coaxial cables or resistive loads less than 20k will degrade the total harmonic distortion of the filter. When evaluating the device’s distortion an output buffer is required. A noninverting buffer, Figure 3, HIGH LEVEL ≥ 2.18V ≥ 1.45V ≥ 0.73V ≥ 7.80V ≥ 1.45V LOW LEVEL ≤ 0.5V ≤ 0.5V ≤ – 2.0V ≤ 6.5V ≤ 0.5V 7 LTC1164-6 U U U PI FU CTIO S (14-Lead Dual-In-Line Package) can be used provided that its input common-mode range is well within the filter’s output swing. Pin 6 is an intermediate filter output providing an unspecified 6th order lowpass filter. Pin 6 should not be loaded. – 1k External Connection Pins (7, 14) Pins 7 and 14 should be connected together. In a printed circuit board the connection should be done under the IC package through a short trace surrounded by the analog ground plane. NC Pin (1, 8, 13) + Pins 1, 8, and 13 are not connected to any internal circuit point on the device and should preferably be tied to analog ground. LT1006, fC < 5kHz LT1200, fC > 5kHz 1164-6 F03 Figure 3. Buffer for Filter Output U W U UO APPLICATI S I FOR ATIO Passband Response The passband response of the LTC1164-6 is optimized for a fCLK/fCUTOFF ratio of 100:1. Minimum passband ripple occurs from 1Hz to 80% of fCUTOFF. Athough the passband of the LTC1164-6 is optimized for ratio fCLK / fCUTOFF of 100:1, if a ratio of 50:1 is desired, connect a single pole lowpass RC (f –3dB = 2 fCUTOFF) at the output of the filter. The RC will make the passband gain response as flat as the 100:1 case. If the RC is omitted, and clock frequencies are below 500kHz the passband gain will peak by 0.4dB at 90% fCUTOFF. Table 2. Typical Passband Ripple with Single 5V Supply (fCLK/fC) = 100:1, GND = 2V, 30kHz, Fixed Single Pole, Lowpass RC Filter at Pin 9 (See Typical Applications) PASSBAND FREQUENCY % of fCUTOFF 10 20 30 40 50 60 70 80 90 fCUTOFF 8 PASSBAND GAIN (REFERENCED TO 0dB) fCUTOFF = 1kHz fCUTOFF = 10kHz TA = 0°C TA = 25°C TA = 70°C TA = 25°C (dB) (dB) (dB) (dB) 0.00 0.00 0.00 0.00 – 0.02 0.00 0.01 0.01 – 0.05 – 0.01 – 0.01 0.01 – 0.10 – 0.02 – 0.02 0.02 – 0.13 – 0.03 – 0.01 0.03 – 0.15 – 0.01 0.01 0.05 – 0.18 – 0.01 0.01 0.07 – 0.25 – 0.08 – 0.05 0.02 – 0.39 – 0.23 – 0.18 – 0.05 – 2.68 – 2.79 – 2.74 – 2.68 The gain peaking can approximate a sin χ/χ correction for some applications. (See Typical Performance Characteristics curve, Passband vs Frequency and fCLK at fCLK / fC = 50:1.) When the LTC1164-6 operates with a single 5V supply and its cutoff frequency is clock-tuned to 10kHz, an output single pole RC filter can also help maintain outstanding passband flatness from 0°C to 70°C. Table 2 shows details. Clock Feedthrough Clock feedthrough is defined as, the RMS value of the clock frequency and its harmonics that are present at the filter’s output pin (9). The clock feedthrough is tested with the input pin (2) grounded and, it depends on PC board layout and on the value of the power supplies. With proper layout techniques the values of the clock feedthrough are shown in Table 3. Table 3. Clock Feedthrough VS ±2.5V ±5V ±7.5V 50:1 60µVRMS 100µVRMS 150µVRMS 100:1 60µVRMS 200µVRMS 500µVRMS Note: The clock feedthrough at ±2.5V supplies is imbedded in the wideband noise of the filter. (The clock signal is a square wave.) LTC1164-6 U W U UO APPLICATI S I FOR ATIO Any parasitic switching transients during the rise and fall edges of the incoming clock are not part of the clock feedthrough specifications. Switching transients have frequency contents much higher than the applied clock; their amplitude strongly depends on scope probing techniques as well as grounding and power supply bypassing. The clock feedthrough, if bothersome, can be greatly reduced by adding a simple R/C lowpass network at the output of the filter pin (9). This R/C will completely eliminate any switching transient. Table 4. Maximum VIN vs VS and fCLK Wideband Noise INPUT FREQUENCY OUTPUT LEVEL (Relative to Input) (VIN = 1VRMS) (kHz) (dB) fCLK/fC = 100:1, fCUTOFF = 1kHz The wideband noise of the filter is the total RMS value of the device’s noise spectral density and it is used to determine the operating signal-to-noise ratio. Most of its frequency contents lie within the filter passband and it cannot be reduced with post filtering. For instance, the LTC1164-6 wideband noise at ±2.5V supply is 100µVRMS, 90µVRMS of which have frequency contents from DC up to the filter’s cutoff frequency. The total wideband noise (µVRMS) is nearly independent of the value of the clock. The clock feedthrough specifications are not part of the wideband noise. Speed Limitations The LTC1164-6 optimizes AC performance versus power consumption. To avoid op amp slew rate limiting at maximum clock frequencies, the signal amplitude should be kept below a specified level as shown on Table 4. Aliasing Aliasing is an inherent phenomenon of sampled data systems and it occurs when input frequencies close to the sampling frequency are applied. For the LTC1164-6 case, an input signal whose frequency is in the range of fCLK ±4%, will be aliased back into the filter’s passband. If, for instance, an LTC1164-6 operating with a 100kHz clock and 1kHz cutoff frequency receives a 98.5kHz, 10mVRMS input signal, a 1.5kHz, 10µVRMS alias signal will appear at its output. When the LTC1164-6 operates with a clock-tocutoff frequency of 50:1, aliasing occurs at twice the clock frequency. Table 5 shows details. POWER SUPPLY ±7.5V ±5V Single 5V MAXIMUM fCLK 1.5MHz 1MHz ≥1MHz 1MHz 1MHz 1MHz 1MHz MAXIMUM VIN 1VRMS (fIN > 35kHz) 3VRMS (fIN > 25kHz) 0.7VRMS (fIN > 250kHz) 2.5VRMS (fIN > 25kHz) 0.5VRMS (fIN > 100kHz) 0.7VRMS (fIN > 25kHz) 0.5VRMS (fIN > 100kHz) Table 5. Aliasing (fCLK = 100kHz) 96 (or 104) 97 (or 103) 98 (or 102) 98.5 (or 101.5) 99 (or 101) 99.5 (or 100.5) fCLK/fC = 50:1, fCUTOFF = 2kHz 192 (or 208) 194 (or 206) 196 (or 204) 198 (or 202) 199 (or 201) 199.5(or 200.5) OUTPUT FREQUENCY (Aliased Frequency) (kHz) –75.0 – 68.0 – 65.0 – 60.0 – 3.2 – 0.5 4.0 3.0 2.0 1.5 1.0 0.5 – 76.0 – 68.0 – 63.0 – 3.4 – 1.3 – 0.9 8.0 6.0 4.0 2.0 1.0 0.5 Table 6. Transient Response of LTC Lowpass Filters LOWPASS FILTER DELAY TIME* (SEC) RISE TIME** (SEC) SETTLING OVERTIME*** SHOOT (SEC) (%) LTC1064-3 Bessel 0.50/fC 0.34/fC 0.80/fC 0.5 LTC1164-5 Linear Phase 0.43/fC 0.34/fC 0.85/fC 0 LTC1164-6 Linear Phase 0.43/fC 0.34/fC 1.15/fC 1 LTC1264-7 Linear Phase 1.15/fC 0.36/fC 2.05/fC 5 LTC1164-7 Linear Phase 1.20/fC 0.39/fC 2.20/fC 5 LTC1064-7 Linear Phase 1.20/fC 0.39/fC 2.20/fC 5 LTC1164-5 Butterworth 0.80/fC 0.48/fC 2.40/fC 11 LTC1164-6 Elliptic 0.85/fC 0.54/fC 4.30/fC 18 LTC1064-4 Elliptic 0.90/fC 0.54/fC 4.50/fC 20 LTC1064-1 Elliptic 0.85/fC 0.54/fC 6.50/fC 20 * To 50% ±5%, ** 10% to 90% ±5%, *** To 1% ±0.5% 9 LTC1164-6 UO TYPICAL APPLICATI S 8th Order Elliptic Lowpass Filter (fCLK / fC) = 50:1 VIN 1 14 2 13 3 12 4 V+ 0.1µF LTC1164-6 11 5 10 6 9 7 8 V+ NOTES: 1. OPTIONAL OUTPUT BUFFER 1/2πRC = 2 × fCUTOFF. 2. PINS 1, 8, 13 CAN BE GROUNDED OR LEFT FLOATING. V– – 0.1µF fCLK V+ LT1006 R + VOUT 1164-6 TA06 C V– 8th Order Elliptic Lowpass Filter (fCLK / fC) = 100:1 VIN V 1 14 1 14 2 13 2 13 3 12 3 12 4 + 0.1µF 8th Order Linear Phase Lowpass Filter (fCLK / fC) = 160:1 LTC1164-6 VIN V– 11 5 10 6 9 7 8 fCLK 4 V+ 0.1µF 0.1µF VOUT LTC1164-6 11 5 10 6 9 7 8 V– fCLK 0.1µF VOUT 1164-6 TA07 1164-6 TA08 8th Order 20kHz Cutoff, Elliptic Filter Operating with a Single 5V Supply and Driving 1k, 1000pF Load VIN 1 14 2 13 3 12 4 5V 0.1µF 10k LTC1164-6 11 5 10 6 9 7 8 5V 1k 5V fCLK = 1MHz 5V 51.1k 2 – 7 VOUT LT1200 10k 3 + 4 1k 1000pF NOTES: 1. TOTAL SUPPLY CURRENT IS = 4mA (EXCLUDING OUTPUT LOAD CURRENT). 2. FLAT PASSBAND UP TO 18kHz, f –3dB = 20kHz. 3. THD + NOISE ≤ –70dB, 1VP-P ≤ VIN ≤ 3VP-P, fIN = 1kHz. 510pF 1164-6 TA09 0.1µF 10 6.65k LTC1164-6 UO TYPICAL APPLICATI S 8th Order Low Power, Clock-Tunable Elliptic Filter with Active RC Input Anti-Aliasing Filter and Output Smoothing Filter C2 0.022µF R1 1.15k R2 76.8k R3 5.62k VIN C3 0.001µF C1 0.1µF + 1 14 1/2 LT1013 2 13 3 12 4 11 – V fC = 1kHz ATTENUATION AT 10kHz = –48dB + 0.1µF NOTES: 1. CLOCK-TUNABLE OVER ONE DECADE OF CUTOFF FREQUENCY. 2. BOTH INPUT AND OUTPUT RC ACTIVE FILTERS ARE 0.1dB CHEBYSHEV FILTERS WITH 1kHz RIPPLE BANDWIDTH. 10 6 9 7 8 fCLK – 1/2 LT1013 V– R1 16.9k R2 97.6k 100Hz ≤ fC ≤ 1kHz 10kHz ≤ fCLK ≤ 100kHz C2 0.001µF VOUT + C1 0.0047µF fC = 1kHz ATTENUATION AT 10kHz = –30dB 1164-6 TA10 Single 5V, 16th Order Lowpass Filter fCUTOFF = 10kHz R1 789Ω VIN LTC1164-6 5 V– 0.1µF C1 0.01µF 1 14 1 14 2 13 2 13 12 3 11 4 3 4 5V 0.1µF 5 15k + 1µF LTC1164-6 IC1 5V 10 5V 5 0.1µF 12 LTC1164-6 IC2 11 10 6 9 6 9 7 8 7 8 10k fCLK 5V VOUT C2 0.001µF R2 7.89k 1k 1164-6 TA03 VS = SINGLE 5V, IS = 5mA TYP 16TH ORDER LOWPASS FILTER FIXED fCUTOFF, fCLK = 540kHz fCUTOFF = 10kHz (fCLK/fC) = 54:1 1/2πR1C1 = 1/2πR2C2 = 2fCUTOFF THD + Noise vs Frequency –40 0 –45 –10 –50 –20 –55 THD + NOISE (dB) GAIN (dB) Gain vs Frequency 10 –30 –40 –50 VS = SINGLE 5V IS = 5mA, 16TH ORDER ELLIPTIC LOWPASS fCLK = 540kHz fCUTOFF = 10kHz –60 –70 –80 VS = SINGLE 5V IS = 5mA, 16TH ORDER ELLIPTIC LOWPASS VIN = 0.5VRMS fCLK = 540kHz fC = 10kHz –60 –65 –70 –75 –80 –85 –90 –90 1 10 FREQUENCY (kHz) 30 1 5 FREQUENCY (kHz) 1164-6 TA04 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 10 1164-6 TA05 11 LTC1164-6 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. J Package 14-Lead Ceramic DIP 0.200 (5.080) MAX 0.290 – 0.320 (7.366 – 8.128) 0.785 (19.939) MAX 0.005 (0.127) MIN 14 12 13 11 10 9 8 0.015 – 0.060 (0.381 – 1.524) 0.008 – 0.018 (0.203 – 0.460) 0.220 – 0.310 (5.588 – 7.874) 0.025 (0.635) RAD TYP 0° – 15° 1 0.385 ± 0.025 (9.779 ± 0.635) 0.038 – 0.068 (0.965 – 1.727) 0.100 ± 0.010 (2.540 ± 0.254) 0.014 – 0.026 (0.360 – 0.660) 2 3 4 5 6 7 0.098 (2.489) MAX 0.125 (3.175) MIN J14 0392 N Package 14-Lead Plastic DIP 0.300 – 0.325 (7.620 – 8.255) 0.045 – 0.065 (1.143 – 1.651) 0.015 (0.380) MIN 0.130 ± 0.005 (3.302 ± 0.127) ( +0.635 8.255 –0.381 ) 14 13 12 11 10 9 8 1 2 3 4 5 6 7 0.260 ± 0.010 (6.604 ± 0.254) 0.009 – 0.015 (0.229 – 0.381) +0.025 0.325 –0.015 0.770 (19.558) MAX 0.065 (1.651) TYP 0.075 ± 0.015 (1.905 ± 0.381) 0.018 ± 0.003 (0.457 ± 0.076) 0.100 ± 0.010 (2.540 ± 0.254) 0.125 (3.175) MIN S Package 16-Lead Plastic SOL 0.398 – 0.413 (10.109 – 10.490) 0.291 – 0.299 (7.391 – 7.595) 0.005 (0.127) RAD MIN 0.010 – 0.029 × 45° (0.254 – 0.737) 16 0.093 – 0.104 (2.362 – 2.642) 15 14 13 12 11 10 9 0.037 – 0.045 (0.940 – 1.143) 0° – 8° TYP 0.394 – 0.419 (10.007 – 10.643) SEE NOTE 0.009 – 0.013 (0.229 – 0.330) SEE NOTE 0.016 – 0.050 (0.406 – 1.270) 0.050 (1.270) TYP 0.004 – 0.012 (0.102 – 0.305) 0.014 – 0.019 (0.356 – 0.482) TYP NOTE: PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS. 1 2 3 4 5 6 7 8 SOL16 0392 12 Linear Technology Corporation LT/GP 0293 10K REV 0 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1993