FDD6644/FDU6644 30V N-Channel PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed. • 67 A, 30 V. RDS(ON) = 8.5 mΩ @ VGS = 10 V RDS(ON) = 10.5 mΩ @ VGS = 4.5 V • High performance trench technology for extremely low RDS(ON) Applications • Low gate charge (25 nC typical) • DC/DC converter • High power and current handling capability D D G S D-PAK TO-252 (TO-252) I-PAK (TO-251AA) G D S Absolute Maximum Ratings Symbol G S TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 30 V VGSS Gate-Source Voltage ±16 V ID Drain Current 67 A – Continuous (Note 1a) – Pulsed PD 100 Maximum Power Dissipation (Note 1) 68 (Note 1a) 3.8 1.6 (Note 1b) TJ, TSTG W -55 to +175 °C (Note 1) 2.2 °C/W (Note 1b) 96 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJC Thermal Resistance, Junction-to-Case RθJA Thermal Resistance, Junction-to-Ambient Package Marking and Ordering Information Device Marking Device Package Reel Size Tape width Quantity FDD6644 FDD6644 D-PAK (TO-252) 13’’ 12mm 2500 units FDU6644 FDU6644 I-PAK (TO-251) Tube N/A 75 2001 Fairchild Semiconductor Corporation FDD/FDU6644 Rev C(W) FDD6644/FDU6644 April 2001 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2) W DSS Drain-Source Avalanche Energy IAR Drain-Source Avalanche Current Single Pulse, VDD = 15 V, ID=17A 240 mJ 17 A Off Characteristics VGS = 0 V, ID = 250 µA BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V IGSSF Gate–Body Leakage, Forward IGSSR Gate–Body Leakage, Reverse On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) 30 ID = 250 µA, Referenced to 25°C V 27 mV/°C 1 µA VGS = 16 V, VDS = 0 V 100 nA VGS = –16 V, VDS = 0 V –100 nA 3 V (Note 2) Gate Threshold Voltage VDS = VGS, ID = 250 µA Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = 250 µA, Referenced to 25°C –5 6.5 7.5 10 ID(on) On–State Drain Current VGS = 10 V, ID = 16 A VGS = 4.5 V, ID = 15 A VGS = 10 V, ID = 16.5A,TJ=125°C VGS = 10 V, VDS = 5 V gFS Forward Transconductance VDS = 5 V, ID = 16 A 1 1.5 mV/°C 8.5 10.5 13 50 mΩ A 74 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time VDS = 15 V, V GS = 0 V, f = 1.0 MHz 3087 pF 489 pF 185 pF (Note 2) VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 10 20 ns 12 22 ns ns td(off) Turn–Off Delay Time 48 77 tf Turn–Off Fall Time 10 20 ns Qg Total Gate Charge 25 35 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = 15 V, ID = 16 A, VGS = 5 V 7.5 6.5 FDD/FDU6644 Rev C(W) FDD6644/FDU6644 Electrical Characteristics TA = 25°C unless otherwise noted Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 2.7 A Voltage 0.7 (Note 2) 3.2 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA = 40°C/W when mounted on a 1in2 pad of 2 oz copper b) RθJA = 96°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. Maximum current is calculated as: PD R DS(ON) where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V. Package current limitation is 21A FDD/FDU6644 Rev C(W) FDD6644/FDU6644 Electrical Characteristics (continued) FDD6644/FDU6644 Typical Characteristics 2 50 ID, DRAIN CURRENT (A) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 3.5V VGS = 10V 6.0V 3.0V 40 4.5V 30 20 2.5V 10 1.75 VGS = 3.0V 1.5 3.5V 4.0V 1.25 4.5V 6.0V 10V 1 0.75 0 0 0.5 1 0 1.5 10 20 Figure 1. On-Region Characteristics. 40 50 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 0.024 ID = 16A VGS = 10V 1.6 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 30 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 1.4 1.2 1 0.8 ID = 8 A 0.02 0.016 TA = 125oC 0.012 0.008 TA = 25oC 0.6 -50 -25 0 25 50 75 100 125 150 0.004 175 2 TJ, JUNCTION TEMPERATURE (oC) Figure 3. On-Resistance Variation with Temperature. 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 70 60 IS, REVERSE DRAIN CURRENT (A) 25oC TA = -55oC VDS = 5V ID, DRAIN CURRENT (A) 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) o 125 C 50 40 30 20 10 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3.5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDD/FDU6644 Rev C(W) FDD6644/FDU6644 Typical Characteristics 4000 ID = 16A VDS = 5V f = 1MHz VGS = 0 V 3500 10V CISS 8 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 15V 6 4 3000 2500 2000 1500 1000 2 COSS 500 CRSS 0 0 0 10 20 30 40 0 50 5 Figure 7. Gate Charge Characteristics. 20 25 30 80 P(pk), PEAK TRANSIENT POWER (W) 100µs 1ms 10ms 100ms RDS(ON) LIMIT 10 1s 10s DC 1 VGS = 10V SINGLE PULSE 0.1 o RθJA = 96 C/W o TA = 25 C SINGLE PULSE RθJA = 96°C/W TA = 25°C 70 60 50 40 30 20 10 0 0.01 0.01 0.1 1 10 100 0.1 1 10 100 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 15 Figure 8. Capacitance Characteristics. 100 ID, DRAIN CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 R θJA (t) = r(t) + R θJA R θJA = 96 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 0.01 t2 T J - T A = P * R θJA (t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b Transient thermal response will change depending on the circuit board design. FDD/FDU6644 Rev C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. 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Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1