DATASHEET ISL21007 FN6326 Rev.12.00 Jun 9, 2017 Precision, Low Noise FGA Voltage References The ISL21007 FGA™ voltage references are extremely low power, high precision, and low noise voltage references fabricated on Intersil’s proprietary Floating Gate Analog (FGA) technology. The ISL21007 features very low noise (4.5µVP-P for 0.1Hz to 10Hz) and very low operating current (150µA, Max). In addition, the ISL21007 family features guaranteed initial accuracy as low as ±0.5mV. Features This combination of high initial accuracy, low drift, and low output noise performance of the ISL21007 enables versatile high performance control and data acquisition applications with low power consumption. • Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 150µA (Max) Applications • Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ld SOIC • Reference Output Voltage . . . .1.250V, 2.048V, 2.500V, 3.000V • Input Voltage Range ISL21007-12, 20, 25. . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V ISL21007-30. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2V to 5.5V • Low Output Voltage Noise . . . . . . . . 4.5µVP-P (0.1Hz to 10Hz) • Temperature Coefficient . . . . . . . . . . . . . . 3ppm/°C (B grade) • Operating Temperature Range. . . . . . . . . . .-40°C to +125°C • Pb-Free (RoHS Compliant) • High Resolution A/Ds and D/As Related Literature • Digital Meters • Bar Code Scanners • For a full list of related documents, visit our website - ISL21007 product pages • Base Stations • Battery Management/Monitoring • Industrial/Instrumentation Equipment TABLE 1. AVAILABLE OPTIONS PART NUMBER VOUT OPTION (V) INITIAL ACCURACY (mV) TEMPCO. (ppm/°C) ISL21007BFB812Z (Obsolete. Recommended replacement part ISL21007CFB812Z) 1.250 ±0.5 3 ISL21007CFB812Z 1.250 ±1.0 5 ISL21007DFB812Z 1.250 ±2.0 10 ISL21007BFB820Z (Obsolete. Recommended replacement part ISL21007CFB820Z) 2.048 ±0.5 3 ISL21007CFB820Z 2.048 ±1.0 5 ISL21007DFB820Z (Obsolete. Recommended replacement ISL21007CFB820Z) 2.048 ±2.0 10 ISL21007BFB825Z (Obsolete. Recommended replacement part ISL21007CFB825Z) 2.500 ±0.5 3 ISL21007CFB825Z 2.500 ±1.0 5 ISL21007DFB825Z 2.500 ±2.0 10 ISL21007BFB830Z (Obsolete. Recommended replacement ISL21007CFB825Z-TK) 3.000 ±0.5 3 ISL21007CFB830Z (Obsolete. Recommended replacement ISL21007CFB825Z-TK) 3.000 ±1.0 5 ISL21007DFB830Z (Obsolete. Recommended replacement ISL21007CFB825Z-TK) 3.000 ±2.0 10 FN6326 Rev.12.00 Jun 9, 2017 Page 1 of 20 ISL21007 Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING VOUT OPTION (V) GRADE TEMP. RANGE (°C) PACKAGE (RoHS COMPLIANT) PKG. DWG. # ISL21007CFB812Z 21007CF Z12 1.250 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21007DFB812Z 21007DF Z12 1.250 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21007CFB820Z 21007CF Z20 2.048 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21007DFB820Z (Obsolete recommended replacement ISL21007CFB820Z) 21007DF Z20 2.048 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21007CFB825Z 21007CF Z25 2.500 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21007DFB825Z 21007DF Z25 2.500 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21007CFB830Z (Obsolete, recommended replacement ISL21007CFB825Z-TK) 21007CF Z30 3.000 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15 ISL21007DFB830Z (Obsolete, recommended replacement ISL21007CFB825Z-TK) 21007DF Z30 3.000 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15 NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Add “-TK” suffix for 1k unit tape and reel option. Refer to TB347 for details on reel specifications. 3. For Moisture Sensitivity Level (MSL), see device information pages for ISL21007CFB812, ISL21007CFB820, ISL21007CFB825, ISL21007CFB830, ISL21007DFB812, ISL21007DFB820, ISL21007DFB825, ISL21007DFB830. For more information on MSL, see techbrief TB363. Pin Configuration ISL21007 (8 LD SOIC) TOP VIEW GND or NC 1 8 DNC VIN 2 7 DNC DNC 3 6 VOUT GND 4 5 TRIM Pin Descriptions PIN NUMBER PIN NAME 1 GND or NC 2 VIN Power Supply Input Connection 4 GND Ground 5 TRIM Allows User Trim VOUT ±2.5% 6 VOUT Voltage Reference Output Connection 3, 7, 8 DNC Do Not Connect; Internal Connection - Must Be Left Floating FN6326 Rev.12.00 Jun 9, 2017 DESCRIPTION Ground or No Connection Page 2 of 20 ISL21007 Typical Application Circuit 1 GND +3V C1 10µF 2 VIN 3 NC 4 GND NC 8 NC 7 VOUT 6 TRIM 5 ISL21007-12, 20, 25, 30 SPI BUS X79000 1 SCK 2 A0 CS 20 CLR 19 3 A1 4 A2 VCC 18 5 SI 6 SO VL 16 VREF 15 7 RDY 8 UP VOUT 13 9 DOWN 10 OE VH 17 C1 0.001µF VSS 14 VBUF 12 LOW NOISE DAC OUTPUT VFB 11 FIGURE 1. TYPICAL APPLICATION PRECISION 12-BIT SUBRANGING DAC FN6326 Rev.12.00 Jun 9, 2017 Page 3 of 20 ISL21007 Absolute Voltage Ratings Thermal Information Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Max Voltage VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.5V Max Voltage VOUT to GND (10s) . . . . . . . . . . . . . . . . . . . . . -0.5V to VOUT + 1 Voltage on “DNC” pins . . . . . . . . . No connections permitted to these pins. ESD Rating Human Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6kV Machine Model (MM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600V Charged Device Model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV Thermal Resistance (Typical, Note 5) JA (°C/W) 8 Ld SOIC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.12 Continuous Power Dissipation (Note 5) . . . . . . . . . . . . . . . . . . . .TA = +70°C 8 Ld SOIC Derate 5.88mW/°C above +70°C. . . . . . . . . . . . . . . . . . 471mW Pb-Free Reflow Profile (Note 6). . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions Temperature Range (Full Range Industrial) . . . . . . . . . . .-40°C to +125°C Environmental Operating Conditions X-Ray Exposure (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mRem CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA NOTES: 4. Measured with no filtering, distance of 10” from source, intensity set to 55kV and 70mA current, 30s duration. Other exposure levels should be analyzed for Output Voltage drift effects. See “Applications Information” on page 16. 5. JA is measured with the component mounted on a high-effective thermal conductivity test board in free air. See tech brief TB379 for details. 6. Post-reflow drift for the ISL21007 devices will range from 100µV to 1.0mV based on experimental results with devices on FR4 double sided boards. The design engineer must take this into account when considering the reference voltage after assembly. Common Electrical Specifications (ISL21007-12, -20, -25, -30) specified. Boldface limits apply across the operating temperature range, -40°C to +125°C. PARAMETER VOUT Accuracy at TA = +25°C Output Voltage Temperature Coefficient (Note 7) SYMBOL VOA TC VOUT CONDITIONS TA = -40°C to +125°C, unless otherwise MAX MIN (Note 10) TYP (Note 10) -0.5 +0.5 mV ISL21007C -1.0 +1.0 mV ISL21007D -2.0 +2.0 mV ISL21007B 3 ppm/°C ISL21007C 5 ppm/°C 10 ppm/°C 150 µA ISL21007D Supply Current IIN 75 Trim Range Turn-On Settling Time ±2.0 tR Ripple Rejection Output Voltage Noise eN Broadband Voltage Noise VN Noise Density FN6326 Rev.12.00 Jun 9, 2017 UNIT ISL21007B VOUT = ±0.1% ±2.5 % 120 µs f = 10kHz 60 dB 0.1Hz ≤ f ≤10Hz 4.5 µVP-P 10Hz ≤ f ≤1kHz 2.2 µVRMS f = 1kHz 60 nV/Hz Page 4 of 20 ISL21007 Electrical Specifications (ISL21007-12, VOUT = 1.250V) specified. Boldface limits apply across the operating temperature range, -40°C to +125°C. PARAMETER Input Voltage Range SYMBOL CONDITIONS VIN VIN = 3.0V, TA = -40°C to +125°C, unless otherwise MIN (Note 10) TYP 2.7 MAX (Note 10) UNIT 5.5 V Output Voltage VOUT Line Regulation VOUT /VIN 2.7V ≤ VIN ≤ 5.5V 100 700 µV/V Load Regulation VOUT/IOUT Sourcing: 0mA ≤ IOUT ≤ 7mA 10 100 µV/mA Sinking: -7mA ≤ IOUT≤ 0mA 20 150 µV/mA TA = +25°C, VOUT tied to GND 40 mA Short-Circuit Current ISC 1.250 V Thermal Hysteresis (Note 8) VOUT/TA TA = +165°C 50 ppm Long Term Stability (Note 9) VOUT/t TA = +25°C 100 ppm Electrical Specifications (ISL21007-20, VOUT = 2.048V) Boldface limits apply across the operating temperature range, -40°C to +125°C. PARAMETER Input Voltage Range SYMBOL CONDITIONS VIN VIN = 3.0V, TA = -40°C to +125°C, unless otherwise specified. MIN (Note 10) TYP 2.7 MAX (Note 10) UNIT 5.5 V Output Voltage VOUT Line Regulation VOUT /VIN 2.7V ≤ VIN ≤ 5.5V 50 200 µV/V Load Regulation VOUT/IOUT Sourcing: 0mA ≤ IOUT ≤ 7mA 10 100 µV/mA Sinking: -7mA ≤ IOUT≤ 0mA 20 150 µV/mA TA = +25°C, VOUT tied to GND 50 mA Short-Circuit Current ISC 2.048 V Thermal Hysteresis (Note 8) VOUT/TA TA = +165°C 50 ppm Long Term Stability (Note 9) VOUT/t TA = +25°C 75 ppm Electrical Specifications (ISL21007-25, VOUT = 2.500V) Boldface limits apply across the operating temperature range, -40°C to +125°C. PARAMETER Input Voltage Range SYMBOL CONDITIONS VIN VIN = 3.0V, TA = -40°C to +125°C, unless otherwise specified. MIN (Note 10) TYP 2.7 MAX (Note 10) UNIT 5.5 V Output Voltage VOUT Line Regulation VOUT /VIN 2.7V ≤ VIN ≤ 5.5V 50 200 µV/V Load Regulation VOUT/IOUT Sourcing: 0mA ≤ IOUT ≤ 5mA 10 100 µV/mA Sinking: -5mA ≤ IOUT≤ 0mA 20 150 µV/mA TA = +25°C, VOUT tied to GND 50 mA Short-Circuit Current ISC 2.500 V Thermal Hysteresis (Note 8) VOUT/TA TA = +165°C 50 ppm Long Term Stability (Note 9) VOUT/t TA = +25°C 50 ppm FN6326 Rev.12.00 Jun 9, 2017 Page 5 of 20 ISL21007 Electrical Specifications (ISL21007-30, VOUT = 3.000V) VIN = 5.0V, TA = -40°C to +125°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. PARAMETER SYMBOL Input Voltage Range MIN (Note 10) CONDITIONS VIN TYP MAX (Note 10) UNIT 5.5 V 3.2 Output Voltage VOUT Line Regulation VOUT /VIN 3.2V ≤ VIN ≤ 5.5V 50 200 µV/V Load Regulation VOUT/IOUT Sourcing: 0mA ≤ IOUT ≤ 7mA 10 100 µV/mA Sinking: -7mA ≤ IOUT≤ 0mA 20 150 µV/mA TA = +25°C, VOUT tied to GND 50 mA Short-Circuit Current 3.000 ISC V Thermal Hysteresis (Note 8) VOUT/TA TA = +165°C 50 ppm Long Term Stability (Note 9) VOUT/t TA = +25°C 50 ppm NOTES: 7. Over the specified temperature range. Temperature coefficient is measured by the box method whereby the change in VOUT is divided by the temperature range; in this case, -40°C to +125°C = +165°C. 8. Thermal Hysteresis is the change of VOUT measured at TA = +25°C after temperature cycling over a specified range, TA. VOUT is read initially at TA = +25°C for the device under test. The device is temperature cycled and a second VOUT measurement is taken at +25°C. The difference between the initial VOUT reading and the second VOUT reading is then expressed in ppm. For TA = +165°C, the device under test is cycled from +25°C to +125°C to -40°C to +25°C. 9. Long term drift is logarithmic in nature and diminishes over time. Drift after the first 1000 hours will be approximately 10ppm/(1kHrs). 10. Compliance to datasheet limits is assured by one or more methods: production test, characterization, and/or design. Typical Performance Curves (ISL21007-12) 120 (REXT = 100kΩ) 95 UNIT 3 90 100 IIN (µA) IIN (µA) UNIT 2 60 UNIT 1 40 80 +25°C 75 70 20 0 2.5 +125°C 85 80 -40°C 65 3.0 3.5 4.0 4.5 VIN (V) 5.0 5.5 6.0 60 2.5 1.25015 4.0 VIN (V) 4.5 5.0 5.5 150 1.25010 UNIT 3 1.25005 1.25000 UNIT 2 1.24995 1.24990 UNIT 1 1.24985 1.24980 3.5 FIGURE 3. IIN vs VIN OVER TEMPERATURE VO (µV) (NORMALIZED TO VIN = 3.0V) VOUT (V) (NORMALIZED TO 1.250V AT VIN = 3.0V) FIGURE 2. IIN vs VIN (3 UNITS) 3.0 2.5 3.0 3.5 4.0 VIN (V) 4.5 FIGURE 4. LINE REGULATION (3 UNITS) FN6326 Rev.12.00 Jun 9, 2017 5.0 5.5 100 50 +125°C 0 +25°C -50 -40°C -100 -150 -200 -250 -300 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) FIGURE 5. LINE REGULATION OVER TEMPERATURE Page 6 of 20 6.0 ISL21007 Typical Performance Curves (ISL21007-12) (REXT = 100kΩ) (Continued) 0.15 +25°C 1.25010 +125°C 0.00 VOUT (V) VOUT (mV) 1.25000 0.05 -40°C -0.05 1.24995 UNIT 2 1.24990 UNIT 3 1.24985 -0.10 -0.15 UNIT 1 1.25005 0.10 1.24980 -7 -6 -5 -4 SINKING -3 -2 -1 0 1 2 3 OUTPUT CURRENT (mA) 4 5 6 7 SOURCING FIGURE 6. LOAD REGULATION OVER TEMPERATURE 1.24975 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 7. VOUT vs TEMPERATURE (3 UNITS) X: 200mV/DIV Y: 10µs/DIV 0 10nF LOAD 100nF LOAD PSRR (dB) -20 VIN = +0.3V -40 -60 VIN = -0.3V 1µF LOAD -80 1nF LOAD NO LOAD -100 1.00E+00 1.00E+02 1.00E+04 1.00E+0 FREQUENCY (Hz) FIGURE 8. PSRR vs CAPACITIVE LOADS X: 20µs/DIV Y: 1V/DIV X: 200mV/DIV Y: 10µs/DIV VIN = +0.3V VIN = -0.3V FIGURE 10. LINE TRANSIENT RESPONSE, 0.001µF LOAD CAPACITANCE FN6326 Rev.12.00 Jun 9, 2017 FIGURE 9. LINE TRANSIENT RESPONSE, NO CAPACITIVE LOAD VIN VOUT = 1.25V FIGURE 11. TURN-ON TIME Page 7 of 20 140 ISL21007 Typical Performance Curves (ISL21007-12) (REXT = 100kΩ) (Continued) GAIN IS x1000, NOISE IS 4.5µVP-P 140 1nF 10nF 120 100nF 2mV/DIV ZOUT () 100 NO LOAD 80 60 40 20 0 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04 1.00E+05 1.00E+06 FREQUENCY (Hz) FIGURE 13. VOUT NOISE, 0.1Hz TO 10Hz FIGURE 12. ZOUT vs FREQUENCY NO OUTPUT CAPACITANCE X: 50µs/DIV Y: 1V/DIV +7mA -7mA FIGURE 14. LOAD TRANSIENT RESPONSE FN6326 Rev.12.00 Jun 9, 2017 Page 8 of 20 ISL21007 Typical Performance Curves (ISL21007-20) (REXT = 100kΩ) 95 95 90 90 UNIT 2 80 IIN (uA) 85 IIN (µA) +125°C 85 80 UNIT 1 75 75 70 -40°C 65 +25°C 60 70 UNIT 3 65 2.7 3.1 55 3.5 3.9 4.3 4.7 5.1 50 2.7 5.5 3.1 3.5 3.9 2.04815 UNIT 2 2.04810 2.04805 UNIT 1 UNIT 3 2.04795 2.04790 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.04815 2.04810 2.04805 +125°C +25°C 2.04800 2.04795 2.5 3.0 3.5 4.0 0.0 0.4 -40°C 0.0 +25°C -0.8 -6 -5 -4 -3 -2 -1 0 1 2 3 OUTPUT CURRENT (mA) FIGURE 19. LOAD REGULATION OVER TEMPERATURE FN6326 Rev.12.00 Jun 9, 2017 4 5 6 SOURCING 7 VOUT(V) NORMALIZED TO 2.048V AT +25°C VOUT (mV) NORMALIZED TO 0mA +125°C SINKING 4.5 5.0 5.5 FIGURE 18. LINE REGULATION OVER TEMPERATURE 1.6 -1.2 -7 5.5 VIN(V) FIGURE 17. LINE REGULATION (3 UNITS) -0.4 5.1 -40°C VIN(V) 1.2 4.7 FIGURE 16. IIN vs VIN OVER TEMPERATURE VOUT (V) (NORMALIZED TO 2.048V AT VIN = 3V) VOUT (V) NORMALIZED TO 2.048V AT VIN = 3.0V FIGURE 15. IIN vs VIN (3 UNITS) 2.04800 4.3 VIN (V) VIN (V) 2.0496 2.0492 2.0488 UNIT 2 2.0484 UNIT 1 2.0480 2.0476 UNIT 3 2.0472 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) FIGURE 20. VOUT vs TEMPERATURE (3 UNITS) Page 9 of 20 ISL21007 Typical Performance Curves (ISL21007-20) (REXT = 100kΩ) (Continued) X: 200mV/DIV Y: 10µs/DIV 0 10nF LOAD 100nF LOAD -20 PSRR (dB) VIN = +0.3V -40 1µF LOAD -60 -80 VIN = -0.3V NO LOAD -100 1.0E+01 1.0E+03 1.0E+05 FREQUENCY (Hz) FIGURE 22. LINE TRANSIENT RESPONSE, NO CAPACITIVE LOAD FIGURE 21. PSRR vs CAPACITIVE LOADS X: 100µs/DIV Y: 2V/DIV X: 200mV/DIV Y: 10µs/DIV VIN = +0.3V VIN VOUT = 2.048V VIN = -0.3V FIGURE 23. LINE TRANSIENT RESPONSE, 0.001µF LOAD CAPACITANCE FIGURE 24. TURN-ON TIME GAIN IS x1000, NOISE IS 4.5µVP-P 140 1nF 10nF 120 100nF 2mV/DIV ZOUT () 100 NO LOAD 80 60 40 20 0 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04 1.00E+05 1.00E+06 FREQUENCY (Hz) FIGURE 25. ZOUT VS FREQUENCY FN6326 Rev.12.00 Jun 9, 2017 FIGURE 26. VOUT NOISE, 0.1Hz TO 10Hz Page 10 of 20 ISL21007 Typical Performance Curves (ISL21007-20) (REXT = 100kΩ) (Continued) X: 20µs/DIV Y: 200mV/DIV X: 20µs/DIV Y: 200mV/DIV +7mA +7mA -7mA -7mA FIGURE 27. LOAD TRANSIENT RESPONSE, 0.001µF LOAD CAPACITANCE FIGURE 28. LOAD TRANSIENT RESPONSE, NO CAPACITIVE LOAD Typical Performance Curves (ISL21007-25) (REXT = 100kΩ) 100 120 UNIT 3 95 100 IIN (µA) IIN (µA) 85 UNIT 1 60 40 80 +25°C -40°C 75 70 20 0 +125°C 90 UNIT 2 80 65 60 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.5 6.0 3.0 4.0 3.5 UNIT 1 2.5000 UNIT 2 UNIT 3 2.4998 2.4997 2.4996 2.5 5.5 100 VO (µV) (NORMALIZED TO VIN = 3.0V) VOUT (V) (NORMALIZED TO 2.500V AT VIN = 3V) 2.5002 2.4999 5.0 FIGURE 30. IIN vs VIN OVER TEMPERATURE FIGURE 29. IIN vs VIN (3 UNITS) 2.5001 4.5 VIN (V) VIN (V) 3.0 3.5 4.0 4.5 5.0 VIN (V) FIGURE 31. LINE REGULATION (3 UNITS) FN6326 Rev.12.00 Jun 9, 2017 5.5 50 0 -50 -100 +25°C -150 +125°C -200 -250 -300 -40°C -350 -400 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VIN (V) FIGURE 32. LINE REGULATION OVER TEMPERATURE Page 11 of 20 ISL21007 Typical Performance Curves (ISL21007-25) 0.6 (REXT = 100kΩ) (Continued) 2.5003 +125°C 2.5000 +25°C VOUT (V) VOUT (mV) 2.5001 -40°C 0.2 0 UNIT 2 2.5002 0.4 -0.2 -0.4 UNIT 1 2.4999 2.4998 2.4997 2.4996 -0.6 2.4995 -0.8 2.4994 -1.0 -7 -6 -5 -4 2.4993 -40 SINKING -3 -2 -1 0 1 2 3 4 OUTPUT CURRENT (mA) 5 6 7 UNIT 3 -20 0 FIGURE 33. LOAD REGULATION OVER TEMPERATURE 20 40 60 80 100 120 140 TEMPERATURE (°C) SOURCING FIGURE 34. VOUT vs TEMPERATURE (3 UNITS) X: 200mV/DIV Y: 10µs/DIV 10 NO LOAD 1nF 10nF 100nF 0 -10 PSRR (dB) -20 -30 VIN = +0.3V 1µF -40 -50 -60 VIN = -0.3V -70 -80 -90 -100 1.E+00 1.E+02 1.E+04 1.E+06 FREQUENCY (Hz) FIGURE 35. PSRR vs CAPACITIVE LOADS X: 200mV/DIV Y: 10µs/DIV FIGURE 36. LINE TRANSIENT RESPONSE, NO CAPACITIVE LOAD X: 20µs/DIV Y: 1V/DIV VIN = +0.3V VIN VIN = -0.3V FIGURE 37. LINE TRANSIENT RESPONSE, 0.001µF LOAD CAPACITANCE FN6326 Rev.12.00 Jun 9, 2017 VOUT = 2.5V FIGURE 38. TURN-ON TIME Page 12 of 20 ISL21007 Typical Performance Curves (ISL21007-25) (REXT = 100kΩ) (Continued) GAIN IS x1000, NOISE IS 4.5µVP-P 140 1nF 10nF 120 100nF 2mV/DIV ZOUT () 100 NO LOAD 80 60 40 20 0 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04 1.00E+05 1.00E+06 FREQUENCY (Hz) FIGURE 39. ZOUT vs FREQUENCY FIGURE 40. VOUT NOISE, 0.1Hz TO 10Hz NO OUTPUT CAPACITANCE X: 50µs/DIV Y: 500mV/DIV +5mA -5mA FIGURE 41. LOAD TRANSIENT RESPONSE Typical Performance Curves (ISL21007-30) (REXT = 100kΩ) 120 120 UNIT 2 100 80 IIN (µA) IIN (µA) 80 UNIT 1 60 60 40 40 20 20 0 3.2 +125°C 100 UNIT 3 3.7 4.2 4.7 VIN (V) FIGURE 42. IIN vs VIN (3 UNITS) FN6326 Rev.12.00 Jun 9, 2017 5.2 +25°C 0 3.2 3.7 -40°C 4.2 4.7 5.2 VIN (V) FIGURE 43. IIN vs VIN OVER TEMPERATURE Page 13 of 20 ISL21007 3.0005 (REXT = 100kΩ) (Continued) UNIT 1 2.9995 UNIT 2 UNIT 3 2.9985 2.9975 2.9965 2.9955 3.2 3.6 4.0 4.4 4.8 5.2 5.6 VOUT (V) NORMALIZED TO 3.0V AT 5.0VIN VOUT(V) NORMALIZED TO 3.0V AT 5.0VIN Typical Performance Curves (ISL21007-30) 3.001 3.000 2.999 +125°C +25°C 2.998 2.997 -40°C 2.996 2.995 2.994 3.2 3.6 4.0 VIN (V) 0.05 -40°C +25°C -0.05 -0.10 +125°C -0.15 -0.20 SINKING 0 1 2 LOAD (mA) 3 4 5 6 7 VOUT (V) NORMALIZED TO 3.0V AT +25°C VOUT (mV) NORMALIZED TO 0mA 0.10 -0.25 -7 -6 -5 -4 -3 -2 -1 4.8 5.2 5.6 FIGURE 45. LINE REGULATION OVER TEMPERATURE FIGURE 44. LINE REGULATION (3 UNITS) 0.00 4.4 VIN (V) 3.0006 3.0004 3.0002 UNIT 3 3.0000 2.9998 UNIT 2 2.9996 2.9992 2.9990 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) SOURCING FIGURE 46. LOAD REGULATION OVER TEMPERATURE UNIT 1 2.9994 FIGURE 47. VOUT vs TEMPERATURE (3 UNITS) PSRR (dB) X: 200mV/DIV Y: 10µs/DIV 10 0 VIN (DC) = 5.0V -10 VIN (AC) = 50mVP-P -20 -30 -40 -50 -60 -70 -80 -90 -100 1.E+00 1.E+02 NO LOAD 1nF 10nF 100nF VIN = +0.5V 1µF VIN = -0.5V 1.E+04 1.E+06 FREQUENCY (Hz) FIGURE 48. PSRR vs CAPACITIVE LOADS FN6326 Rev.12.00 Jun 9, 2017 FIGURE 49. LINE TRANSIENT RESPONSE, NO CAPACITIVE LOAD Page 14 of 20 ISL21007 Typical Performance Curves (ISL21007-30) (REXT = 100kΩ) (Continued) X: 200mV/DIV Y: 10µs/DIV VIN = 5.0V VIN = +0.5V 1V/DIV VOUT = 3.0V VIN = -0.5V 20µs/DIV FIGURE 50. LINE TRANSIENT RESPONSE, 0.001µF LOAD CAPACITANCE FIGURE 51. TURN-ON TIME GAIN IS x1000, NOISE IS 4.5µVP-P 140 1nF 10nF 120 100nF 2mV/DIV ZOUT () 100 NO LOAD 80 60 40 20 0 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04 1.00E+05 1.00E+06 FREQUENCY (Hz) FIGURE 52. ZOUT vs FREQUENCY FIGURE 53. VOUT NOISE, 0.1Hz TO 10Hz 200mV/DIV +7mA -7mA 100µs/DIV FIGURE 54. LOAD TRANSIENT RESPONSE FN6326 Rev.12.00 Jun 9, 2017 Page 15 of 20 ISL21007 Applications Information FGA Technology The ISL21007 voltage reference uses floating gate technology to create references with very low drift and supply current. Essentially, the charge stored on a floating gate cell is set precisely in manufacturing. The reference voltage output itself is a buffered version of the floating gate voltage. The resulting reference device has excellent characteristics that are unique in the industry: very low temperature drift, high initial accuracy, and almost zero supply current. Also, the reference voltage itself is not limited by voltage bandgaps or zener settings, so a wide range of reference voltages can be programmed (standard voltage settings are provided, but customer-specific voltages are available). The process used for these reference devices is a floating gate CMOS process, and the amplifier circuitry uses CMOS transistors for amplifier and output transistor circuitry. While providing excellent accuracy, there are limitations in output noise level and load regulation due to the MOS device characteristics. These limitations are addressed with circuit techniques discussed in other sections. Micropower Operation The ISL21007 consumes extremely low supply current due to the proprietary FGA technology. Low noise performance is achieved using optimized biasing techniques. Supply current is typically 75µA and noise is 4.5µVP-P benefitting precision, low noise portable applications such as handheld meters and instruments. Data Converters in particular can use the ISL21007 as an external voltage reference. Low power DAC and ADC circuits will realize maximum resolution with lowest noise. Handling and Board Mounting FGA references provide excellent initial accuracy and low temperature drift at the expense of very little power drain. There are some precautions to take to ensure this accuracy is not compromised. Excessive heat during solder reflow can cause excessive initial accuracy drift, so the recommended +260°C max temperature profile should not be exceeded. Expect up to 1mV drift from the solder reflow process. Board Assembly Considerations FGA references provide high accuracy and low temperature drift but some PC board assembly precautions are necessary. Normal Output voltage shifts of 100µV to 1mV can be expected with Pb-free reflow profiles or wave solder on multi-layer FR4 PC boards. Precautions should be taken to avoid excessive heat or extended exposure to high reflow or wave solder temperatures, this may reduce device initial accuracy. Post-assembly X-ray inspection may also lead to permanent changes in device output voltage and should be minimized or avoided. If X-ray inspection is required, it is advisable to monitor the reference output voltage to verify excessive shift has not occurred. If large amounts of shift are observed, it is best to add an X-ray shield consisting of thin zinc (300µm) sheeting to allow clear imaging, yet block X-ray energy that affects the FGA reference. Special Applications Considerations In addition to post-assembly examination, there are also other X-ray sources that may affect the FGA reference long term accuracy. Airport screening machines contain X-rays and will have a cumulative effect on the voltage reference output accuracy. Carry-on luggage screening uses low level X-rays and is not a major source of output voltage shift, however, if a product is expected to pass through that type of screening over 100 times, it may need to consider shielding with copper or aluminum. Checked luggage X-rays are higher intensity and can cause output voltage shift in much fewer passes, thus devices expected to go through those machines should definitely consider shielding. Note that just two layers of 1/2 ounce copper planes will reduce the received dose by over 90%. The leadframe for the device which is on the bottom also provides similar shielding. If a device is expected to pass through luggage X-ray machines numerous times, it is advised to mount a 2-layer (minimum) PC board on the top, along with a ground plane underneath, which will effectively shield it from 50 to 100 passes through the machine. Because these machines vary in X-ray dose delivered, it is difficult to produce an accurate maximum pass recommendation. FGA references are susceptible to excessive X-radiation like that used in PC board manufacturing. Initial accuracy can change 10mV or more under extreme radiation. If an assembled board needs to be X-rayed, care should be taken to shield the FGA reference device. Board Mounting Considerations For applications requiring the highest accuracy, board mounting location should be reviewed. Placing the device in areas subject to slight twisting can cause degradation of the accuracy of the reference voltage due to die stresses. It is normally best to place the device near the edge of a board, or the shortest side, as the axis of bending is most limited at that location. Obviously, mounting the device on flexprint or extremely thin PC material will likewise cause loss of reference accuracy. FN6326 Rev.12.00 Jun 9, 2017 Page 16 of 20 ISL21007 Noise Performance and Reduction Temperature Coefficient The output noise voltage in a 0.1Hz to 10Hz bandwidth is typically 4.5µVP-P. The noise measurement is made with a bandpass filter made of a 1-pole high-pass filter with a corner frequency at 0.1Hz and a 2-pole low-pass filter with a corner frequency at 12.6Hz to create a filter with a 9.9Hz bandwidth. Noise in the 10kHz to 1MHz bandwidth is approximately 40µVP-P with no capacitance on the output. This noise measurement is made with a 2 decade bandpass filter made of a 1-pole high-pass filter with a corner frequency at 1/10 of the center frequency and 1-pole low-pass filter with a corner frequency at 10 times the center frequency. Load capacitance up to 1000pF can be added but will result in only marginal improvements in output noise and transient response. The output stage of the ISL21007 is not designed to drive heavily capacitive loads, so for load capacitances above 0.001µF, the noise reduction network shown in Figure 55 on page 17 is recommended. This network reduces noise significantly over the full bandwidth. Noise is reduced to less than 20µVP-P from 1Hz to 1MHz using this network with a 0.01µF capacitor and a 2kΩ resistor in series with a 10µF capacitor. Also, transient response is improved with higher value output capacitor. The 0.01µF value can be increased for better load transient response with little sacrifice in output stability. The limits stated for temperature coefficient (tempco) are governed by the method of measurement. The overwhelming standard for specifying the temperature drift of a reference is to measure the reference voltage at two temperatures, take the total variation, (VHIGH – VLOW), and divide by the temperature extremes of measurement (THIGH – TLOW). The result is divided by the nominal reference voltage (at T = +25°C) and multiplied by 106 to yield ppm/°C. This is the “Box” method for specifying temperature coefficient. Output Voltage Adjustment The output voltage can be adjusted up or down by 2.5% by placing a potentiometer from VOUT to ground, and connecting the wiper to the TRIM pin. The TRIM input is high impedance, so no series resistance is needed. The resistor in the potentiometer should be a low tempco (<50ppm/°C) and the resulting voltage divider should have very low tempco <5ppm/°C. A digital potentiometer such as the ISL95810 provides a low tempco resistance and excellent resistor and tempco matching for trim applications. See Figure 59 and TB473 for further information. VIN = 5.0V 10µF Turn-On Time 0.1µF VIN ISL21007 The ISL21007 devices have low supply current and thus the time to bias up internal circuitry to final values will be longer than with higher power references. Normal turn-on time is typically 120µs. This is shown in Figure 10. Circuit design must take this into account when looking at power-up delays or sequencing. VO GND 2kΩ 0.01µF 10µF FIGURE 55. HANDLING HIGH LOAD CAPACITANCE Typical Application Circuits VIN = +5.0V R = 200Ω 2N2905 VIN ISL21007 VOUT VOUT = 2.500V GND 2.5V/50mA 0.001µF FIGURE 56. PRECISION 2.500V 50mA REFERENCE FN6326 Rev.12.00 Jun 9, 2017 Page 17 of 20 ISL21007 Typical Application Circuits (Continued) +2.7 TO 5.5V 0.1µF 10µF VIN VOUT ISL21007-25 VOUT = 2.500V GND 0.001µF VCC RH VOUT X9119 (UNBUFFERED) + SDA 2-WIRE BUS EL8178 SCL VOUT – VSS (BUFFERED) RL FIGURE 57. 2.500V FULL SCALE LOW-DRIFT, LOW NOISE, 10-BIT ADJUSTABLE VOLTAGE SOURCE +2.7 TO 5.5V 0.1µF 10µF VIN EL8178 + VOUT VOUT SENSE – ISL21007-12 LOAD GND FIGURE 58. KELVIN SENSED LOAD 10µF +2.7 TO 5.5V 0.1µF VIN 2.5V ±2.5% VOUT ISL21007-12 TRIM GND I2C BUS SDA VCC SCL ISL95810 VSS RH RL FIGURE 59. OUTPUT ADJUSTMENT USING THE TRIM PIN FN6326 Rev.12.00 Jun 9, 2017 Page 18 of 20 ISL21007 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure that you have the latest revision. DATE REVISION CHANGE Jun 9, 2017 FN6326.12 Applied new header/footer. Updated Table 1 on page 1. Updated Related Literature section. Updated Ordering information table. Updated Note 2. Updated About Intersil section. Sept 2, 2015 FN6326.11 Added Rev History beginning with Revision 11. Added About Intersil verbiage. Removed Initial Accuracy from Features on page 1. Updated Available Options Table on page 1. Updated Ordering Information on page 2. Moved Pin Configuration from page 1 to page 3. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. For a listing of definitions and abbreviations of common terms used in our documents, visit www.intersil.com/glossary. You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. © Copyright Intersil Americas LLC 2007-2017. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6326 Rev.12.00 Jun 9, 2017 Page 19 of 20 ISL21007 Package Outline Drawing For the most recent package outline drawing, see M8.15. M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) 5.80 (0.228) AREA 0.50 (0.20) x 45° 0.25 (0.01) 4.00 (0.157) 3.80 (0.150) 1 2 8° 0° 3 0.25 (0.010) 0.19 (0.008) SIDE VIEW “B” TOP VIEW 2.20 (0.087) SEATING PLANE 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 1 8 2 7 0.60 (0.023) 1.27 (0.050) 3 6 4 5 -C- 1.27 (0.050) 0.25(0.010) 0.10(0.004) 0.51(0.020) 0.33(0.013) 5.20(0.205) SIDE VIEW “A TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1994. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). FN6326 Rev.12.00 Jun 9, 2017 Page 20 of 20