AD ADG751ARM Cmos, low voltage rf/video, spst switch Datasheet

a
FEATURES
High Off Isolation –75 dB at 100 MHz
–3 dB Signal Bandwidth 300 MHz
+1.8 V to +5.5 V Single Supply
Low On-Resistance (15 ⍀)
Fast Switching Times
tON Typically 9 ns
tOFF Typically 3 ns
Typical Power Consumption <0.01 ␮W
TTL/CMOS Compatible
APPLICATIONS
Audio and Video Switching
RF Switching
Networking Applications
Battery Powered Systems
Communication Systems
Relay Replacement
Sample-and-Hold Systems
CMOS, Low Voltage
RF/Video, SPST Switch
ADG751
FUNCTIONAL BLOCK DIAGRAM
ADG751
S
IN
SWITCH SHOWN FOR A LOGIC "1" INPUT
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG751 is a low voltage SPST (single pole, single throw)
switch. It is constructed in a T-switch configuration, which
results in excellent Off Isolation while maintaining good frequency response in the ON condition.
1. High Off Isolation –75 dB at 100 MHz.
High off isolation and wide signal bandwidth make this part
suitable for switching RF and video signals. Low power consumption and operating supply range of +1.8 V to +5.5 V make
it ideal for battery powered, portable instruments.
D
2. –3 dB Signal Bandwidth 300 MHz.
3. Low On-Resistance (15 Ω).
4. Low Power Consumption, typically <0.01 µW.
5. Tiny 6-lead SOT-23 and 8-lead µSOIC packages.
The ADG751 is designed on a submicron process that provides
low power dissipation yet gives high switching speed and low on
resistance. This part is a fully bidirectional switch and can handle
signals up to and including the supply rails.
The ADG751 is available in 6-lead SOT-23 and 8-lead µSOIC
packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
ADG751–SPECIFICATIONS (V
DD
= +5 V ⴞ 10%, GND = 0 V, unless otherwise noted.)
B Grade
–40ⴗC to
+25ⴗC
+85ⴗC
Parameter
ANALOG SWITCH
Analog Signal Range
On-Resistance (RON)
A Grade
–40ⴗC to
+25ⴗC
+85ⴗC
0 V to VDD
On-Resistance Flatness (RFLAT(ON))
28
35
3
40
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, I S (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
± 3.0
± 3.0
± 3.0
0.001
V
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, I DS = 10 mA;
Test Circuit 1
VS = 0 V to 2.5 V, IDS = 10 mA
VDD = 4.5 V
± 3.0
nA typ
nA max
nA typ
nA max
nA typ
nA max
VDD = +5.5 V
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 2
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 2
VD = VS = 1 V, or 4.5 V;
Test Circuit 3
2.4
0.8
V min
V max
± 0.5
µA typ
µA max
pF typ
20
3
± 0.01
± 0.25
± 0.01
± 0.25
± 0.01
± 0.25
2.4
0.8
± 3.0
± 3.0
0.001
± 0.5
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
tON
± 0.01
± 0.25
± 0.01
± 0.25
± 0.01
± 0.25
Test Conditions/Comments
0 V to VDD
15
18
2
5
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Units
2
2
VIN = VINL or V INH
1
Charge Injection
1
1
Off Isolation
–75
–65
–3 dB Bandwidth
CS (OFF)
CD (OFF)
CD , CS (ON)
180
4
4
26
300
4
4
15
RL = 300 Ω, CL = 35 pF;
VS = 3 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF;
VS = 3 V, Test Circuit 4
VS = 1 V, RS = 0 Ω, CL = 1.0 nF;
Test Circuit 5
dB typ
RL = 50 Ω, CL = 5 pF, f = 100 MHz;
Test Circuit 6
MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 7
pF typ
pF typ
pF typ
0.001
0.1
0.001
0.1
µA typ
µA max
9
9
13
tOFF
3
13
3
5
POWER REQUIREMENTS
IDD
0.5
5
0.5
ns typ
ns max
ns typ
ns max
pC typ
VDD = +5.5 V
Digital Inputs = 0 V or +5.5 V
NOTES
1
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. 0
SPECIFICATIONS (V
ADG751
DD
= +3 V ⴞ 10%, GND = 0 V, unless otherwise noted.)
Parameter
B Grade
–40ⴗC to
+25ⴗC
+85ⴗC
ANALOG SWITCH
Analog Signal Range
On-Resistance (RON)
60
A Grade
–40ⴗC to
+25ⴗC
+85ⴗC
0 V to VDD
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, I S (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
V
Ω typ
Ω max
VS = 0 V to VDD, I DS = –10 mA;
Test Circuit 1
± 3.0
nA typ
nA max
nA typ
nA max
nA typ
nA max
VDD = +3.3 V
VD = 3 V/1 V, VS = 1 V/3 V;
Test Circuit 2
VD = 1 V/3 V, VS = 3 V/1 V;
Test Circuit 2
VD = VS = 1 V, or 3 V;
Test Circuit 3
2.0
0.4
V min
V max
± 0.5
µA typ
µA max
pF typ
0 V to VDD
± 3.0
± 3.0
± 3.0
50
± 0.01
± 0.25
± 0.01
± 0.25
± 0.01
± 0.25
2.0
0.4
0.001
± 3.0
± 3.0
0.001
± 0.5
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
tON
± 0.01
± 0.25
± 0.01
± 0.25
± 0.01
± 0.25
Test Conditions/Comments
35
90
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Units
2
2
VIN = VINL or V INH
1
Charge Injection
1
1
Off Isolation
–75
–65
–3 dB Bandwidth
CS (OFF)
CD (OFF)
CD , CS (ON)
180
4
4
26
280
4
4
15
RL = 300 Ω, CL = 35 pF;
VS = 2 V, Test Circuit 4
RL = 300 Ω, CL = 35 pF;
VS = 2 V, Test Circuit 4
VS = 1 V, RS = 0 Ω, CL = 1.0 nF;
Test Circuit 5
dB typ
RL = 50 Ω, CL = 5 pF, f = 100 MHz;
Test Circuit 6
MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 7
pF typ
pF typ
pF typ
0.001
0.1
0.001
0.1
µA typ
µA max
12
12
19
tOFF
4
19
4
6
POWER REQUIREMENTS
IDD
0.5
6
NOTES
1
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
–3–
0.5
ns typ
ns max
ns typ
ns max
pC typ
VDD = +3.3 V
Digital Inputs = 0 V or +3.3 V
ADG751
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs2 . . . . . . . . . . . –0.3 V to V DD +0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (A, B Versions) . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (TJ Max) . . . . . . . . . . . . . . . . . .+150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . (TJ Max–TA)/θJA
µSOIC Package
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
SOT-23 Package
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
ORDERING GUIDE
Model
Temperature Range
Brand*
Package Descriptions
Package Options
ADG751BRM
ADG751BRT
ADG751ARM
ADG751ART
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
SDB
SDB
SDA
SDA
µSOIC
SOT-23
µSOIC
SOT-23
RM-8
RT-6
RM-8
RT-6
*Brand on these packages is limited to three characters due to space constraints.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG751 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. 0
ADG751
TERMINOLOGY
PIN CONFIGURATIONS
8-Lead ␮SOIC
(RM-8)
NC 1
VDD
GND
S
D
IN
RON
RFLAT(ON)
8 VDD
ADG751
7 D
TOP VIEW
GND 3 (Not to Scale) 6 NC
S 2
5 NC
IN 4
NC = NO CONNECT
6-Lead SOT-23
(RT-6)
S 1
VDD 2
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
6 D
ADG751
5 GND
TOP VIEW
(Not
to
Scale)
NC 3
4 IN
NC = NO CONNECT
tOFF
Off Isolation
Charge
Injection
Bandwidth
Most positive power supply potential.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Ohmic resistance between D and S.
Flatness is defined as the difference between
the maximum and minimum value of on resistance as measured over the specified analog
signal range.
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D and S.
“OFF” switch source capacitance.
“OFF” switch drain capacitance.
“ON” switch capacitance.
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
Delay between applying the digital control
input and the output switching off.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of the glitch impulse transferred from
the digital input to the analog output during
switching.
On Response
The frequency at which the output is attenuated by –3 dBs.
The frequency response of the “ON” switch.
Insertion Loss
Loss due to the ON resistance of the switch.
VINL
Maximum input voltage for Logic “0.”
VINH
Minimum input voltage for Logic “1.”
IINL(IINH)
Input current of the digital input.
IDD
Positive supply current.
Table I. Truth Table
REV. 0
–5–
ADG751 IN
Switch Condition
0
1
ON
OFF
ADG751–Typical Performance Characteristics
65
35
VDD = +2.7V
30
55
50
RON – V
25
RON – V
TA = +258C
VDD = +2.7V
60
TA = +258C
20
45
VDD = +3.3V
40
35
15
VDD = +3.3V
VDD = +4.5V
30
VDD = +4.5V
25
10
VDD = +5.5V
20
VDD = +5.5V
5
15
0
2
3
4
1
VD OR VS DRAIN SOURCE VOLTAGE – Volts
5
0
2.0
3.0
4.0
1.0
VD OR VS DRAIN SOURCE VOLTAGE – Volts
5.0
5.4
Figure 4. On Resistance as a Function of VD (VS) Single
Supplies (B Grade)
Figure 1. On Resistance as a Function of VD (VS) Single
Supplies (A Grade)
65
35
VDD = +3V
VDD = +3V
30
60
+1258C
+1258C
55
+858C
+858C
50
RON – V
RON – V
25
20
45
40
35
+258C
+258C
15
30
–408C
–408C
25
10
20
5
15
0
1.0
1.5
2.0
2.5
0.5
VD OR VS DRAIN SOURCE VOLTAGE – Volts
3.0
0
1.2
0.4
0.8
1.6
2.0
2.4
VD OR VS DRAIN SOURCE VOLTAGE – Volts
2.8 3.0
Figure 5. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 3 V (B Grade)
Figure 2. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 3 V (A Grade)
35
65
VDD = +5V
VDD = +5V
60
30
55
50
45
+1258C
40
+1258C
20
RON – V
RON – V
25
+858C
15
35
+858C
30
25
20
10
15
5
+258C
10
–408C
+258C
–408C
5
0
0
1
2
3
4
VD OR VS DRAIN SOURCE VOLTAGE – Volts
0
5
0
2.0
1.0
3.0
4.0
VD OR VS DRAIN SOURCE VOLTAGE – Volts
5.0
Figure 6. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 5 V (B Grade)
Figure 3. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 5 V (A Grade)
–6–
REV. 0
ADG751
10m
0
VDD = +5V
TA = +258C
B GRADE
1m
IDD – Amps
BANDWIDTH – dB
TA = +258C
–5
A GRADE
10m
1m
100n
10n
0.1
–10
1
10
FREQUENCY – MHz
100
300
1k
10k
100k
FREQUENCY – Hz
100M
10M
Figure 10. Supply Current vs. Input Switching Frequency
Figure 7. On Response vs. Frequency (A Grade)
0
6
TA = +258C
4
TA = +258C
VDD = +3V
BANDWIDTH – dB
2
VDD = +5V
QINJ – pC
0
–5
–2
–4
–6
–8
–10
–10
10
FREQUENCY – MHz
1
100
300
0
TA = +258C
OFF ISOLATION – dB
–25
–50
A GRADE
–75
B GRADE
–100
–125
10
FREQUENCY – MHz
100
300
Figure 9. Off Isolation vs. Frequency for Both Grades
REV. 0
1.0
3.0
2.0
SOURCE VOLTAGE – Volts
4.0
5.0
Figure 11. Charge Injection vs. Source/Drain Voltage
Figure 8. On Response vs. Frequency (B Grade)
1
0
–7–
ADG751
GENERAL DESCRIPTION
LAYOUT CONSIDERATIONS
The ADG751 is an SPST switch constructed using switches in a
T configuration to obtain high “OFF” isolation while maintaining good frequency response in the “ON” condition.
Where accurate high frequency operation is important, careful
consideration should be given to the printed circuit board layout
and to grounding. Wire wrap boards, prototype boards and
sockets are not recommended because of their high parasitic
inductance and capacitance. The part should be soldered directly to a printed circuit board. A ground plane should cover all
unused areas of the component side of the board to provide a
low impedance path to ground. Removing the ground planes
from the area around the part reduces stray capacitance.
Figure 12 shows the T-switch configuration. While the switch is
in the OFF state, the shunt switch is closed and the two series
switches are open. The closed shunt switch provides a signal
path to ground for any of the unwanted signals that find their
way through the off capacitances of the series’ MOS devices.
This results in improved isolation between the input and output
than with an ordinary series switch. When the switch is in the
ON condition, the shunt switch is open and the signal path is
through the two series switches which are now closed.
Good decoupling is important in achieving optimum performance. VDD should be decoupled with a 0.1 µF surface mount
capacitor to ground mounted as close as possible to the device
itself.
SERIES
D
S
IN
SHUNT
Figure 12. Basic T-Switch Configuration
–8–
REV. 0
ADG751
Test Circuits
V1
S
IS (OFF)
D
S
A
VS
RON = V1/IDS
D
ID (OFF)
A
VS
IDS
S
NC
D
ID (ON)
A
VD
VD
NC = NO CONNECT
Test Circuit 1. On Resistance
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VDD
0.1mF
VIN
50%
50%
VDD
S
VS
D
VOUT
RL
300V
IN
CL
35pF
VS
90%
90%
VOUT
GND
t OFF
t ON
Test Circuit 4. Switching Times
VDD
VIN
VDD
OFF
ON
RS
S
VS
D
CL
1.0nF
IN
VOUT
DVOUT
VOUT
QINJ = CL 3 DVOUT
GND
Test Circuit 5. Charge Injection
VDD
VDD
0.1mF
0.1mF
VDD
VDD
NETWORK
ANALYZER
50V
VS
NETWORK
ANALYZER
50V
NETWORK
ANALYZER
S
50V
D
RL
50V
IN
VIN
VOUT
VS
GND
OFF ISOLATION = 20 LOG
NETWORK
ANALYZER
S
RL
50V
IN
VIN
VOUT
D
GND
VS
INSERTION LOSS = 20 LOG
Test Circuit 6. Off Isolation
REV. 0
Test Circuit 7. Bandwidth
–9–
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
ADG751
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead ␮SOIC
(RM-8)
8
C3569–8–4/99
0.122 (3.10)
0.114 (2.90)
5
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
1
4
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.120 (3.05)
0.112 (2.84)
0.043 (1.09)
0.037 (0.94)
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
SEATING 0.008 (0.20)
PLANE
0.011 (0.28)
0.003 (0.08)
338
278
0.028 (0.71)
0.016 (0.41)
6-Lead SOT-23
(RT-6)
0.122 (3.10)
0.106 (2.70)
0.071 (1.80)
0.059 (1.50)
6
5
4
1
2
3
0.118 (3.00)
0.098 (2.50)
PIN 1
0.037 (0.95) BSC
0.075 (1.90)
BSC
0.006 (0.15)
0.000 (0.00)
0.057 (1.45)
0.035 (0.90)
0.020 (0.50) SEATING
0.010 (0.25) PLANE
108
0.009 (0.23) 08
0.003 (0.08)
0.022 (0.55)
0.014 (0.35)
PRINTED IN U.S.A.
0.051 (1.30)
0.035 (0.90)
–10–
REV. 0