GMT G2992F1U 3a ddr bus termination regulator Datasheet

G2992
Global Mixed-mode Technology
3A DDR Bus Termination Regulator
Features
General Description
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The G2992 is a linear regulator designed to meet the
JEDEC SSTL-18, SSTL-2 and SSTL-3 (Series Stub
Termination Logic) specifications for termination of DDR
I/II/III/IIIL -SDRAM. It contains a high-speed operational
amplifier that provides excellent response to the load
transients. This device can deliver 3A continuous current in the application such as required for DDR I/II/III
/IIIL SDRAM termination. The G2992 can easily provide
the accurate VTT voltage with two external resistors
generating reference voltage. The quiescent current is
as low as 750µA @ VCNTL = 3.3V. So the power consumption can meet the low power consumption applications. The G2992 also has a shutdown function by setting VREF smaller than 0.2V, that provides Suspend to
RAM (STR) functionality. When in the shutdown mode,
the VTT output (on VOUT pin) will be tri-state providing a
high impendence. A power saving advantage can be
obtained in this mode through lowering the quiescent
current to 50μA @ VCNTL = 3.3V.
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VCNTL Supply Voltage: 3.3V to 5.5V
Termination Supply Voltage: 1.2V to 3.6V
Support DDR I(1.25VTT), DDR II (0.9 VTT), DDR III
(0.75VTT), and DDR IIIL (0.675VTT) Requirements
Requires Only 20µF Ceramic Output Capacitor
Low Output Offset
3A Source and Sink Current
Low External Component Count
No Inductor Required
Thermal Shutdown Protection
Over Current Protection
Suspend to RAM (STR) Function with
High-impedance output
SOP-8 (FD) Package
Applications
„
DDR-SDRAM Termination Voltage
DDR I / DDR II / DDR III / DDR IIIL Termination
Voltage
„ SSTL-18
„ SSTL-2
„ SSTL-3
„
Ordering Information
ORDER
NUMBER
MARKING
TEMP.
RANGE
PACKAGE
(Green)
G2992F1U
G2992
-40°C to +85°C
SOP-8 (FD)
Note: F1: SOP-8 (FD)
U: Tape & Reel
Pin Configuration
G2992
1
8
NC
GND
2
7
NC
6
VCNTL
5
NC
VREF 3
DDR II
VCNTL=3.3V
VIN
Thermal
Pad
VOUT 4
VIN=1.8V
RTT
R1
2N7002
EN
VIN
VCNTL
VREF
R2
CSS
CIN
CCNTL
VOUT
COUT RDUMMY
GND
SOP-8 (FD)
Note: Recommend connecting the Thermal Pad to
the Ground for excellent power dissipation.
Typical Application Circuit
DDR III*
DDR I
VCNTL=3.3V
VCNTL=3.3V
VIN=2.5V
2N7002
EN
VIN=1.5V
RTT
R1
VIN
VREF
R2
CSS
VCNTL
CIN
CCNTL
VOUT
GND
RTT
R1
2N7002
EN
COUT RDUMMY
VIN
VREF
R2
CSS
VCNTL
CIN
CCNTL
VOUT
GND
COUT R
DUMMY
* Recommended VCTRL =3.3V
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.7
Jun 26, 2012
1
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