February 1996 NDS8852H Complementary MOSFET Half Bridge General Description Features These Complementary MOSFET half bridge devices are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage half bridge applications or CMOS applications when both gates are connected together. N-Channel 4.3A, 30V, RDS(ON)=0.08Ω @ VGS=10V. P-Channel -3.4A, -30V, RDS(ON)=0.13Ω @ VGS=-10V. High density cell design or extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Matched pair for equal input capacitance and power capability . ________________________________________________________________________________ V+ Vout P-Gate Vout Vout N -Gate Vout V- Absolute Maximum Ratings Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current - Continuous T A= 25°C unless otherwise noted (Note 1a & 2) - Pulsed PD P-Channel Units 30 -30 V 20 -20 V 4.3 -3.4 A 15 -10 Maximum Power Dissipation (Note 1a) 2.5 (Single Device) (Note 1b) 1.2 (Note 1c) TJ,TSTG N-Channel Operating and Storage Temperature Range W 1 -55 to 150 °C 50 °C/W 25 °C/W THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Single Device) RθJC Thermal Resistance, Junction-to-Case (Single Device) © 1997 Fairchild Semiconductor Corporation (Note 1a) (Note 1) NDS8852H Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Type Min N-Ch 30 -30 Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA VGS = 0 V, ID = -250 µA P-Ch IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V N-Ch V V TJ = 55oC VDS = -24 V, VGS = 0 V 2 µA 25 µA P-Ch -2 µA o -25 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V All 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V All -100 nA V TJ = 55 C ON CHARACTERISTICS (Note 3) VGS(th) Gate Threshold Voltage N-Ch VDS = VGS, ID = 250 µA TJ = 125oC P-Ch VDS = VGS, ID = -250 µA TJ = 125oC RDS(ON) Static Drain-Source On-Resistance 1 1.7 2.8 0.7 1.2 2.2 -1 -1.6 -2.8 -0.85 -1.25 -2.5 0.06 0.08 0.08 0.13 N-Ch VGS = 10 V, ID = 3.4 A TJ = 125oC VGS = 4.5 V, ID = 2.8 A VGS = -10 V, ID = -3.4 A P-Ch TJ = 125oC VGS = -4.5 V, ID = -2.8 A ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V gFS Forward Transconductance Ω 0.08 0.11 0.11 0.13 0.15 0.21 0.17 0.2 N-Ch 10 A VGS = -10 V, VDS = -5 V P-Ch -10 VDS = 15 V, ID = 3.4 A N-Ch 6 VDS = -15 V, ID = -3.4 A P-Ch 4 N-Channel VDS = 15 V, VGS = 0 V, f = 1.0 MHz N-Ch 300 P-Ch 330 N-Ch 190 S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance P-Channel VDS = -15 V, VGS = 0 V, f = 1.0 MHz P-Ch 190 N-Ch 70 P-Ch 70 pF pF pF NDS8852H Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Type N-Channel VDD = 10 V, ID = 1 A, VGEN = 10 V, RGEN = 6 Ω N-Ch P-Ch N-Ch Min Typ Max Units 10 15 ns 9 40 13 20 SWITCHING CHARACTERISTICS (Note 3) tD(on) Turn - On Delay Time Turn - On Rise Time tr tD(off) Turn - Off Delay Time tf Turn - Off Fall Time Qg P-Channel VDD = -10 V, ID = -1 A, VGEN = -10 V, RGEN = 6 Ω Total Gate Charge Qgs Qgd N-Channel VDS = 10 V, ID = 3.4 A, VGS = 10 V P-Channel VDS = -10 V, ID = -3.4 A, VGS = -10 V Gate-Source Charge Gate-Drain Charge P-Ch 21 40 N-Ch 21 50 P-Ch 21 90 N-Ch 5 50 P-Ch 8 50 N-Ch 9.5 27 P-Ch 10 25 N-Ch 1.5 P-Ch 1.6 N-Ch 2.6 P-Ch 2.7 ns ns ns nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD trr Drain-Source Diode Forward Voltage Reverse Recovery Time N-Ch 2.1 P-Ch -2.1 VGS = 0 V, IS = 2.1 A (Note 2) N-Ch 0.8 1.2 VGS = 0 V, IS = -2.1 A (Note 2) P-Ch -0.8 -1.2 N-Channel VGS = 0 V, IF = 2.1 A, dIF/dt = 100 A/µs N-Ch 100 P-Channel VGS = 0 V, IF = -2.1 A, dIF/dt = 100 A/µs P-Ch 100 A V ns Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. PD(t ) = T J −TA R θJ A(t ) = T J −TA R θJ C+RθCA(t ) = I 2D (t ) × RDS ( ON ) TJ Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 50oC/W when mounted on a 1 in2 pad of 2oz cpper. b. 105oC/W when mounted on a 0.04 in2 pad of 2oz cpper. c. 125oC/W when mounted on a 0.006 in2 pad of 2oz cpper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDS8852H Rev. C1 Typical Electrical Characteristics -20 20 VGS =10V 8.0 VGS = -10V 6.0 , DRAIN-SOURCE CURRENT (A) 15 4.5 4.0 10 3.5 5 -5.5 0 1 2 V DS , DRAIN-SOURCE VOLTAGE (V) 3 -4.0 -5 -3.5 -3.0 0 -1 V DS -2 -3 , DRAIN-SOURCE VOLTAGE (V) -4 -5 Figure 2. P-Channel On-Region Characteristics. 3 VGS = -3.5V VGS = 3.5V R DS(on) , NORMALIZED 2.5 4.0 2 4.5 5.0 1.5 6.0 8.0 10 1 0.5 0 3 6 9 I D , DRAIN CURRENT (A) 12 DRAIN-SOURCE ON-RESISTANCE R DS(on) , NORMALIZED -4.5 0 3 DRAIN-SOURCE ON-RESISTANCE -5.0 -10 Figure 1. N-Channel On-Region Characteristics. 2.5 -6.0 1.5 -7.0 -8.0 -10 1 0 -3 -6 -9 I D , DRAIN CURRENT (A) -12 -15 1.6 R DS(ON), NORMALIZED V GS = 10V 1.2 1 0.8 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 Figure 5. N-Channel On-Resistance Variation with Temperature. 150 DRAIN-SOURCE ON-RESISTANCE I D = 3.4A 0.6 -50 -5.5 Figure 4. P-Channel On-Resistance Variation with Gate Voltage and Drain Current. 1.6 1.4 -4.5 -5.0 0.5 15 -4.0 2 Figure 3. N-Channel On-Resistance Variation with Gate Voltage and Drain Current. R DS(ON), NORMALIZED -7.0 -6.0 -15 I I 0 DRAIN-SOURCE ON-RESISTANCE -8.0 D 3.0 D , DRAIN-SOURCE CURRENT (A) 5.0 1.4 I D = -3.4A V GS = -10V 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 Figure 6. P-Channel On-Resistance Variation with Temperature. NDS8852H Rev. C1 Typical Electrical Characteristics 2 1.5 R DS(on) , NORMALIZED TJ = 125°C 25°C 1 -55°C 0 3 6 9 I D , DRAIN CURRENT (A) 12 DRAIN-SOURCE ON-RESISTANCE VGS = 10 V 0.5 V G S = -10V 25°C 1 -55°C 0.5 15 -3 V DS = -10V 125°C -12 T = -55°C J 25°C -8 8 I D , DRAIN CURRENT (A) 25°C 6 4 2 -15 1 2 3 4 -4 -2 0 5 -1 Figure 9. N-Channel Transfer Characteristics. -2 -3 -4 -5 V GS , GATE TO SOURCE VOLTAGE (V) -6 Figure 10. P-Channel Transfer Characteristics. 1.2 V DS = V GS I D = 250µA V th , NORMALIZED 1 0.9 0.8 0.7 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 Figure 11. N-Channel Gate Threshold Variation with Temperature. 150 GATE-SOURCE THRESHOLD VOLTAGE 1.2 1.1 0.6 -50 125°C -6 V GS , GATE TO SOURCE VOLTAGE (V) GATE-SOURCE THRESHOLD VOLTAGE -6 -9 I D , DRAIN CURRENT (A) -10 TJ = -55°C V DS = 1 0 V I D, DRAIN CURRENT (A) 0 Figure 8. P-Channel On-Resistance Variation with Drain Current and Temperature. 10 0 T J = 125°C 1.5 Figure 7. N-Channel On-Resistance Variation with Drain Current and Temperature. Vth , NORMALIZED R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2 VDS = VG S 1.1 I D = -250µA 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 Figure 12. P-Channel Gate Threshold Variation with Temperature. NDS8852H Rev. C1 1.1 1.12 I D = 250µA BV DSS, NORMALIZED 1.08 1.04 1 0.96 0.92 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 DRAIN-SOURCE BREAKDOWN VOLTAGE BV DSS , NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE Typical Electrical Characteristics 150 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 -50 1000 1000 800 800 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 150 500 C iss CAPACITANCE (pF) CAPACITANCE (pF) 500 300 C oss 200 100 50 0.1 0.2 C iss 300 C oss 200 100 f = 1 MHz f = 1 MHz C rss V GS = 0V 0.5 1 2 5 10 V DS , DRAIN TO SOURCE VOLTAGE (V) C rss V GS = 0 V 50 0.1 30 Figure 15. N-Channel Capacitance Characteristics. 0.2 0.5 1 2 5 10 -VDS , DRAIN TO SOURCE VOLTAGE (V) 30 Figure 16. P-Channel Capacitance Characteristics. 10 10 V DS = 10V I D = -3.4A 20V -V GS , GATE-SOURCE VOLTAGE (V) I D = 3.4A V GS , GATE-SOURCE VOLTAGE (V) -25 Figure 14. P-Channel Breakdown Voltage Variation with Temperature. Figure 13. N-Channel Breakdown Voltage Variation with Temperature. 8 15V 6 4 2 0 I D = -250µA 0 2 4 6 8 Q g , GATE CHARGE (nC) 10 Figure 17. N-Channel Gate Charge Characteristics. 12 V DS = -10V -20V 8 -15V 6 4 2 0 0 2 4 6 8 Q g , GATE CHARGE (nC) 10 12 Figure 18. P-Channel Gate Charge Characteristics. NDS8852H Rev. C1 Typical Electrical and Thermal Characteristics 10 5 -I S , REVERSE DRAIN CURRENT (A) I S, REVERSE DRAIN CURRENT (A) 10 V GS = 0V 5 1 TJ = 125°C 0.5 25°C -55°C 0.1 0.01 0.001 0.2 0.4 0.6 0.8 1 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V) 1 0.5 T = 125°C J 0.01 0.001 0.2 1.4 25°C -55°C 0.1 0.4 0.6 0.8 1 1.2 -VSD , BODY DIODE FORWARD VOLTAGE (V) 1.4 Figure 20. P-Channel Body Diode Forward Voltage Variation with Current and Temperature. Figure 19. N-Channel Body Diode Forward Voltage Variation with Current and Temperature. 10 6 V DS = -10V 8 , TRANSCONDUCTANCE (SIEMENS) T J = -55°C V DS =10V , TRANSCONDUCTANCE (SIEMENS) V GS = 0V 25°C 125°C 6 4 TJ = -55°C 25°C 4 125°C 3 2 1 0 g g FS FS 2 5 0 2 4 6 8 10 I D , DRAIN CURRENT (A) 0 0 -2 -4 -6 I D , DRAIN CURRENT (A) -8 -10 Figure 22. P-Channel Transconductance Variation with Drain Current and Temperature. Figure 21. N-Channel Transconductance Variation with Drain Current and Temperature. STEADY-STATE POWER DISSIPATION (W) 2.5 1a 2 1.5 1b 1c 1 4.5"x5" FR-4 Board o TA = 2 5 C Still Air 0.5 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 Figure 23. SO-8 Single Device DC Power Dissipation versus Copper Mounting Pad Area. NDS8852H Rev. C1 Typical Thermal Characteristics 5 -I D , STEADY-STATE DRAIN CURRENT (A) I D , STEADY-STATE DRAIN CURRENT (A) 5 1a 4 1b 1c 3 2 4.5"x5" FR-4 Board o TA = 2 5 C Still Air 1 VG S = 1 0 V 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 4 1a 3 1b 1c 2 o TA = 2 5 C Still Air 1 VG S = - 1 0 V 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 Figure 25. P-Ch Maximum Steady-State Drain Current versus Copper Mounting Pad Area. Figure 24. N-Ch Maximum Steady-State Drain Current versus Copper Mounting Pad Area. 30 30 10 RD 3 S(O N) LIM 0 1m us s IT 10 10 1 0m ms s 1s 10 s DC 0.3 VGS = 10V 0.1 SINGLE PULSE R θJ A = See Note 1c 0.03 0.2 3 0.5 1 2 5 10 V DS , DRAIN-SOURCE VOLTAGE (V) 30 RD N) LI T MI 10 10 0m 0u s s ms s 1s 10 s DC 0.3 V GS = -10V 0.1 SINGLE PULSE R θJ A = See Note 1c 0.01 0.1 50 S(O 1m 1 0.03 T A = 25°C 0.01 0.1 10 10 -I D , DRAIN CURRENT (A) 10 T A = 25°C 0.2 0.5 1 2 5 10 - VDS , DRAIN-SOURCE VOLTAGE (V) 30 50 Figure 27. P-Ch Maximum Safe Operating Area. Figure 26. N-Ch Maximum Safe Operating Area. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE ID , DRAIN CURRENT (A) 4.5"x5" FR-4 Board 0 .5 D = 0.5 0 .2 0.2 0 .1 0 .0 5 R JA (t) = r(t) * R JA θ θ R JA = See Note 1c θ 0.1 0.05 P(pk) 0.02 0 .0 2 0.01 0 .0 1 t1 Single Pulse 0 .0 0 5 t2 TJ - T = P * R JA (t) θ Duty Cycle, D = t 1 / t 2 A 0 .0 0 2 0 .0 0 1 0 .0001 0 .001 0 .0 1 0 .1 1 10 100 300 t 1 , TIME (sec) Figure 28. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDS8852H Rev. C1 SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure 1.0 Packaging Description: EL ECT ROST AT IC SEN SIT IVE DEVICES DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms Antistatic Cover Tape ESD Label SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. Static Dissipative Embossed Carrier Tape F63TNR Label Customized Label F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 Pin 1 SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Standard (no flow code) TNR 2,500 L86Z F011 D84Z Rail/Tube TNR TNR 95 4,000 500 13" Dia - 13" Dia 7" Dia 343x64x343 530x130x83 343x64x343 184x187x47 Max qty per Box 5,000 30,000 8,000 1,000 Weight per unit (gm) 0.0774 0.0774 0.0774 0.0774 Weight per Reel (kg) 0.6060 - 0.9696 0.1182 Reel Size Box Dimension (mm) SOIC-8 Unit Orientation Note/Comments 343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample F63TNLabel F63TN Label LOT: CBVK741B019 QTY: 2500 FSID: FDS9953A SPEC: D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: N/F: F ESD Label (F63TNR)3 SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0 Carrier Tape Cover Tape Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0 P0 D0 T E1 F K0 Wc W E2 B0 Tc A0 D1 P1 User Direction of Feed Dimensions are in millimeter Pkg type A0 B0 SOIC(8lds) (12mm) 6.50 +/-0.10 5.30 +/-0.10 W 12.0 +/-0.3 D0 D1 E1 E2 1.55 +/-0.05 1.60 +/-0.10 1.75 +/-0.10 F 10.25 min 5.50 +/-0.05 P1 P0 8.0 +/-0.1 4.0 +/-0.1 K0 2.1 +/-0.10 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). T Wc 0.450 +/0.150 9.2 +/-0.3 0.06 +/-0.02 0.5mm maximum 20 deg maximum Typical component cavity center line B0 Tc 0.5mm maximum 20 deg maximum component rotation Typical component center line Sketch A (Side or Front Sectional View) A0 Component Rotation Sketch C (Top View) Component lateral movement Sketch B (Top View) SOIC(8lds) Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max See detail AA Dim N 7" Diameter Option B Min Dim C See detail AA W3 13" Diameter Option Dim D min W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size Reel Option Dim A Dim B 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 – 0.606 11.9 – 15.4 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 7.00 178 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 – 0.606 11.9 – 15.4 12mm 7" Dia 7.00 177.8 12mm 13" Dia 13.00 330 1998 Fairchild Semiconductor Corporation Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL) July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S1) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0774 9 September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.