PD - 95903A
IRFBA1404PPbF
HEXFET® Power MOSFET
Typical Applications
l Industrial Motor Drive
D
VDSS = 40V
Benefits
l
l
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
Increase Current Handling Capability
175°C Operating Temperature
Fast Switching
Dynamic dv/dt Rating
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
RDS(on) = 3.7mΩ
G
ID = 206A
S
Description
This Stripe Planar design of HEXFET® Power MOSFETs utilizes the latest
processing techniques to achieve extremely low on-resistance per silicon area.
Additional features of this MOSFET are a 175oC junction operating temperature, fast switching speed and improved ruggedness in single and repetitive
avalanche. The Super-220 TM is a package that has been designed to have the
same mechanical outline and pinout as the industry standard TO-220 but can
house a considerably larger silicon die. The result is significantly increased
current handling capability over both the TO-220 and the much larger TO-247
package. The combination of extremely low on-resistance silicon and the
Super-220 TM package makes it ideal to reduce the component count in
multiparalled TO-220 applications, reduce system power dissipation, upgrade
existing designs or have TO-247 performance in a TO-220 outline.
These benefits make this design an extremely efficient and reliable device for
use in a wide variety of applications.
Super-220
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
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Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Recommended clip force
Max.
206
145
650
300
2.0
± 20
480
See Fig.12a, 12b, 14, 15
5.0
-40 to + 175
-55 to + 175
300 (1.6mm from case )
20
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
N
1
09/22/10
IRFBA1404PPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
40
–––
–––
2.0
106
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.036
–––
–––
–––
–––
–––
–––
–––
160
35
42
17
140
72
26
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
2.0
LS
Internal Source Inductance
–––
5.0
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
7360
1680
240
6630
1490
1540
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
3.7
mΩ VGS = 10V, ID = 95A
4.0
V
VDS = 10V, ID = 250µA
–––
S
VDS = 25V, ID = 60A
20
VDS = 40V, VGS = 0V
µA
250
VDS = 32V, VGS = 0V, TJ = 150°C
200
VGS = 20V
nA
-200
VGS = -20V
200
ID = 95A
–––
nC
VDS = 32V
60
VGS = 10V
–––
VDD = 20V
–––
ID = 95A
ns
–––
RG = 2.5Ω
–––
RD = 0.21Ω
D
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
S
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 32V
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 206
showing the
A
G
integral reverse
––– ––– 650
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 95A, VGS = 0V
––– 71 110
ns
TJ = 25°C, IF = 95A
––– 180 270
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
2
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.5
–––
0.50
–––
58
°C/W
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IRFBA1404PPbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
4.5V
100
100
4.5V
20µs PULSE WIDTH
TJ = 25 °C
10
0.1
1
10
10
0.1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.5
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 175 ° C
100
V DS = 25V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
VGS , Gate-to-Source Voltage (V)
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
10
4.0
20µs PULSE WIDTH
TJ = 175 ° C
9.0
ID = 159A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFBA1404PPbF
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
8000
6000
4000
Coss
2000
1
10
VDS = 32V
VDS = 20V
12
8
4
0
100
VDS , Drain-to-Source Voltage (V)
FOR TEST CIRCUIT
SEE FIGURE 13
0
40
80
120
160
200
240
QG , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 175 ° C
I D , Drain Current (A)
1000
100
10us
100us
100
TJ = 25 ° C
10
1
0.4
V GS = 0 V
0.8
1.2
1.6
2.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
ID = 95A
16
Crss
0
ISD , Reverse Drain Current (A)
C, Capacitance (pF)
10000
20
VGS , Gate-to-Source Voltage (V)
12000
2.4
1ms
10ms
10
1
TC = 25 ° C
TJ = 175 ° C
Single Pulse
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFBA1404PPbF
240
VDS
LIMITED BY PACKAGE
V GS
D.U.T.
180
RG
120
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
I D , Drain Current (A)
RD
+
-V DD
10V
Fig 10a. Switching Time Test Circuit
60
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
PDM
0.01
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFBA1404PPbF
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
1000
15V
I AS
TOP
800
BOTTOM
ID
39A
67A
95A
600
400
200
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
175
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
50
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
48
46
44
42
40
0
VGS
20
40
60
80
100
IAV , Avalanche Current ( A)
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
V DSav , Avalanche Voltage ( V )
10 V
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
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IRFBA1404PPbF
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses
0.01
100
0.05
0.10
10
1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
500
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 95A
400
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = t av ·f
175
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRFBA1404PPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 16. For N-Channel HEXFET® Power MOSFETs
8
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IRFBA1404PPbF
Super-220 ( TO-273AA ) Package Outline
11.00 [.433]
10.00 [.394]
A
5.00 [.196]
4.00 [.158]
9.00 [.
8.00 [.
B
0.25
1.50 [.059]
0.50 [.020]
4
13.50 [
12.50 [
MOSFET
IGBT
15.00 [.590]
14.00 [.552]
1
2
3
4.00 [.157]
3.50 [.138]
14.50 [.570]
13.00 [.512]
3X
2.55 [.100]
2X
4X
1.30 [.051]
0.90 [.036]
0.25 [.010]
1.00 [.039]
0.70 [.028]
3.00 [.118]
2.50 [.099]
B A
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS . Refer to AN-1001
Starting TJ = 25°C, L = 0.11mH
RG = 25Ω, IAS = 95A.
ISD ≤ 95A, di/dt ≤ 150A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
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Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 95A.
9
IRFBA1404PPbF
Super-220 (TO-273AA) Part Marking Information
EXAMPLE: THIS IS AN IRFBA22N50A WITH
ASSEMBLY LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
PART NUMBER
INTERNATIONAL RECTIFIER
LOGO
IRFBA22N50A
719C
17
89
ASSEMBLY LOT CODE
Note: "P" in assembly line position
indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
TOP
Super-220 not recommended for surface mount application
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/2010
10
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