Ordering number : ENA2177
LV5069JA
Bi-CMOS IC
Low power consumption and high efficiency
http://onsemi.com
Step-down Switching Regulator Controller
Overview
LV5069JA is Step-down switching regulator controller. The recommended operating range is 4.5V-23V. The operating
current is about 68μA, and low power consumption is achieved.
Features and Functions
• Typical value of light load mode current is 68μA
• 4.5V to 23V Operating input voltage range
• The oscillatory frequency can be set by the external pin. The oscillatory frequency is 300kHz - 1MHz.
• Output voltage adjustable to 1.26V
• Built-in OCP circuit with P-by-P method
• When P-by-P is generated continuously, It shifts to the HICCUP operation
• If connect C-HICCUP to GND pin, Then latch-off when over current
• External capacitor Soft-Start
• Under voltage lock-out, Thermal shutdown and power good indication
Applications
• DVD/Blu-rayTM Drivers and HDD
• LCD Monitors and TVs
• Point of Load DC/DC Converters
• Office Supplies
Typical Application
VIN
PG
VFB
FB
REF
R6
47kΩ
LV5069JA
VIN
C3 R2
1μF
PDR
ILIM
COMP
RSNS
SS
HDRV
C-HICCUP
R1
30mΩ
C7
1μF
C7
C7
C8
4.7nF 2.2nF 2.2nF
Semiconductor Components Industries, LLC, 2013
March, 2013
90
10μF
×2
80
Q1
L1 10μH
GND
C1: GRM31CB31E106K [murata]
C2: C2012JB0J106M [TDK]
Q1: CPH6350
D1: SB3003CH
L1: FDVE1040-100M [TOKO]
Efficiency
VOUT = 5V
70
RT
R7
470kΩ
100
C1
VOUT
R4
VFB
D1
R5
C2
10μF
×3
Efficiency -- %
EN
VIN=8V
V IN=12V
VIN=15V
60
50
40
30
20
10
0
0.1 2 3 5 7 1
2 3 5 7 10
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
32013NKPC 20130225-S00009 No.A2177-1/20
LV5069JA
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Input voltage
VIN max
Allowable pin voltage
PDR
Conditions
Ratings
Unit
25
V
VIN
V
6
V
HDRV
VIN
V
RSNS
VIN
V
ILIM
VIN
V
EN
VIN
V
PG
VIN
V
6
V
RT
REF
V
SS
REF
V
FB
REF
V
COMP
REF
V
VIN-PDR
REF
C-HICCUP
REF
V
0.74
W
Topr
-40 to +85
°C
Tstg
-55 to +150
°C
Allowable power dissipation
Pd max
Operating temperature
Storage temperature
Specified substrate *1
*1 Specified substrate : 114.3mm × 76.1mm × 1.6mm, fiberglass epoxy printed circuit board
Caution 1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommendation Operating Conditions at Ta = 25°C
Parameter
Input voltage range
Symbol
Conditions
Ratings
Unit
VIN
4.5 to 23
V
Electrical Characteristics at Ta = 25°C, VIN = 15V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
[Reference voltage]
Internal reference voltage
VREF
Pch drive voltage
VPDR
IOUT = 0 to -5mA
FOSC
RT = 470kΩ
1.247
1.260
1.273
V
VIN-5.5
VIN-5.0
VIN-4.5
V
280
330
380
[Saw wave oscillator]
Oscillatory frequency
kHz
[ON/OFF circuit]
IC startup voltage (EN PIN)
VCNT_ON
Disable voltage (EN PIN)
VCNT_OFF
2.0
VIN
V
0.3
V
[Soft start circuit]
Soft start source current
ISS_SC
EN > 2V
Soft start sink current
ISS_SK
EN < 0.3V, SS = 0.4V
1.3
2.0
2.7
μA
2
3
4
mA
UVLO release voltage
VUVLON
FB = COMP
3.3
3.7
4.1
V
UVLO lock voltage
VUVLOF
FB = COMP
3.02
3.42
3.82
V
-100
-50
100
nA
100
250
400
μA/V
-10
μA
40
μA
[UVLO circuit]
[Error amplifier]
Input bias current
IEA_IN
Error amplifier gain
GEA
Output sink current
IEA_OSK
FB = 1.75V
-40
-20
Output source current
IEA_OSC
FB = 0.75V
10
20
Continued on next page.
No.A2177-2/20
LV5069JA
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
[Over current limit circuit]
Reference current
ILIM
Over current detection
VLIM_OFS
48.4
55
-5
61.6
μA
5
mV
comparator offset voltage
RSNS pin input range
VRSNS
HICCUP timer start-up cycle
NCYC
HICCUP comparator threshold
VtHIC
VIN-0.23
VIN
15
V
cycle
1.23
1.29
1.35
V
1
2
3
μA
voltage
HICCUP timer charge current
IHIC
[PWM Comparator]
Maximum on-duty
DMAX
RT = 470kΩ
IPWRGD_L
PG = 5V
Power good “H” leakage current
IPWRGD_H
PG = 5V
Power good threshold voltage
Power good hysteresis
94
%
[Logic output]
Power good “L” sink current
4
5
6
mA
1
μA
VTPG
1.0
1.1
1.2
V
VPG_H
40
50
60
mV
[Output]
High side output on resistance
RONH
5
Ω
Low side output on resistance
RONL
9
Ω
High side output on current
IONH
300
mA
Low side output on current
IONL
150
mA
[The entire device]
Standby current
ICCS
EN < 0.3V
Light load mode consumption
ISLEEP
EN > 2V
current
Thermal shutdown
48
68
1
μA
88
μA
No switching
TSD
*Design guarantee
170
°C
*Design guarantee: Signifies target value in design. These parameters are not tested in an independent IC.
No.A2177-3/20
LV5069JA
Package Dimensions
unit : mm (typ)
3178B
Pd max -- Ta
Allowable power dissipation, Pd max -- W
1.2
5.2
0.5
6.4
9
4.4
16
1
8
0.65
0.15
0.22
0.8
0.74
0.4
0
--40
1.5max
(0.33)
Specified substrate: 114.3×76.1×1.6mm3
glass epoxy board
0.38
--20
0
20
40
60
80
100
0.1
(1.3)
Ambient temperature, Ta -- °C
SSOP16(225mil)
Mounting pad sketch
l1
(Unit: mm)
eE
Reference symbol
SSOP16(225mil)
eE
5.80
e
0.65
b3
0.32
l1
1.00
Caution: The mounting pad sketch is a reference value,
e
b3
which is not a guaranteed value.
No.A2177-4/20
LV5069JA
Evaluation Board Pattern diagram
Top
Bottom
2nd Layer
3rd Layer
No.A2177-5/20
LV5069JA
Pin Assignment
TOP VIEW
PG 1
16 REF
EN 2
15 FB
ILIM 3
VIN 4
RSNS 5
14 COMP
13 N.C.
LV5069JA
12 SS
HDRV 6
11 C-HICCUP
PDR 7
10 RT
GND 8
9 N.C.
SSOP16
Pin Function Description
Pin No
Pin Name
Description
Power good pin.
1
PG
Connect to open drain of MOS-FET in ICs inside.
Setting output voltage to "L", when FB voltage is 1.05V or less.
2
EN
ON/OFF Pin.
For current detection.
3
ILIM
Sink current is about 55μA. The current limiter comparator works when an external resistor is connected between this pin
and VIN, and if the voltage of this resistor is less than the voltage of RSNS then Pch MOS is turned off. This operation is
reset each PWM pulse.
Supply voltage pin.
4
VIN
It is observed by the UVLO function.
When its voltage becomes 3.7V or more, ICs startup in soft start.
5
RSNS
6
HDRV
Current detection resistor connection pin.
Resistor is connected between VIN and this pin, and the current flow to MOSFET is measured.
The external high-side MOSFET gate drive pin.
Pch MOSFET gate drive voltage.
7
PDR
8
GND
Ground Pin. Ground pin voltage is reference voltage
9
NC
NC Pin. The NC Pin becomes open in an IC.
10
RT
11
C-HICCUP
12
SS
13
NC
The bypass capacitor is necessarily connected between this pin and VIN.
Oscillation frequency setting pin.
Resistor is connected between this pin and GND.
It is capacitor connection pin for setting re-startup cycle in HICCUP mode.
If connect it to GND pin, then latch-off when over current.
Capacitor connection pin for soft start.
About 2.0μA current charges the soft start capacitor.
NC Pin. The NC Pin becomes open in an IC.
Error amplifier output pin.
The phase compensation network is connected between GND pin and COMP pin.
14
COMP
Thanks to current-mode control, comp pin voltage would tell you the output current amplitude. Comp pin is connected
internally to an Init.comparator which compares with 0.9V reference. If comp pin voltage is larger than 0.9V, IC operates in
“continuous mode”. If comp pin voltage is smaller than 0.9V,
IC operates in “discontinuous mode (low consumption mode)”.
Error amplifier reverse input pin.
15
FB
16
REF
ICs make its voltage keep 1.26V.
Output voltage is divided by external resistances and it across FB.
Reference voltage.
No.A2177-6/20
LV5069JA
Block Diagram
2.EN
Wake-up
Band-gap
enable
uvlo.comp
REF
16.REF
Pch Drive
7.PDR
TSD
4.VIN
Bias
1.26V
HICCUP.comp
11.C-HICCUP
5.RSNS
pwm comp
3.ILIM
15pulse
counter
14.COMP
PbyPcomp
15.FB
VIN
err.amp
12.SS
Q
S
CK RQ
enable
1.PG
Level-shift
PG.comp
6.HDRV
PDR
slope
clk
OSC
1.1V
9.13.NC
lnit.comp
10.RT
8.GND
No.A2177-7/20
LV5069JA
Pin Equivalent Circuit
Pin No.
1
Pin name
Equivalent circuit
PG
PG
1kΩ
GND
2
EN
VIN
4.8MΩ
EN
GND
3
ILIM
VIN
5kΩ
ILIM
1kΩ
GND
4
VIN
VIN
GND
5
RSNS
VIN
5kΩ
RSNS
5kΩ
GND
6
HDRV
VIN
310kΩ
HDRV
PDR
Continued on next page.
No.A2177-8/20
LV5069JA
Continued from preceding page.
Pin No.
7
Pin name
Equivalent circuit
PDR
VIN
1.3MΩ
1.6MΩ
10kΩ
PDR
15Ω
10Ω
GND
8
GND
VIN
GND
9
NC
10
RT
VIN
20kΩ
RT
GND
11
C-HICCUP
VIN
1kΩ
C-HICCUP
GND
12
SS
VIN
10kΩ
SS
1kΩ
GND
13
NC
Continued on next page.
No.A2177-9/20
LV5069JA
Continued from preceding page.
Pin No.
14
Pin name
COMP
Equivalent circuit
VIN
1kΩ
70kΩ
1kΩ
COMP
GND
15
FB
VIN
10kΩ
10kΩ
FB
5kΩ
GND
16
REF
VIN
10Ω
10Ω
REF
1kΩ
50kΩ
1.28MΩ
600kΩ
GND
No.A2177-10/20
LV5069JA
Detailed Description
Power-save Feature
This IC has Power-saving feature to enhance efficiency when the load is light.
By shutting down unnecessary circuits, operating current of the IC is minimized and high efficiency is realized.
VIN
R3
EN
VIN
VIN
C3
R2
C1
PG
VFB
FB
REF
LV5069JA
PDR
R1
ILIM
COMP
RSNS
SS
HDRV
Q1
R6
C-HICCUP
L1
VOUT
R4
RT
GND
C5
C6
C7
C8 R7
D1
VFB
C2
R5
Output Voltage Setting
Output voltage (VOUT) is configurable by the resistance R4 between VOUT and FB and the R5 between FB and GND.
VOUT is given by the following equation (1).
R4
R4
VOUT = (1 + R5 ) × VREF = (1 + R5 ) × 1.26 [V]
Soft Start
Soft start time (TSS) is configurable by the capacitor C7
between SS and GND.
The setting value of TSS is given by the equation (2).
VREF
1.26
TSS = C7 × I
= C7 ×
[ms]
2.0 × 10-6
SS
1000
900
Oscillatory frequency -- kHz
Switching Frequency Setting
The switching frequency (FOSC) is set by resistance R7
between RT and GND.
The relation of resistance R7 to switching frequency
is shown in a right graph.
(1)
800
700
600
500
400
300
100
200
300
400
500
600
Resistance R7 -- kΩ
(2)
Power Good
FB constantly monitors VOUT. When FB voltage is lower than 1.05V, PG is pulled down to Low. PG comparator has
hysteresis of 50mV. Because PG is open-drain output, you can connect other ICs with PG to realize wired-or with other
ICs.
No.A2177-11/20
LV5069JA
Hiccup Over-Current Protection
Over current limit (ICL) is set by current sensing resister R1 and resistance (R2) between VIN and ILIM.
The setting value of ICL is given by the equations (3) and (4).
VLIM = R2 × ILIM = R2 × 55 × 10-6 [V]
(3)
VLIM R2 × 55 × 10-6
ICL = R1 =
[A]
R1
(4)
When the voltage between VIN and RSNS (VRSNS) is higher than the voltage between VIN and ILIM for 15 consecutive
times, the protection deems it as over current and stops the IC.
Stop period (THIC) is defined by the external capacitor (C8) of the C-HICCUP.
The setting value of THIC is given by the equations (5).
C8 × VtHIC C8 × 1.29
THIC =
=
[s]
(5)
IHIC
2.0 × 10-6
When C-HICCUP is about 1.29V, the IC starts up. Regardless of a status; whether it starts up or SS charge, once over
current is detected, the IC stops again and when the protection does not detect over current status, the IC starts up again.
When the RSNS pin exceeds the overcurrent
limit value for 15 continuous times, the IC stops.
VIN
RSNS
VLIM
* Stop time is determined by the
external capacitor connected to
the C-HICCUP pin
1.29V
C-HICCUP
When the C-HICCUP pin exceeds 1.29V,
the IC re-starts by soft-start.
SS
•if the overcurrent is detected,
then IC stops again.
•if the overcurrent is detected,
then IC re-starts normally.
FB
FB=1.05V
PG
* FB = 1.1V ⇒ High
No.A2177-12/20
LV5069JA
Design Procedure
Inductor Selection
When conditions for input voltage, output voltage and ripple current are defined, the following equations (6) give
inductance value.
L=
VIN - VOUT
× TON
ΔIR
TON =
{((V
FOSC
VF
VIN
VOUT
(6)
1
V
)
÷
(V
IN
OUT
OUT + VF)) + 1} × FOSC
: Oscillatory Frequency
: Forward voltage of Schottky Barrier diode
: Input voltage
: Output voltage
• Inductor current: Peak value (IRP)
Current peak value (IRP) of the inductor is given by the equation (7).
IRP = IOUT +
VIN - VOUT
× TON
2L
(7)
Make sure that rating current value of the inductor is higher than a peak value of ripple current.
• Inductor current: ripple current (∆IR)
Ripple current (∆IR) is given by the equation (8).
VIN - VOUT
ΔIR =
× TON
L
(8)
When load current (IOUT) is less than 1/2 of the ripple current, inductor current flows discontinuously.
Output Capacitor Selection
Make sure to use a capacitor with low impedance for switching power supply because of large ripple current flows
through output capacitor.
This IC is a switching regulator which adopts current mode control method. Therefore, you can use capacitor such as
ceramic capacitor and OS capacitor in which equivalent series resistance (ESR) is exceedingly small.
Effective value is given by the equation (9) because the ripple current (AC) that flows through output capacitor is saw
tooth wave.
IC_OUT =
VOUT × (VIN - VOUT)
1
×
[Arms]
2√3
L × FOSC × VIN
(9)
Input Capacitor Selection
Ripple current flows through input capacitor which is higher than that of the output capacitors.
Therefore, caution is also required for allowable ripple current value.
The effective value of the ripple current flows through input capacitor is given by the equation (10).
IC_IN = √D (1 - D) × IOUT [Arms]
(10)
TON VOUT
D= T = V
IN
In (10), D signifies the ratio between ON/OFF period. When the value is 0.5, the ripple current is at a maximum. Make
sure that the input capacitor does not exceed the allowable ripple current value given by equation (10).
In the board wiring from input capacitor, VIN to GND, make sure that wiring is wide enough to keep impedance low
because of the current fluctuation. Make sure to connect input capacitor near output capacitor to lower voltage bound due
to regeneration current. When change of load current is excessive (IOUT: high ⇒ low), the power of output electric
capacitor is regenerated to input capacitor. If input capacitor is small, input voltage increases. Therefore, you need to
implement a large input capacitor. Regeneration power changes according to the change of output voltage, inductance of
a coil and load current.
No.A2177-13/20
LV5069JA
Selection of external phase compensation component
This IC adopts current mode control which allows use of ceramic capacitor with low ESR and solid polymer capacitor
such as OS capacitor for output capacitor with simple phase compensation. Therefore, you can design long-life and high
quality step-down power supply circuit easily.
Frequency Characteristics
The frequency characteristic of this IC is constituted with the following transfer functions.
(1) Output resistance breeder
: HR
(2) Voltage gain of error amplifier
: GVEA
Current gain
: GMEA
(3) Impedance of phase compensation external element
: ZC
(4) Current sense loop gain
: GCS
(5) Output smoothing impedance
: ZO
VIN
RSNS
1/GCS
OSC
Current
sence loop
GVER
GMER
FB
D
CLK
Q
C
R
VO
COMP
VREF
R2
CC
ZC
RC
HR
R1
CO
RL
ZO
Closed loop gain is obtained with the following formula (11).
G = HR • GMER • ZC • GCS • ZO
VREF
RL
1
=V
• GMER • RC + SC • GCS • 1 + SC • R
OUT
O
L
C
(11)
Frequency characteristics of the closed loop gain is given by pole fp1 consists of output capacitor CO and output load
resistance RL, zero point fz consists of external capacitor CC of the phase compensation and resistance RC, and pole fp2
consists of output impedance ZER of error amplifier and external capacitor of phase compensation CC as shown in
equation (9). fp1, fz, fp2 are obtained with the following equations (12) to (14).
fp1 =
fz =
1
2π • CO • RL
1
2π • CC • RC
fp2 =
1
2π • ZER • CC
(12)
(13)
(14)
No.A2177-14/20
LV5069JA
Calculation of external phase compensation constant
Generally, to stabilize switching regulator, the frequency where closed loop gain is 1 (zero-cross frequency fZC) should
1
1
be 10 of the switching frequency (or 5 ). Since the switching frequency of this IC is 330kHz, the zero-cross frequency
should be 33kHz. Based on the above condition, we obtain the following formula (15).
RL
VREF
1
•
G
•
R
+
•
G
•
MER
C
CS
1 + SCO • RL = 1
VOUT
SCC
As for zero-cross frequency, since the impedance element of phase compensation is RC >>
(16) is obtained.
RL
VREF
•
G
•
R
•
G
•
=1
MER
C
CS
VOUT
1 + 2π • fZC • CO • RL
(15)
1
SCC , the following equation
(16)
Phase compensation external resistance can be obtained with the following equation (16), the variation of the equation
(17). Since 2π • fZC • CO • RL >> 1 in the equation (17), we know that the external resistance is independent of load
resistance.
VOUT
1 + 2π • fZC • CO • RL
1
1
RC = V
•G
•G •
RL
REF
MER
CS
(17)
When output is 5V and load resistance is 5Ω (1A load), RSNS is 30mΩ, the resistances of phase compensation are as
follows.
0.125
GCS = R
= 4.167A/V, GMER = 250μA/V, fZC = 33kHz
SNS
5
1
1
1 + 2 × 3.14 × (33 × 103) × (30 × 10-6) × 5
RC = 1.26 ×
×
= 24.45…× 103
-6 ×
5
4.167
250 × 10
= 24.45 [kΩ]
If frequency of zero point fz and pole fp1 are in the same position, they cancel out each other. Therefore, only the pole
frequency remains for frequency characteristics of the closed loop gain.
In other words, gain decreases at -20dB/dec and phase only rotates by 90º and this allows characteristics where oscillation
never occurs.
fp1 = fz
1
1
•
2π • CO • RL 2π • CO • RC
CC =
RL • CO 5 × (30 × 10-6)
-9
RC • 24.45 × 103 = 6.13…× 10
= 6.13 [nF]
The above shows external compensation constant obtained through ideal equations. In reality, we need to define phase
constant through testing to verify constant IC operation at all temperature range, load range and input voltage range. In the
evaluation board for delivery, phase compensation constants are defined based on the above constants. The zero-cross
frequency required in the actual system board, in other word, transient response is adjusted by external compensation
resistance. Also, if the influence of noise is significant, use of external phase compensation capacitor with higher value is
recommended.
No.A2177-15/20
LV5069JA
Caution in pattern design
Pattern design of the board affects the characteristics of DC-DC converter. This IC switches high current at a high speed.
Therefore, if inductance element in a pattern wiring is high, it could be the cause of noise. Make sure that the pattern of the
main circuit is wide and short.
(1) Pattern design of the input capacitor
Connect a capacitor near the IC for noise reduction between VIN and the GND. The change of current is at the largest
in the pattern between an input capacitor and VIN as well as between GND and an input capacitor among all the main
circuits. Hence make sure that the pattern is as thick and short as possible.
(2) Pattern design of an inductor and the output capacitor
High electric current flows into the choke coil and the output capacitor. Therefore this pattern should also be as thick
and short as possible.
(3) Pattern design with current channel into consideration
Make sure that when High side MOSFET is ON (red arrow) and OFF (orange arrow), the two current channels runs
through the same channel and an area is minimized.
(4) Pattern design of the capacitor between VIN-PDR
Make sure that the pattern of the capacitor between VIN and PDR is as short as possible.
(5) Pattern design of the RSNS
RSNS pattern should also be as think and short as possible for noise reduction.
(6) Pattern design of the small signal GND
The GND of the small signal should be separated from the power GND.
(7) Pattern design of the FB-OUT line
Wire the line shown in red between FB and OUT to the output capacitor
as near as possible. When the influence of noise is significant,
use of feedback resistors R2 and R3 with lower value is recommended.
OUT
FB
Fig: FB-OUT Line
No.A2177-16/20
LV5069JA
Typical Performance Characteristics
Application curves at Ta = 25°C
100
Efficiency
100
VOUT = 1.26V
90
90
VIN=5V
8V
12V
50
40
70
40
20
20
10
0.1 2 3 5 7 1
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
Efficiency
VOUT = 3.3V
90
100
VIN=5V
80
8V
70
15V
60
50
40
Efficiency
VOUT = 5V
VIN=8V
50
40
20
Load current -- mA
15V
60
20
2 3 5 7100 2 3 5 71000 2 3 5 710000
12V
70
30
2 3 5 7 10
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
80
30
10
0.1 2 3 5 7 1
2 3 5 7 10
90
12V
15V
50
30
2 3 5 7 10
8V
12V
60
30
10
0.1 2 3 5 7 1
Efficiency -- %
15V
Efficiency -- %
70
60
V IN=5V
80
Efficiency -- %
Efficiency -- %
80
100
Efficiency
VOUT = 1.8V
10
0.1 2 3 5 7 1
2 3 5 7 10
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
Operation Waveforms (Circuit from Typical Application, Ta = 25°C, VIN = 15V, VOUT = 5V)
Light load mode
Output Voltage
IOUT = 10mA
IOUT = 10mA
VSW
5V/DIV
VOUT
20mV/DIV
IL
1A/DIV
IL
1A/DIV
10μs/DIV
10μs/DIV
No.A2177-17/20
LV5069JA
Discontinious current mode
Output Voltage
IOUT = 200mA
IOUT = 200mA
VSW
5V/DIV
VOUT
20mV/DIV
IL
1A/DIV
IL
1A/DIV
5μs/DIV
5μs/DIV
Continious current mode
Output Voltage
IOUT = 2A
IOUT = 2A
VSW
5V/DIV
VOUT
20mV/DIV
IL
1A/DIV
IL
1A/DIV
5μs/DIV
5μs/DIV
Load Transient response
Soft start and shutdown
IOUT = 0.5 ↔ 2.5A, Slew Rate = 100μs
IOUT = 2A
VEN
2V/DIV
VOUT
0.2V/DIV
VSS
5V/DIV
VOUT
5V/DIV
IOUT
2A/DIV
VPG
10V/DIV
500μs/DIV
2ms/DIV
Over current protection
OUT - GND short
VOUT
5V/DIV
VSS
5V/DIV
VHICCUP
1V/DIV
IOUT
5A/DIV
10ms/DIV
No.A2177-18/20
LV5069JA
Characterization curves at Ta = 25°C, VIN = 15V
Light load mode consumption current
Input current -- μA
78
68
58
48
--50
--25
0
25
50
75
100
125
Internal reference voltage
1.27
Internal reference voltage -- V
88
1.26
1.25
1.24
--50
150
--25
0
Temperature -- °C
Output on resistance
14
Reference current -- μA
Output on resistance -- mΩ
L ow
S id e
8
e
High Sid
6
4
2
--25
0
25
50
75
100
125
150
100
125
150
100
125
150
125
150
54
52
50
46
--50
150
--25
0
25
50
75
Temperature -- °C
Oscillatory frequency
UVLO
4.0
340
3.8
UVLO voltage -- V
Oscillatory frequency -- kHz
125
48
350
330
320
tage
UVLO release vol
3.6
vo
UVLO lock
3.4
ltage
3.2
310
--25
0
25
50
75
100
125
3.0
--50
150
--25
0
Temperature -- °C
HICCUP timer charge current -- μA
3.0
2.4
2.2
2.0
1.8
1.6
--25
0
25
50
75
Temperature -- °C
25
50
75
Temperature -- °C
Soft start source current
2.6
Soft start source current -- μA
100
56
Temperature -- °C
1.4
--50
75
58
10
300
--50
50
Reference current
60
12
0
--50
25
Temperature -- °C
100
125
150
HICCUP timer charge current
2.5
2.0
1.5
1.0
--50
--25
0
25
50
75
100
Temperature -- °C
No.A2177-19/20
LV5069JA
IC startup voltage
1.20
Power good threshold voltage -- V
2.0
1.8
EN voltage -- V
1.6
1.4
1.2
1.0
0.8
0.6
--50
--25
0
25
50
75
Temperature -- °C
100
125
150
Power good threshold voltage
1.15
1.10
1.05
1.00
--50
--25
0
25
50
75
100
125
150
Temperature -- °C
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PS No.A2177-20/20