AOK40N30 300V,40A N-Channel MOSFET General Description Product Summary The AOK40N30 is fabricated using an advanced high voltage MOSFET process that is designed to deliver high levels of performance and robustness in popular AC-DC applications.By providing low RDS(on), Ciss and Crss along with guaranteed avalanche capability this part can be adopted quickly into new and existing offline power supply designs. VDS ID (at VGS=10V) 350@150℃ 40A RDS(ON) (at VGS=10V) < 0.085Ω 100% UIS Tested 100% Rg Tested For Halogen Free add "L" suffix to part number: AOK40N30L Top View D TO-247 G S G S D AOK40N30 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage Continuous Drain Current VGS TC=25°C TC=100°C ID AOK40N30 300 Units V ±30 V 40 25 A Pulsed Drain Current C IDM Avalanche Current C IAR 8.5 A Repetitive avalanche energy C EAR 1083 mJ Single plused avalanche energy G Peak diode recovery dv/dt TC=25°C Power Dissipation B Derate above 25oC Junction and Storage Temperature Range Maximum lead temperature for soldering purpose, 1/8" from case for 5 seconds Thermal Characteristics Parameter Maximum Junction-to-Ambient A,D Maximum Case-to-sink A Maximum Junction-to-Case EAS dv/dt 2167 5 357 mJ V/ns W 2.9 -55 to 150 W/ oC °C 300 °C AOK40N30 40 0.5 0.35 Units °C/W °C/W °C/W Rev0: Jul 2012 PD TJ, TSTG TL Symbol RθJA RθCS RθJC www.aosmd.com 135 Page 1 of 5 AOK40N30 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter Conditions Min ID=250µA, VGS=0V, TJ=25°C 300 Typ Max Units STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage BVDSS /∆TJ Zero Gate Voltage Drain Current IDSS Zero Gate Voltage Drain Current ID=250µA, VGS=0V, TJ=150°C 350 V ID=250µA, VGS=0V 0.28 V/ oC VDS=300V, VGS=0V 1 VDS=240V, TJ=125°C 10 IGSS Gate-Body leakage current VDS=0V, VGS=±30V VGS(th) Gate Threshold Voltage VDS=5V, ID=250µA RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=20A gFS Forward Transconductance VDS=40V, ID=20A 32 VSD Diode Forward Voltage IS=1A,VGS=0V 0.7 IS ISMC 3.5 4.1 nΑ V 0.065 0.085 Ω 1 V Maximum Body-Diode Continuous Current 40 A Maximum Body-Diode Pulsed Current 135 A DYNAMIC PARAMETERS Ciss Input Capacitance Coss ±100 µA Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance 2.9 S 2170 2718 3270 pF VGS=0V, VDS=25V, f=1MHz 280 405 530 pF 18 31 45 pF VGS=0V, VDS=0V, f=1MHz 0.6 1.4 2.1 Ω 48 60 72 nC SWITCHING PARAMETERS Qg Total Gate Charge VGS=10V, VDS=240V, ID=40A Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time IF=40A,dI/dt=100A/µs,VDS=100V 220 275 330 Qrr Body Diode Reverse Recovery Charge IF=40A,dI/dt=100A/µs,VDS=100V 6.5 8.2 10 Body Diode Reverse Recovery Time VGS=10V, VDS=150V, ID=40A, RG=25Ω 13 nC 21 nC 54 ns 166 ns 152 ns 118 ns ns µC A. The value of R θJA is measured with the device in a still air environment with T A =25°C. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating. G. L=60mH, IAS=8.5A, VDD=150V, RG=25Ω, Starting TJ=25°C THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev0: Jul 2012 www.aosmd.com Page 2 of 5 AOK40N30 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 1000 100 VDS=40V 7V 10V 80 -55°C 6.5V 100 ID (A) 60 ID(A) 6V 125°C 10 40 25°C 5.5V 1 20 VGS=5V 0 0.1 0 5 10 15 20 25 30 2 4 6 8 VGS(Volts) Figure 2: Transfer Characteristics VDS (Volts) Fig 1: On-Region Characteristics 3 Normalized On-Resistance 0.15 0.13 RDS(ON) (Ω Ω) 10 0.11 VGS=10V 0.09 0.07 2.5 2 VGS=10V ID=20A 1.5 1 0.5 0.05 0 0 15 30 45 60 75 90 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage -100 1.2 -50 0 50 100 150 200 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature 1.0E+02 40 1.0E+00 IS (A) BVDSS (Normalized) 1.0E+01 1.1 1 125°C 1.0E-01 25°C 1.0E-02 0.9 1.0E-03 0.8 1.0E-04 -100 50 100 150 200 TJ (°C) Figure 5:Break Down vs. Junction Temparature Rev0: Jul 2012 -50 0 www.aosmd.com 0.0 0.2 0.4 0.6 0.8 1.0 VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) Page 3 of 5 AOK40N30 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 15 10000 Capacitance (pF) VGS (Volts) Ciss VDS=240V ID=40A 12 9 6 1000 Coss 100 Crss 3 0 10 Current rating ID(A) 0 15 30 45 60 75 Qg (nC) Figure 7: Gate-Charge Characteristics 90 0.1 50 1000 40 100 20 10 100 10µs RDS(ON) limited 100µs 1ms DC 10ms 1 100ms 0.1 0 10 VDS (Volts) Figure 8: Capacitance Characteristics 10 ID (Amps) 30 1 TJ(Max)=150°C TC=25°C 0.01 0 25 50 75 100 125 TCASE (°C) Figure 9: Current De-rating (Note B) 150 1 10 100 1000 VDS (Volts) Figure 10: Maximum Forward Biased Safe Operating Area for AOK40N30 (Note F) Zθ JC Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC RθJC=0.35°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0.1 PD 0.01 Ton T Single Pulse 0.001 1E-06 Rev0: Jul 2012 1E-05 0.0001 0.001 0.01 0.1 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance for AOK40N30 (Note F) www.aosmd.com 1 10 Page 4 of 5 AOK40N30 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC DUT - Vgs Ig Charge Res istive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs + VDC 90% Vdd - Rg 10% Vgs Vgs t d(on) tr t d(off) t on tf t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L EAR= 1/2 LI Vds 2 AR BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Tes t Circuit & Waveforms Qrr = - Idt Vds + DUT Vgs Vds - Isd Vgs Ig Rev0: Jul 2012 L Isd + VDC - IF trr dI/dt IRM Vdd Vdd Vds www.aosmd.com Page 5 of 5