AOSMD AOW11S60 600v 11a a mos tm power transistor Datasheet

AOW11S60/AOWF11S60
600V 11A α MOS TM Power Transistor
General Description
Product Summary
The AOW11S60 & AOWF11S60 have been fabricated
using the advanced αMOSTM high voltage process that is
designed to deliver high levels of performance and
robustness in switching applications.
By providing low RDS(on), Qg and EOSS along with
guaranteed avalanche capability these parts can be
adopted quickly into new and existing offline power supply
designs.
VDS @ Tj,max
700V
IDM
45A
RDS(ON),max
0.399Ω
Qg,typ
11nC
Eoss @ 400V
2.7µJ
100% UIS Tested
100% Rg Tested
TO-262
TO-262F
D
Top View
Bottom View
Top View
Bottom View
G
G
D
S
S
D
G
S
G
AOW11S60
D
S
D
600
Gate-Source Voltage
±30
Continuous Drain
Current
VGS
TC=100°C
S
AOWF11S60
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
AOW11S60
Symbol
Drain-Source Voltage
VDS
TC=25°C
G
AOWF11S60
11
ID
Units
V
V
11*
8
8*
A
Pulsed Drain Current C
IDM
Avalanche Current C
IAR
2
A
Repetitive avalanche energy C
EAR
60
mJ
Single pulsed avalanche energy G
TC=25°C
Power Dissipation B Derate above 25oC
MOSFET dv/dt ruggedness
Peak diode recovery dv/dt H
Junction and Storage Temperature Range
EAS
45
120
PD
W
1.4
0.22
W/ oC
100
20
-55 to 150
TJ, TSTG
TL
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A,D
Symbol
RθJA
V/ns
°C
300
°C
AOW11S60
AOWF11S60
Units
65
65
°C/W
0.5
0.7
-4.5
°C/W
°C/W
RθCS
Maximum Case-to-sink A
Maximum Junction-to-Case
RθJC
* Drain current limited by maximum junction temperature.
Rev 3: Jan 2012
28
dv/dt
Maximum lead temperature for soldering
purpose, 1/8" from case for 5 seconds J
mJ
178
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Page 1 of 6
AOW11S60/AOWF11S60
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
ID=250µA, VGS=0V, TJ=25°C
600
-
-
ID=250µA, VGS=0V, TJ=150°C
650
700
-
V
µA
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
VDS=600V, VGS=0V
-
-
1
VDS=480V, TJ=150°C
-
10
-
IGSS
Gate-Body leakage current
VDS=0V, VGS=±30V
-
-
±100
VGS(th)
Gate Threshold Voltage
VDS=5V,ID=250µA
2.8
3.5
4.1
nΑ
V
RDS(ON)
Static Drain-Source On-Resistance
VSD
Diode Forward Voltage
IS
ISM
VGS=10V, ID=3.8A, TJ=25°C
-
0.35
0.399
Ω
VGS=10V, ID=3.8A, TJ=150°C
-
0.98
1.11
Ω
IS=5.5A,VGS=0V, TJ=25°C
-
0.84
-
V
Maximum Body-Diode Continuous Current
-
-
11
A
Maximum Body-Diode Pulsed CurrentC
-
-
45
A
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Coss
Output Capacitance
Co(er)
Effective output capacitance, energy
related H
Crss
Effective output capacitance, time
related I
Reverse Transfer Capacitance
Rg
Gate resistance
Co(tr)
-
545
-
pF
-
37.3
-
pF
-
30.8
-
pF
-
93.6
-
pF
VGS=0V, VDS=100V, f=1MHz
-
1.42
-
pF
VGS=0V, VDS=0V, f=1MHz
-
16.5
-
Ω
VGS=0V, VDS=100V, f=1MHz
VGS=0V, VDS=0 to 480V, f=1MHz
SWITCHING PARAMETERS
Total Gate Charge
Qg
-
11
-
nC
-
2.8
-
nC
Gate Drain Charge
-
3.8
-
nC
Turn-On DelayTime
-
20
-
ns
-
20
-
ns
-
59
-
ns
-
20
-
ns
IF=5.5A,dI/dt=100A/µs,VDS=400V
Qgs
Gate Source Charge
Qgd
tD(on)
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
VGS=10V, VDS=480V, ID=5.5A
VGS=10V, VDS=400V, ID=5.5A,
RG=25Ω
Body Diode Reverse Recovery Time
Peak Reverse Recovery Current
-
250
-
ns
Irm
IF=5.5A,dI/dt=100A/µs,VDS=400V
-
21
-
Qrr
Body Diode Reverse Recovery Charge IF=5.5A,dI/dt=100A/µs,VDS=400V
-
3.3
-
A
µC
A. The value of R θJA is measured with the device in a still air environment with T A =25°C.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
G. L=60mH, IAS=2A, VDD=150V, Starting TJ=25°C
H. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS.
I. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS.
J. Wavesoldering only allowed at leads.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 3: Jan 2012
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Page 2 of 6
AOW11S60/AOWF11S60
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
16
24
10V
10V
20
7V
12
7V
6V
12
8
5.5V
4
5V
6V
ID (A)
ID (A)
16
8
5.5V
4
5V
VGS=4.5V
VGS=4.5V
0
0
0
5
10
15
0
20
5
10
15
20
VDS (Volts)
Figure 2: On-Region Characteristics@125°C
VDS (Volts)
Figure 1: On-Region Characteristics@25°C
100
1.2
-55°C
VDS=20V
0.9
10
RDS(ON) (Ω )
ID(A)
125°C
1
25°C
VGS=10V
0.6
0.3
0.1
0.0
0.01
2
4
6
8
0
10
10
15
20
25
ID (A)
Figure 4: On-Resistance vs. Drain Current and
Gate Voltage
VGS(Volts)
Figure 3: Transfer Characteristics
1.2
3
2.5
VGS=10V
ID=3.8A
BVDSS (Normalized)
Normalized On-Resistance
5
2
1.5
1
1.1
1
0.9
0.5
0
-100
-50
0
50
100
150
200
Temperature (°C)
Figure 5: On-Resistance vs. Junction Temperature
Rev 3: Jan 2012
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0.8
-100
-50
0
50
100
150
200
TJ (oC)
Figure 6: Break Down vs. Junction Temperature
Page 3 of 6
AOW11S60/AOWF11S60
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
1.0E+02
1.0E+01
125°C
12
VDS=480V
ID=5.5A
25°C
1.0E-01
9
VGS (Volts)
IS (A)
1.0E+00
1.0E-02
6
1.0E-03
3
1.0E-04
1.0E-05
0
0.0
0.2
0.4
0.6
0.8
1.0
VSD (Volts)
Figure 7: Body-Diode Characteristics (Note E)
0
8
12
16
Qg (nC)
Figure 8: Gate-Charge Characteristics
10000
6
5
Ciss
1000
Eoss(uJ)
Capacitance (pF)
4
100
Eoss
4
3
Coss
2
10
1
Crss
0
1
0
100
200
300
400
500
VDS (Volts)
Figure 9: Capacitance Characteristics
0
600
100
200
300
400
VDS (Volts)
Figure 10: Coss stored Energy
500
600
100
100
10µs
RDS(ON)
limited
10
100µs
1
DC
1ms
ID (Amps)
ID (Amps)
10
10µs
RDS(ON)
limited
100µs
1ms
1
10ms
0.1
10ms
0.1s
1s
DC
0.1
TJ(Max)=150°C
TC=25°C
TJ(Max)=150°C
TC=25°C
0.01
0.01
1
10
100
1000
VDS (Volts)
Figure 11: Maximum Forward Biased Safe
Operating Area for AOW11S60 (Note F)
Rev 3: Jan 2012
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0.1
1
10
VDS (Volts)
100
1000
Figure 12: Maximum Forward Biased Safe
Operating Area for AOWF11S60(Note F)
Page 4 of 6
AOW11S60/AOWF11S60
120
12
90
9
Current rating ID(A)
EAS(mJ)
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
30
0
6
3
0
25
50
75
100
125
TCASE (°C)
Figure 13: Avalanche energy
150
175
0
25
50
75
100
125
TCASE (°C)
Figure 14: Current De-rating (Note B)
150
Zθ JC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=0.7°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
PD
0.1
Ton
0.01
T
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance for AOW11S60 (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=4.5°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Ton
T
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance for AOWF11S60 (Note F)
Rev 3: Jan 2012
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Page 5 of 6
AOW11S60/AOWF11S60
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
DUT
-
Vgs
Ig
Charge
Res istive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
+
VDC
90%
Vdd
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LI
Vds
2
AR
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Tes t Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vgs
Vds -
Isd
Vgs
Ig
Rev 3: Jan 2012
L
Isd
+
VDC
-
IF
trr
dI/dt
IRM
Vdd
Vdd
Vds
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Page 6 of 6
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