APW8824 1.5MHz, 1A Synchronous Buck Regulator General Description Features • 1A Output Current The APW8824 is a high efficiency monolithic synchro- • Wide 2.7V~5.5V Input Voltage • Fixed 1.5MHz Switching Frequency nous buck regulator. APW8824 operates with a constant 1.5MHz switching frequency and using the inductor cur- • Low Dropout Operating at 100% duty cycle • Low 25µA Quiescent Current • Integrate Synchronous Rectifier • 0.6V Low Reference Voltage • <0.5µA Input Current during Shutdown • Current-Mode Operation with Internal Compensation rent as a controlled quantity in the current mode architecture. The 2.7V to 5.5V input voltage range makes the APW8824 ideally suited for single Li-Ion battery powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable electrical devices. The internally fixed 1.5MHz operating frequency allows the use of small surface mount inductors and capacitors. The synchronous switches included inside - Stable with Ceramic Output Capacitors increase the efficiency and eliminate the need for an external Schottky diode. - Fast Line Transient Response The APW8824 is available in TSOT-23-6A package • Over-Voltage Protection • Under Voltage Protection • Over-Temperature Protection with Hysteresis • Available in a TSOT-23-6A Package • Halogen and Lead Free Available Applications (RoHS Compliant) • HD STB • BT Mouse • PND Instrument • Portable Instrument Simplified Application Circuit L1 2.2 µH I IN VIN 4 LX VIN VOUT 3 2.7~5.5V C1 10 µF (MLCC) 1 EN R1 APW8824 R3 100k 5 PG FB 6 C3 ( option) 0.6V~VIN C2 0~1A 10 µF (MLCC) GND 2 R2 R1 < 1.5MΩ is recommended R2 < 200 KΩ is recommended ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 1 www.anpec.com.tw APW8824 Ordering and Marking Information Package Code CT : TSOT-23-6A Operating Ambient Temperature Range I : -40 to 85oC APW8824 Assembly Material Handling Code Handling Code TR : Tape & Reel Temperature Range Package Code APW8824 CT: W24X Assembly Material G : Halogen and Lead Free Device X - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Pin Configuration APW8824 EN 1 6 FB GND 2 5 PG LX 3 4 VIN TSOT-23-6A Top View Absolute Maximum Ratings Symbol VIN (Note 1) Parameter Input Bias Supply Voltage (VIN to GND) EN, FB, LX and PG to GND Voltage VLX LX Voltage (LX to GND) TSDR Unit -0.3 ~ 7 V -0.3 ~ VIN+0.3 V <30ns pulse width -3 ~ 8 >30ns pulse width -0.3 ~ VIN +0.3 Maximum Junction Temperature TSTG Rating Storage Temperature Maximum Lead Soldering Temperature (10 Seconds) V 150 o -65 ~ 150 o 260 o C C C Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 2 www.anpec.com.tw APW8824 Thermal Characteristics Symbol θJA Parameter Typical Value Junction-to-Ambient Resistance in free air (Note 2) Unit o 220 C/W Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions (Note 3) Symbol VIN VOUT IOUT Parameter Range Unit Input Bias Supply Voltage (VIN to GND) 2.7 ~ 5.5 V Converter Output Voltage 0.6 ~ VIN V 0~1 A 1.0 ~ 10 µH Converter Output Current L1 Converter Output Inductor CIN Converter Input Capacitor 10 ~ 100 µF Converter Output Capacitor 10 ~ 100 µF Ambient Temperature -40 ~ 85 o -40 ~ 125 o COUT TA TJ Junction Temperature C C Note 3: Refer to the application circuit for further information Electrical Characteristics Unless otherwise specified, these specifications apply over VIN=3.6V and TA= -40 ~ 85 oC. Typical values are at TA=25oC. Symbol Parameter Test Conditions APW8824 Unit Min Typ Max 2.7 - 5.5 V SUPPLY VOLTAGE AND CURRENT VIN Input Voltage Range IDD Quiescent Current VFB = 0.66V - 25 40 µA ISD Shutdown Input Current EN = GND - - 0.5 µA UVLO Threshold 2.1 2.35 2.6 V UVLO Hysteresis - 0.1 - V 0.594 0.6 0.606 V 0.591 - 0.609 V -1.5 - +1.5 % -50 - 50 nA POWER-ON-RESET (POR) and LOCKOUT VOLTAGE THRESHOLDS REFERENCE VOLTAGE VREF Reference Voltage o o TA = -40~85 C, TJ = -40~125 C Output Voltage Accuracy IFB TA = 25 oC 0A < IOUT < 1A, VIN > 3.6V, TJ =25 oC FB Input Current INTERNAL POWER MOSFETS FSW Switching Frequency VFB = 0.6V 1.2 1.5 1.8 MHz RP-FET Main Switch ON Resistance ILX=200mA - 0.28 0.35 Ω RN-FET Synchronous Switch ON Resistance ILX=200mA - 0.25 0.32 Ω N-FET Switch Leakage Current VRUN = GND, VLX = 5V -0.1 - 0.1 µA P-FET Switch Leakage Current VRUN = GND, VLX = 0V -0.1 - 0.1 µA Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 3 www.anpec.com.tw APW8824 Electrical Characteristics Unless otherwise specified, these specifications apply over VIN=3.6V and TA= -40 ~ 85 oC. Typical values are at TA=25oC. Symbol Parameter Test Conditions APW8824 Min Typ Max Unit INTERNAL POWER MOSFETS Dead-time (Note 4) - 5 - ns 0 - 100 % 2 2.5 3 A - 1 - A 115 120 125 %VREF - 20 - µs 57 66 75 %VREF - 15 - µs PG in from Lower (PG Goes High) 87 90 93 %VREF PG Low Hysteresis (PG Goes Low) - 3 - %VREF PG in from Higher (PG Goes High) 115 120 125 %VREF PG High Hysteresis (PG Goes Low) Duty Cycle PROTECTION ILIM Maximum Inductor Current Limit IP-FET, 2.7V≦VIN≦6V N-FET Negative Current Limit VOVP Over Voltage Protection Threshold OVP Debounce Time VUVP Under Voltage Protection Threshold UVP Debounce Time PG Threshold TOTP - 3 - %VREF PG High to Low debounce time (VOUT under shoot) - 60 - µs PG High to Low debounce time (VOUT over shoot) - 80 - µs TJ Rising - 150 - °C Soft-start Duration (Note 4) - 0.7 - ms EN Input High Threshold VIN = 2.7V~5.5V - - 1.5 V EN Input Low Threshold VIN = 2.7V~5.5V 0.4 - - V EN Leakage Current VEN = 5V, VIN = 5V -1 - 1 µA - 200 - Ω Over-Temperature Protection START-UP AND SHUTDOWN TSS Power Good Pull Low Resistance Note 4: Guaranteed by design, not production tested. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 4 www.anpec.com.tw APW8824 Typical Operating Characteristics Output Voltage vs. Temperature Switching Frequency vs Temperature 1.525 1.6 Switching Frequency(MHz) Output Voltage(V) Vout=1.5V 1.515 1.505 1.495 1.485 1.475 -40 -20 0 20 40 60 1.55 1.5 1.45 1.4 1.35 1.3 80 100 120 140 160 -40 -20 0 o 60 80 100 120 140 160 Temperature(oC) Efficiency vs. Load Current FSW=1.5MHz, VOUT=1.8V Efficiency vs. Load Current FSW=1.5MHz, VOUT=1.2V 95 VIN=3.3V VIN=4.2V VIN=5V 90 VIN=3.3V VIN=4.2V VIN=5V 90 85 Efficiency (%) 85 Efficiency (%) 40 Temperature( C) 95 80 75 80 75 70 70 65 65 60 20 0 0.2 0.4 0.6 0.8 60 1 0 Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 0.2 0.4 0.6 0.8 1 Output Current (A) Output Current (A) 5 www.anpec.com.tw APW8824 Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Enable Shutdown VEN VEN 1 1 VOUT VOUT 2 2 VPG 3 3 VPG IL IL 4 4 CH1:VEN , 5V/Div CH2:VOUT , 1V/Div CH3:VPG , 5V/Div CH3:IL , 1A/Div TIME: 1ms/Div CH1: VEN, 5V/Div CH2: VOUT, 1V/Div CH3: VPG 5V/Div CH4: IL, 1A/Div TIME: 20µs/Div Load Transient Output Ripple V OUT 1 VOUT 1 VLX VLX 2 2 3 IL 3 CH1: VOUT, 100mV/Div,AC CH2: VLX ,5V/Div CH3: IOUT ,1A/Div TIME: 100µs/Div CH1: VOUT, 20mV/Div,AC CH2: VLX , 5V/Div CH3: IL , 1A/Div TIME: 20µs/Div Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 IOUT 6 www.anpec.com.tw APW8824 Operating Waveforms (Cont.) Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Short Circuit Protection VOUT 1 VLX 2 3 IL CH1: VOUT, 1V/Div CH2: VLX, 5V/Div CH3: IL, 2A/Div TIME: 20µs/Div Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 7 www.anpec.com.tw APW8824 Pin Description PIN Function NO. NAME 1 EN 2 GND 3 LX Switch Node Connected to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFETs switches. 4 VIN Device and Converter Supply Pin. Must be closely decoupled to GND with a 10µF or greater ceramic capacitor. 5 PG Power Good Output. This pin is open-drain logic output that is pulled to ground when the output voltage is not within 10%of regulation point. 6 FB Feedback Input Pin. The buck regulator senses feedback voltage via FB and regulates the FB voltage at 0.6V. Connecting FB with a resistor-divider from the output sets the output voltage of the buck converter. Enable Control Input. Forcing this pin above 1.5V enables the device. Forcing this pin below 0.4V shuts it down. In shutdown, all functions are disabled to decrease the supply current below 0.5µA. Do not leave EN pin floating. Power and Signal Ground. Block Diagram EN 120%VREF FB OverTemperature Protection Shutdown Control Current Sense Amplifier VIN FB 66%VREF OVP Q1 Logic Control 120%VREF LX UVP Gate Driver Q2 FB Slope Compensatio n FB ZeroCrossing Comparator ∑ 90%VREF PG Current Limit GND Q3 Oscillator ICMP Error Amplifier COMP FB GM Softstart Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 8 VREF 0.6V www.anpec.com.tw APW8824 Typical Application Circuits L1 2.2µH I IN VIN 4 LX VIN VOUT 3 2.7~5.5V C1 10 µF (MLCC) 1 R3 100k EN R1 APW8824 5 PG FB 6 C3 ( option) 0.6V~VIN C2 0~1A 10µF (MLCC) GND 2 R2 R1 < 1.5MΩ is recommended R2 < 200KΩ is recommended C1 closed to IC. Less tan 2 mm is recommended Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 9 www.anpec.com.tw APW8824 Function Description Main Control Loop Pulse Frequency Modulation Mode (PFM) The APW8824 is a constant frequency, synchronous rectifier and current-mode switching regulator. In normal The APW8824 is a fixed frequency PWM peak current mode control step-down converter. At light loads, the APW8824 will automatically enter in pulse frequency operation, the internal P-channel power MOSFET is turned on each cycle. The peak inductor current which ICMP turn mode operation to reduce the dominant switching losses. In PFM operation, the inductor current may reach zero or off the P-FET is controlled by the voltage on the COMP node, which is the output of the error amplifier (EAMP). An reverse on each pulse. A zero current comparator turn off the N-FET, forcing DCM operation at light load. These external resistive divider connected between VOUT and ground allows the EAMP to receive an output feedback controls get very low quiescent current, help to maintain high efficiency over the complete load range. voltage VFB at FB pin. When the load current increases, it causes a slightly decrease in VFB relative to the 0.6V reference, which in turn causes the COMP voltage to increase until the average inductor current matches the Slope Compensation and Inductor Peak Current new load current. Slope compensation provides stability in constant frequency architectures by preventing sub-harmonic oscillations at high duty cycles. It is accomplished internally by Under-Voltage Lockout adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, this results An under-voltage lockout function prevents the device from operating if the input voltage on VIN is lower than approxi- in a reduction of maximum inductor peak current for duty cycles > 40%. However, the APW8824 uses a special mately 2.35V. The device automatically enters the shutdown mode if the voltage on VIN drops below approxi- scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain mately 2.35V. This under-voltage lockout function is implemented in order to prevent the malfunctioning of the converter. unaffected throughout all duty cycles. Soft-start Dropout Operation The APW8824 has a built-in soft-start to control the output As the input supply voltage decreases to a value approach- voltage rise during start-up. During soft-start, an internal ramp voltage, connected to the one of the positive inputs ing the output voltage, the duty cycle increases toward the maximum on time. Further reduction of the supply volt- of the error amplifier, raises up to replace the reference voltage (0.6V typical) until the ramp voltage reaches the age forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output reference voltage. Then the voltage on FB regulated at reference voltage. voltage will be determined by the input voltage minus the voltage drop across the P-FET and the inductor. Enable/Shutdown Driving EN to ground places the APW8824 in shutdown An important detail to remember is that on resistance of P-FET switch will increase at low input supply voltage. mode. When in shutdown, the internal power MOSFETs turn off, all internal circuitry shuts down and the quiescent Therefore, the user should calculate the power dissipation when the APW8824 is used at 100% duty cycle with supply current reduces to 0.5µA maximum. low input voltage. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 10 www.anpec.com.tw APW8824 Function Description Over-Temperature Protection (OTP) The over-temperature circuit limits the junction temperature of the APW8824. When the junction temperature exceeds 150oC, a thermal sensor turns off the both power MOSFETs. It is a latch protection. Over Voltage Protection The over-voltage function monitors the output voltage by FB pin. When the FB voltage increases over 120% of the reference voltage due to the high-side MOSFET failure or for other reasons, the over-voltage protection comparator will turn on low side N-MOSFET and shutdown the converter output. Output Under Voltage Protection In the operational process, if a short circuit occurs, the output voltage will drop quickly. Before the current-limit circuit responds, the output voltage will fall out of the required regulation range. The under-voltage continually monitors the FB voltage after soft-start is completed. If a load step is strong enough to pull the output voltage lower than the under-voltage threshold. The under-voltage threshold is 66% of the nominal output voltage. The under-voltage comparator has a built-in 15µs noise filter to prevent the chips from wrong UVP shutdown being caused by noise. APW8824 will be latched after under-voltage protection. Power Good PG is actively held low in shutdown and soft-start status. In the soft-start process, the PG is an open-drain. When the soft-start is finished, the PG is released. In normal operation, the PG window is from 90% to 120% of the converter reference voltage. When the output voltage has to stay within this window, PG signal will become high. When the output voltage outruns 90% or 120% of the target voltage, PG signal will be pulled low immediately. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 11 www.anpec.com.tw APW8824 Application Information Input Capacitor Selection Because buck converters have a pulsating input current, a low ESR input capacitor is required. This results in the The output voltage is set by a resistive divider. The external resistive divider is connected to the output, allowing best input voltage filtering, minimizing the interference with other circuits caused by high input voltage spikes. remote voltage sensing as shown in “Typical Application Circuits”. A suggestion of maximum value of R2 is 200kΩ Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For to keep the minimum current that provides enough noise rejection ability through the resistor divider. The output good input voltage filtering, usually a 10µF input capacitor is sufficient. It can be increased without any limit for better voltage can be calculated as below: Output Voltage Setting input-voltage filtering. Ceramic capacitors show better performance because of the low ESR value, and they are R1 R1 VOUT = VREF ⋅ 1 + = 0.6 ⋅ 1 + R2 R2 less sensitive against voltage transients and spikes compared to tantalum capacitors. Place the input capacitor as close as possible to the input and GND pin of the device for better performance. VOUT R1≤1.5MΩ Inductor Selection For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at FB R2 ≤ 200KΩ APW8824 GND high-switching frequencies the core material has a higher impact on efficiency. When using small chip inductors, the efficiency is reduced mainly due to higher inductor Output Capacitor Selection core losses. This needs to be considered when selecting the appropriate inductor. The inductor value deter- The current-mode control scheme of the APW8824 al- mines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current and the lower lows the use of tiny ceramic capacitors. The higher capacitor value provides the good load transients response. the conduction losses of the converter. Conversely, larger inductor values cause a slower load transient response. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. If required, A reasonable starting point for setting ripple current, ∆IL, is 40% of maximum output current. The recommended tantalum capacitors may be used as well. The output ripple is the sum of the voltages across the ESR and the ideal inductor value can be calculated as below: output capacitor. V VOUT 1 − OUT VIN L≥ FSW ⋅ ∆IL ∆VOUT IL(MAX) = IOUT(MAX) + 1/2 x ∆IL 1 ⋅ ESR + 8 ⋅ FSW ⋅ COUT When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage char- To avoid saturation of the inductor, the inductor should be rated at least for the maximum output current of the converter plus the inductor ripple current. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 V VOUT ⋅ 1 − OUT VIN ≅ FSW ⋅ L acteristics of all the ceramics for a given value and size. 12 www.anpec.com.tw APW8824 Application Information (Cont.) PD ≅ IOUT 2 × (RP - FET × D + RN - FET × (1 - D)) VIN IIN The temperature rise is given by: IP-FET IL CIN IOUT VOUT TR = (PD)(θJA) P-FET LX Where PD is the power dissipated by the regulator, D is duty cycle of main switch ESR N-FET COUT D = VOUT/VIN The θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: IL ILIM IPEAK TJ = TA + TR ∆IL Where TA is the ambient temperature. IOUT The maximum power dissipation on the device can be shown as follow figure: IP-FET Maximum Power Disspation(W) 0.8 Thermal Considerations In most applications the APW8824 does not dissipate much heat due to its high efficiency. But, in applications where the APW8824 is running at high ambient tempera- 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 ture with low supply voltage and high duty cycles, the heat dissipated may exceed the maximum junction tempera- -50 -25 0 25 50 75 100 125 150 Junction Temperature(oC) ture of the part. If the junction temperature reaches approximately 150oC, both power switches will be turned off and the LX node will become high impedance. To avoid the APW8824 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The power dissipated by the part is approximated: Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 13 www.anpec.com.tw APW8824 Application Information (Cont.) Layout Considerations For all switching power supplies, the layout is an important step in the design; especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. 1. The input capacitor should be placed close to the VIN and GND. Connecting the capacitor and VIN/GND with short and wide trace without any via holes for good input voltage filtering. The distance between VIN/GND to capacitor less than 2mm respectively is recommended. 2. To minimize copper trace connections that can inject noise into the system, the inductor should be placed as close as possible to the LX pin to minimize the noise coupling into other circuits. 3. The output capacitor should be place closed to VOUT and GND. 4. Since the feedback pin and network is a high impedance circuit the feedback network should be routed away from the inductor. The feedback pin and feedback network should be shielded with a ground plane or trace to minimize noise coupling into this circuit. 5. A star ground connection or ground plane minimizes ground shifts and noise is recommended. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 14 www.anpec.com.tw APW8824 Package Information TSOT-23-6A D e E E1 SEE VIEW A c b 0.25 A GAUGE PLANE SEATING PLANE A1 A2 e1 L VIEW A S Y M B O L A TSOT-23-6A MILLIMETERS MIN. 0.70 INCHES MAX. MIN. MAX. 1.00 0.028 0.039 A1 0.01 0.10 0.000 0.004 A2 0.70 0.90 0.028 0.035 b 0.30 0.50 0.012 0.020 c 0.08 0.20 0.003 0.008 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 0.071 e 0.95 BSC e1 1.90 BSC L 0 0.037 BSC 0.075 BSC 0.30 0.60 0.012 0o 8o 0o 0.024 8o Note : 1. Followed from JEDEC TO-178 AB. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 15 www.anpec.com.tw APW8824 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application TSOT-23-6A A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 4.0±0.10 4.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 3.20±0.20 3.10±0.20 1.20±0.20 (mm) Devices Per Unit Package Type Unit Quantity TSOT-23-6A Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 16 www.anpec.com.tw APW8824 Taping Direction Information TSOT-23-6A USER DIRECTION OF FEED AAAX AAAX AAAX AAAX AAAX AAAX AAAX Classification Profile Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 17 www.anpec.com.tw APW8824 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 18 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APW8824 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.2 - May., 2013 19 www.anpec.com.tw