Fairchild FSA801UMX Usb2.0 high-speed (480 mbps), uart, and audio switch with negative signal capability Datasheet

FSA801 — USB2.0 High-Speed (480 Mbps), UART, and
Audio Switch with Negative Signal Capability
Features
Description

The FSA801 is a 3:1 USB accessory switch that enables
USB data, stereo and mono audio, microphone, and
UART data to share a common connector port. Two
ports are designed for high-speed USB 2.0 signaling,
while also capable of full-speed USB and UART
communication. The architecture allows audio signals to
swing below ground so a common USB and headphone
jack can be used for personal media players and
portable peripheral devices.
3:1 Switch Handles:

Audio Headsets
UART
Up to Two High- and Low-Speed USB Data
USB Charger Detection and Indication, Compliant
with USB Battery Charging Specification, Rev 1.1
-
Supports Data Contact Detect (DCD)


Negative-Swing-Capable Audio Channel


Simple Switch Control Using Three Select Pins
FSA801 detects wall chargers through a dedicated pin
that provides the baseband with charger detection. The
charger function is compliant with USB Battery Charging
Specification, Rev 1.1, implementing Data Contact Detect
(DCD) before detecting a charger. The FSA801 indicates
if a Dedicated Charging Port (DCP) or a Charging
Downstream Port (CDP) has been connected.
Built-in Termination Resistors for Audio Pop
Reduction
28 V Over-Voltage Tolerance on VBUS
The FSA801 meets both USB Rev. 2.0 and micro-USB
specifications.
Applications

Cell Phones, MP3 Players, PDAs
Ordering Information
Part Number
Operating
Temperature Range
Top Mark
FSA801UMX
-40 to +85°C
KL
Package
16-Lead Quad, 1.8 x 2.6 mm Ultrathin Molded
Leadless Package (UMLP)
Figure 1. Typical Application
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev.1.0.3
www.fairchildsemi.com
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
November 2012
Additionally, if all switches are open and VBUS is present,
the FSA801 does not close any switch path until the
DCD circuitry detects contact with the D+/D- pins and
the charger detection is complete. If the D+/D- pins
never contact, but VBUS is present, the USB switches
cannot be closed when configuring from SEL[2:0]=’000’
to SEL[2:0]=’001’ or SEL[2:0]=’010’. To override this
blocking, first switch to a non-USB mode (one of the
audio modes, SEL[2:0]=’011’,’100’ or ‘101’), and then to
the desired USB mode.
The FSA801 USB2.0 accessory switch is designed to
consolidate wired accessories for portable devices, such
as cellular telephones and portable audio players. The
benefits of consolidation include reduced space
requirements from a reduction of connectors and their
size. The micro-USB connector, for example, reduces
connector height and depth, allowing for slimmer overall
designs. Using the USB industry standard and a common
connector type for accessories such as chargers and
headsets, greatly reduces the waste associated with new
phone purchases by allowing re-use of the accessories.
If the USB physical layer device that the FSA801 is
connected to also performs DCD, it should not start until
after the FSA801 has time to finish its detection function
(since the delay between VBUS connection and D+/Dconnection is not defined, this detection function time
cannot be defined either).
Using just five wires for all connection types
considerably reduces the cost of wired accessories and
simplifies their construction. The FSA801 facilitates
adopting this methodology because it is designed to
redirect the DP/DM pins from the USB connector to one
of three ports at the baseband’s discretion. Additional
flexibility is provided by the ability of the microphone line
to be switched from either the DP_CON or VBUS pin.
Glitches on VBUS that occur when VBUS is not driven
(positive voltage spikes and on-off situations at the
beginning of a cable attach) are automatically filtered by
the DCD state machine timing.
The VBUS pin is protected up to 28 V without damage
to the FSA801.
To manually reset the FSA801 to search for a charger
again, switch to SEL[2:0]=‘111’ for a minimum of 30 µs.
After this state machine is reset, the next time that
SEL[2:0]=‘000’ (all switches open) for a minimum of
30 µs, the FSA801 begins the charger detection
sequence.
USB Charger Detection / Data Contact Detect
The FSA801 senses the presence of USB chargers per
the USB Battery Charging Specification, Version 1.1.
This specification uses VBUS status and measurements
on DP_CON / DM_CON pins to determine that a
charging device might be attached. The ‘CD_N’ pin goes
to a low state, indicating the presence of a charger. The
charger-detect algorithm executes when VBUS is valid.
The charger-detection algorithm detects both Dedicated
Charging Ports (DCP) and Charging Downstream Ports
(CDP).
PLEASE NOTE: The FSA801 is guaranteed to operate
down to 2.4 V. If the FSA801 VCC is connected directly
to a battery and falls below 2.4 V, the FSA801 may not
correctly detect a charger. If a charger is applied, the
VCC should start to rise above 2.4 V. In this situation, the
FSA801 does not automatically check for a charger
again, so the FSA801 should be placed in
SEL[2:0]=’111’ for 30 µs (min.), then SEL[2:0]=’000’ for
30 µs (min.) to perform the charger detection again.
In this implementation, per the USB Battery Charging
Specification, Version 1.1, the FSA801 implements Data
Contact Detect (DCD) to insure the D+ and D- pins have
made contact before the dedicated charger detection is
performed.
Applications with Multiple USB Controllers
When operating with two USB controllers, it is
recommended to configure the switches to OPEN before
switching to the other (second) USB interface. The
OPEN setting duration should be long enough for the
accessory to go to a SE0 state, so when the switch is
set to the other (second) USB port, the new controller
re-enumerates.
Since the BC1.1 charger detection algorithm applies and
detects signals on the D+ and D- lines, any additional
loading effects from portable device host side of the
switch would cause the results to be invalid. To prevent
interference due to any loading, the FSA801 only
performs charger detection when all switches are open.
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
2
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Functional Description
The FSA801 has three select pins to control the
switching operations, SEL[0], SEL[1], and SEL[2]
described in Table 1.
Table 1.
Selection Truth Table
SEL[2]
SEL[1]
SEL[0]
Switch Action
0
0
0
OPEN
Description
Open all switch paths (device in low-power mode)
(1)
0
0
1
USB1, UART
Closes USB1 path to D+/D-, default condition
- DP_CON connected to DP_HOST1
- DM_CON connected to DM_HOST1
0
1
0
USB2, UART
Closes USB2 path to D+/D- DP_CON connected to DP_HOST2
- DM_CON connected to DM_HOST2
0
1
1
0
Closes audio path to D+/D- only, no microphone
switched
- DP_CON connected to R_HOST
- DM_CON connected to L_HOST
1
AUDIO
0
MONO AUDIO with MIC
(2)
on D+
1
0
1
STEREO AUDIO with MIC
(2)
on VBUS
1
1
0
Undefined
1
1
1
Charger Detection Reset
Closes audio path to DM_CON and microphone on
DP_CON pin. This is a mono-audio application.
- DP_CON connected to MIC
- DM_CON connected to L_HOST
Closes audio path to D+/D- and microphone on VBUS
pin. This mode is typically used for stereo headset
with microphone.
- DP_CON connected to R_HOST
- DM_CON connected to L_HOST
- VBUS connected to MIC
Reserved; do not use.
Charger Detection Reset. Selecting this mode for
greater than 30 µs resets the FSA801 to check for a
charger, the next time a SEL[2:0] state of ‘000’ is
applied for more than 30 µs.
Notes:
1. The SELECT pins are CMOS inputs and should not be left in a floating condition. Some applications require the
UART path be in the CLOSED position on power-up for initial programming of the device under test. If that
condition is desired, the three SELECT pins should be pulled to the correct levels with external resistors that
should exceed 100 KΩ to reduce the static power consumption. In other applications, adding weak pull-down
resistors to GND defaults the device to all paths open (low-power mode).
2. When the audio switch is in the OPEN position, the R and L are terminated to GND with internal termination
resistors to discharge any stray capacitance that could cause audio pop.
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
3
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Mode Descriptions
Figure 2. 16-Pin, UMLP Pin Assignments (Top-Through View)
Pin Descriptions
Name
Pin #
Description
USB, UART Interface
DP_HOST1
1
D+ signal, dedicated USB port to be connected to the resident USB or UART transceiver on
the phone.
DM_HOST1
2
D- signal, dedicated USB port to be connected to the resident USB or UART transceiver on
the phone.
3
D+ signal, dedicated USB port to be connected to the resident USB or UART transceiver on
the phone.
4
D- signal, dedicated USB port to be connected to the resident USB or UART transceiver on
the phone.
R_HOST
5
Right audio channel from phone audio codec.
L_HOST
6
Left audio channel from phone audio codec.
MIC_HOST
7
Connected to the phone audio codec MIC input pin.
16
Input voltage supply pin to be connected to the phone battery output.
DP_HOST2
DM_HOST2
Audio Interface
Power Interface
VCC
Connector Interface
VBUS
12
Input voltage supply pin to be connected to the VBUS pin of the USB connector.
GND
8
Ground.
11
Connected to the USB connector D+ pin; depending on the FSA801 signaling mode, this pin
can share DP_HOST1, DP_HOST2 or R_HOST signals.
10
Connected to the USB connector D- pin; depending on the FSA801 signaling mode, this pin
can share DM_HOST1, DM_HOST2 or L_HOST signals.
DP_CON
DM_CON
Charger Detection
CD_N
9
Active-LOW, open-drain output pin; requires pull-up resistor to baseband I/O voltage supply
Switch Control
SEL[2:0]
13-15
Switch selection pins; refer to Table 1 for truth table.
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
4
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Pin Configuration
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
VCC
Supply Voltage from Battery / Baseband
-0.5
6.0
V
VBUS
Voltage from Mini/Micro–USB Connector
-0.5
28.0
V
VSW
Switch I/O Voltage
USB/UART Path Active
Stereo/Mono Audio Path Active
All Other Channels
IIK
ISW
ISWPEAK
TSTG
Input Clamp Diode Current
-0.5
VBUS +0.5
VCC-8.5
VCC +0.5
-0.5
VCC +0.5
-50
Switch I/O Current (Continuous)
Peak Switch Current (Pulsed at 1ms
Duration, <10% Duty Cycle)
V
mA
USB
50
Audio
60
All Other Channels
50
mA
USB
150
mA
Audio
150
mA
All Other Channels
150
mA
+150
°C
Storage Temperature Range
-65
TJ
Maximum Junction Temperature
+150
°C
TL
Lead Temperature (Soldering, 10 Seconds)
+260
°C
Air Gap
15
Contact
8
Human Body Model, JEDEC JESD22-A114
All Pins
3
Charged Device Model, JEDEC JESD22-C101
All Pins
2
IEC 61000-4-2 System
ESD
USB Connector Pins
(D+, D-, VBUS)
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
Parameter
Battery Supply Voltage
USB/UART Path Active
VSW
Switch I/O Voltage
Audio Path Active
Mic Path Active
TA
Operating Temperature
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
Min.
Max.
Units
2.7
4.4
V
0
4.4
V
VCC-7.0
2.0
V
0
VCC-1
V
-40
+85
ºC
www.fairchildsemi.com
5
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Absolute Maximum Ratings
All typical values are at 25°C unless otherwise specified.
Symbol
Parameter
VCC (V)
Conditions
TA = -40 to +85°C
Min.
Typ.
Max.
Unit
Host Interface Pins (SEL[2:0])
VIH
Input High Voltage
3.2 to 4.4
VIL
Input Low Voltage
3.2 to 4.4
IIN
Control Input Leakage
IOZ
Off State Leakage
0 to 4.4
4.4
V
1.3
0.7
V
VSW =0 to VCC
-1
1
µA
0 ≤ DP_CON, DM_CON,
DP_HOSTn, DM_HOSTn,
R_HOST, L_HOST ≤ 3.6 V
-2
2
µA
0.4
V
Charger Detect Pin (CD_N)
VOL
Output Low Voltage
3.2 to 4.4
Charger Detect Threshold
3.2 to 4.4
3.3
0 to 4.4
2
IOL=10 mA
VBUS Pin
VBUSTH
IBUSIN
VBUS Input Leakage
V
10
µA
10
µA
9
Ω
Switch Off Characteristics
IOFF
Power Off Leakage Current
0
All Ports Except MIC & Audio Path
VSW =0 V to 4.4 V,
Figure 7
USB Switch On Paths
RONUSB
HS USB Range Switch On
Resistance
3.2 to 4.4
VDP_CON/DM_CON=0 V, 0.4 V,
ION=8 mA, Figure 6
6
RONUART
UART Range Switch On
Resistance
3.2 to 4.4
VDP_CON/DM_CON=0 V, 3.2 V,
ION=8 mA, Figure 6
8
Ω
Audio R/L Switch On Paths
RONAUD
Audio Switch On Resistance
(3)
RFLAT
Audio RON Flatness
RTERM
Internal Termination Resistors
3.2 to 4.4
3.8
VL/R=-0.8 V, 0.8 V, ION=30 mA,
Figure 6
3
Ω
0.16
Ω
1
kΩ
SEL[2:0]=100 (MIC to DP_CON),
VSW =0 V, 1.6 V, ION=8 mA,
Figure 6
15
Ω
SEL[2:0]=101 (MIC to VBUS),
VSW =0 V, 1.6 V, ION=8 mA,
Figure 6
28
Ω
MIC Switch On Path
RONMIC
Switch On Resistance
3.2 to 4.4
Total Switch Current Consumption
ICCSL
Battery Supply Sleep Mode
Average Current
3.2 to 4.4
Static Current During Sleep Mode
(SEL[2:0]=0)
1
µA
35
µA
1
µA
35
µA
VSEL = 2.8 V and VCC = 4.4 V
8
µA
VSEL = 1.8 V and VCC = 4.4 V
10
µA
USB/UART Mode
ICCWK
Battery Supply Active Mode
Average Current
3.2 to 4.4
Audio Mode
(SEL[2:0]=011), VBUS=0 V
Audio Mode
(SEL[2:0]=100, 101)
ICCSELT
Increase in ICCSL/ICCWK Current
per Control Voltage and VCC
3.2 to 4.4
20
20
Note:
3. Flatness is defined as the difference between the maximum and minimum values of on resistance over the
specified range of conditions.
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
6
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Switch Path DC Electrical Characteristics
All typical value are for VCC =3.8 V at 25°C unless otherwise specified.
Symbol
VCC
(V)
Parameter
Audio Mode
3.8
Active Channel
Crosstalk
Xtalk
DP_CON to
DM_CON
Active Channel
Crosstalk MIC
OIRR
Off Isolation
Rejection Ratio
USB Mode
THD+N
TA = -40 to +85°C
Min.
Typ.
f=20 kHz, RT=32 Ω,
CL=0 pF
-95
f=1 MHz, RT=50 Ω,
CL=0 pF
-78
f=240 MHz, RT=50 Ω,
CL=0 pF
-36
Max.
3.8
Unit
Figure
dB
Figure 9
dB
Figure 8
MIC on VBUS to
R_HOST, L_HOST
3.8
f=20 kHz, RT=32 Ω,
CL=0 pF
-93
MIC on DP_CON to
L_HOST
3.8
f=20 kHz, RT=32 Ω,
CL=0 pF
-105
Audio Rejection
L_HOST to DM_CON,
R_HOST to DP_CON
3.8
f=20 kHz, RT=32 Ω,
CL=0 pF
-100
MIC Rejection
MIC_HOST to
DP_CON
3.8
f=20 kHz, RT=50Ω,
CL=0pF
-110
MIC Rejection
MIC_HOST to VBUS
3.8
f=20 kHz, RT=50 Ω,
CL=0 pF
-110
f=1 MHz, RT=50 Ω,
CL=0 pF
-85
f=240 MHz, RT=50 Ω,
CL=0 pF
-35
Power Supply Noise
300MvPP, f=217Hz
-110
dB
20 Hz to 20 kHz,
RL=16 Ω, Input Signal
Range 1.6 VPP
0.10
%
Figure 13
20 Hz to 20 kHz,
RL=32 Ω, Input Signal
Range 1.6 VPP
0.07
%
Figure 13
USB Rejection
DM_HOST to
DM_CON, DP_HOST
to DP_CON
PSRR
Conditions
3.8
Power Supply Rejection Ratio
MIC on VBUS or MIC on DP_CON, to
VCC or GND
3.8
Total Harmonic Distortion + Noise
(Audio Path)
3.8
tCDR
Charger Detection Reset Time: Minimum
time in Selected State to Reset Charger
Detection State Machine.
3.8
SEL[2:0]=’111’
30
μs
tCDL
Charger Detection Start Time: Minimum
Time in Selected State to Start Charger
Detection sequence
3.8
SEL[2:0]=’000’
30
μs
Note:
4. Guaranteed by characterization, not production tested.
Capacitance
Symbol
CIN
Parameter
Select Pins Capacitance
VCC (V)
(5)
0
(5)
(5)
COFF(D+, D-) D+, D- On Capacitance (HS USB Mode)
CON(D+, D-)
Conditions
D+, D- On Capacitance (HS USB Mode)
TA = -40 to +85°C
Typ.
Max.
Unit
Figure
VBIAS=0.2 V
2.5
pF
Figure 11
3.8
VBIAS=0.2 V, f=1 MHz
4.7
pF
Figure 11
3.8
VBIAS=0.2 V, f=1 MHz
7.6
pF
Figure 12
Note:
5.
Guaranteed by characterization, not production tested.
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
7
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Switch Path AC Electrical Characteristics(4)
Figure 3. High-Speed Test Results
(DP_CON/DM_CON – DP_HOST1/DM_HOST1)
Figure 4. High-Speed Test Results
(DP_CON/DM_CON – DP_HOST2/DM_HOST2)
Figure 5. High-Speed Eye Compliance Input Signal
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
8
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
High-Speed USB Eye Compliance Results
VON
I A(OFF)
NC
nBn
A
nA
V IN
V IN
GND
V Sel =
RON = VON / ION
Select
I ON
Select
GND
VSel =
0 or Vcc
GND
0 orVcc
**Each switch port is tested separately.
Figure 6. On Resistance
Figure 7. Off Leakage
Network Analyzer
NC
RS
Network Analyzer
RS
GND
GND
GND
RS and RT are functions of the application
environment (see AC tables for values).
CROSSTALK = 20 Log (VOU
VCC
B
Input – VSEL
mA
CL
nSn
RT
GND
Figure 9. Active Channel Crosstalk
Generator
GND
VOUT
GND
GND
Figure 8. Channel Off Isolation
VIN
GND
RT
Off-Isolation
= 20 Log (VOUT / VIN )
RS
VS
GND
VOUT
RS and RT are functions of the application
environment (see AC/DC tables).
VIN
RT
GND
GND
VS
GND
VS
GND
RT
VSel
VS1, S2, S3
VOUT
Off
On
Off
0V
ΔVOUT
GND
VOUT
VSEL
GND
CL includes test fixture and stray capacitance
Q = ΔVOUT • CL
Figure 10. Charge Injection Test
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
9
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Test Diagrams
nBn
Capacitance
Meter
f = 1MHz
Capacitance
Meter
nSn
VSel =
0 or Vcc
nBn
nSn
V Sel =
f = 1MHz
0 orV cc
nBn
nBn
Figure 11. Channel Off Capacitance
Figure 12. Channel On Capacitance
Audio Analyzer
RS
GND
V IN
VS
GND
V CNTRL
GND
VSel =
GND
0 or Vcc
RS and RT are functions of the application
environment (see AC Tables for specific values).
V OUT
RT
GND
Figure 13. Total Harmonic Distortion + Noise
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
10
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Test Diagrams (Continued)
1.80
0.10 C
A
2.10
B
0.563 (15X)
0.663
2X
1
2.60
2.90
PIN#1 IDENT
0.40
0.10 C
TOP VIEW
0.10 C
0.55 MAX.
0.08 C
0.225 (16X)
2X
RECOMMENDED
LAND PATTERN
0.152
TERMINAL SHAPE VARIANTS
SEATING C
PLANE
0.05
0.00
0.40
0.60
SIDE VIEW
0.15
0.25
0.45
0.35
15X
0.10
0.10
PIN 1
5
0.30
15X
0.50
0.15
0.25
NON-PIN 1
Supplier 1
9
0.40
0.30
0.50
0.15
0.25
1
0.15
15X
0.25
PIN 1
PIN#1 IDENT
16
0.55
0.45
BOTTOM VIEW
NON-PIN 1
0.3015X
0.50
Supplier 2
13
0.25
0.15
0.10 C A B
0.05 C
R0.20
PACKAGE
EDGE
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP16Arev4.
F. TERMINAL SHAPE MAY VARY ACCORDING
TO PACKAGE SUPPLIER, SEE TERMINAL
SHAPE VARIANTS.
LEAD
OPTION 1
SCALE : 2X
LEAD
OPTION 2
SCALE : 2X
Figure 14. 16-Lead, Ultrathin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3
www.fairchildsemi.com
11
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
Physical Dimensions
FSA801 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability
12
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© 2010 Fairchild Semiconductor Corporation
FSA801 • Rev. 1.0.3