Diodes DMP2018LFK-7 P-channel enhancement mode mosfet Datasheet

DMP2018LFK
P-CHANNEL ENHANCEMENT MODE MOSFET
Features and Benefits
RDS(on)max
ID
TA = 25°C
16mΩ @ VGS = -4.5V
-12.8A
25mΩ @ VGS = -2.0V
-10A
V(BR)DSS
•
•
•
•
•
•
•
-20V
Description and Applications
Low On-Resistance
Low Input Capacitance
Low Input/Output Leakage
ESD Protected Gate up to 2kV
Lead Free by Design, RoHS Compliant (Note 1)
"Green" Device (Note 2)
Qualified to AEC-Q101 Standards for High Reliability
Mechanical Data
This new generation MOSFET has been designed to minimize the onstate resistance (RDS(on)) and yet maintain superior switching
performance, making it ideal for high efficiency power management
applications.
•
•
•
•
•
•
•
DC-DC Converters
Power management functions
Notebook PC Applications
Portable Equipment Applications
Case: U-DFN2523-6
Case Material: Molded Plastic, "Green" Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish ⎯ NiPdAu over Copper leadframe. Solderable
per MIL-STD-202, Method 208
Weight: 0.008 grams (approximate)
•
•
Drain
U-DFN2523-6
Pin 1
Gate
Pin 1, 2 = Source
Pin 3 = Gate
Pin 4, 5, 6 = Drain
ESD PROTECTED TO 2kV
Gate
Protection
Diode
Source
Equivalent Circuit
Bottom View
Ordering Information (Note 3)
Part Number
DMP2018LFK-7
DMP2018LFK-13
Notes:
Case
U-DFN2523-6
U-DFN2523-6
Packaging
3,000 / Tape & Reel
10,000 / Tape & Reel
1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. No purposely added lead. Halogen and Antimony free.
2. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com.
3. For packaging details, go to our website at http://www.diodes.com.
Marking Information
P8
Date Code Key
Year
Code
Month
Code
2011
Y
Jan
1
2012
Z
Feb
2
DMP2018LFK
Document number: DS35357 Rev. 5 - 2
Mar
3
YM
ADVANCE INFORMATION
NEW PRODUCT
Product Summary
P8 = Product Type Marking Code
YM = Date Code Marking
Y = Year (ex: Y = 2011)
M = Month (ex: 9 = September)
2013
A
Apr
4
May
5
2014
B
Jun
6
2015
C
Jul
7
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Aug
8
2016
D
Sep
9
Oct
O
2017
E
Nov
N
Dec
D
March 2012
© Diodes Incorporated
DMP2018LFK
ADVANCE INFORMATION
NEW PRODUCT
Maximum Ratings @TA = 25°C unless otherwise specified
Characteristic
Symbol
VDSS
VGSS
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (Note 5) VGS = -4.5V
Steady
State
t<5s
Continuous Drain Current (Note 5) VGS = -2.0V
Steady
State
t<5s
TA = 25°C
TA = 70°C
TA = 25°C
TA = 70°C
TA = 25°C
TA = 70°C
TA = 25°C
TA = 70°C
Maximum Continuous Body Diode Forward Current (Note 5)
Pulsed Drain Current (10μs pulse, duty cycle = 1%)
Avalanche Current (Note 6)
Repetitive Avalanche Energy (Note 6)
ID
Value
-20
±12
-9.2
-7.3
ID
-12.8
-10.3
A
ID
-7.1
-6
A
ID
IS
IDM
IAS
EAS
-10
-8.3
-3
-90
17
72
Units
V
V
A
A
A
A
A
mJ
Thermal Characteristics
Characteristic
Total Power Dissipation (Note 4)
Thermal Resistance, Junction to Ambient (Note 4)
Total Power Dissipation (Note 5)
Thermal Resistance, Junction to Ambient (Note 5)
Thermal Resistance, Junction to Case
Operating and Storage Temperature Range
Symbol
TA = 25°C
TA = 70°C
Steady State
t<5s
TA = 25°C
TA = 70°C
Steady State
t<5s
PD
RθJA
PD
RθJA
RθJC
TJ, TSTG
Value
1
0.63
126
60
2.1
1.3
61
29
6.4
-55 to 150
Notes:
4. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided.
Notes:
5. Device mounted on FR-4 substrate PC board, 2oz copper, with thermal vias to bottom layer 1inch square copper plate
DMP2018LFK
Document number: DS35357 Rev. 5 - 2
2 of 7
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Units
W
°C/W
W
°C/W
°C
March 2012
© Diodes Incorporated
DMP2018LFK
Characteristic
OFF CHARACTERISTICS (Note 7)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current TJ = 25°C
Gate-Source Leakage
ON CHARACTERISTICS (Note 7)
Gate Threshold Voltage
Symbol
Min
Typ
Max
Unit
BVDSS
IDSS
IGSS
-20
-
-
-1
±2
V
μA
μA
VGS = 0V, ID = -10mA
VDS = -20V, VGS = 0V
VGS = ±10V, VDS = 0V
VGS(th)
RDS (ON)
|Yfs|
VSD
10
12
13.6
20
17
0.7
-1.2
16
20
25
1.2
V
Static Drain-Source On-Resistance
-0.45
10
-
VDS = -10V, ID = -200μA
VGS = -4.5V, ID = -3.6A
VGS = -2.5V, ID = -3.6A
VGS = -2.0V, ID = -1.8A
VGS = -1.5V, ID = -1A
VDS = -10V, ID = -3.6A
VGS = 0V, IS = -3.6A
Ciss
Coss
Crss
Rg
Qg
Qg
Qgs
Qgd
tD(on)
tr
tD(off)
tf
-
4748
833
339
6.2
113
53
7.1
8.5
22.8
29.8
240.8
100.6
-
Forward Transfer Admittance
Diode Forward Voltage
DYNAMIC CHARACTERISTICS (Note 8)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Total Gate Charge (VGS = -10V)
Total Gate Charge (VGS = -4.5V)
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Notes:
mΩ
S
V
Test Condition
pF
VDS = -10V, VGS = 0V,
f = 1.0MHz
Ω
VDS = 0V, VGS = 0V, f = 1MHz
nC
VDS = -16V, ID = -7.2A
ns
VDD = -10V, VGS = -4.5V,
RG = 4.7Ω, ID = -3.6A
6. UIS in production with L = 0.5mH, TJ = 25°C
7 .Short duration pulse test used to minimize self-heating effect.
8. Guaranteed by design. Not subject to production testing.
30
30
VGS = -10V
VGS = -4.5V
25
25
VGS = -2.5V
VGS = -2.0V
-ID, DRAIN CURRENT (A)
-ID, DRAIN CURRENT (A)
ADVANCE INFORMATION
NEW PRODUCT
Electrical Characteristics @ TA = 25°C unless otherwise stated
20
VGS = -1.5V
15
10
VDS = -5V
20
15
10
TA = 150°C
TA = 125°C
TA = 85°C
5
5
T A = 25°C
TA = -55°C
0
0
0.5
1
1.5
-VDS, DRAIN-SOURCE VOLTAGE (V)
Fig. 1 Typical Output Characteristic
DMP2018LFK
Document number: DS35357 Rev. 5 - 2
2
0
0
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0.5
1
1.5
2
2.5
-VGS, GATE-SOURCE VOLTAGE (V)
Fig. 2 Typical Transfer Characteristic
3
March 2012
© Diodes Incorporated
VGS = -2.5V
0.01
VGS = -10V
0
0
VGS = -4.5V
5
10
15
20
25
-ID, DRAIN-SOURCE CURRENT (A)
Fig. 3 Typical On-Resistance
vs. Drain Current and Gate Voltage
RDSON, DRAIN-SOURCE
ON-RESISTANCE (NORMALIZED)
VGS = -5V
ID = -5A
VGS = -10V
ID = -10A
1.1
0.9
0.7
0.5
-50
VGS = -4.5V
0.02
TA = 150°C
T A = 125°C
TA = 85°C
TA = -55°C
0
VGS = -5V
ID = -5A
0.012
0.010
VGS = -10V
ID = -10A
0.008
0.006
0.004
0.002
0
-50
-25
0
25
50
75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
Fig. 6 On-Resistance Variation with Temperature
30
0.8
ID = -250µA
ID = -1mA
0.2
0
25
50
75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
Fig. 7 Gate Threshold Variation vs. Ambient Temperature
-IS, SOURCE CURRENT (A)
25
1.0
Document number: DS35357 Rev. 5 - 2
30
0.014
1.2
DMP2018LFK
10
15
20
25
-ID, DRAIN CURRENT (A)
Fig. 4 Typical On-Resistance
vs. Drain Current and Temperature
0.016
1.4
0
-50 -25
5
0.018
0
25
50
75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
Fig. 5 On-Resistance Variation with Temperature
0.4
0
0.020
-25
0.6
TA = 25°C
0.01
30
1.5
1.3
0.03
RDS(ON), DRAIN-SOURCE ON-RESISTANCE (Ω)
0.02
RDSON, DRAIN-SOURCE ON-RESISTANCE (Ω)
RDS(ON), DRAIN-SOURCE ON-RESISTANCE (Ω)
0.03
1.7
-VGS(TH), GATE THRESHOLD VOLTAGE (V)
ADVANCE INFORMATION
NEW PRODUCT
DMP2018LFK
TA = 25°C
20
15
10
5
0
0.2
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0.4
0.6
0.8
1.0
-VSD, SOURCE-DRAIN VOLTAGE (V)
Fig. 8 Diode Forward Voltage vs. Current
1.2
March 2012
© Diodes Incorporated
DMP2018LFK
10,000
100,000
-IDSS, LEAKAGE CURRENT (nA)
f = 1MHz
C, CAPACITANCE (pF)
1,000
Coss
Crss
100
0
5
10
15
-VDS, DRAIN-SOURCE VOLTAGE (V)
Fig. 9 Typical Total Capacitance
T A = 150°C
10,000
TA = 125°C
1,000
TA = 85°C
100
10
1
20
100
10
T A = 25°C
0
4
8
12
16
-VDS, DRAIN-SOURCE VOLTAGE (V)
Fig. 10 Typical Leakage Current
vs. Drain-Source Voltage
20
RDS(on)
Limited
8
ID, DRAIN CURRENT (A)
-VGS, GATE-SOURCE VOLTAGE (V)
VDS = -16V
ID = -7.2A
6
4
10
DC
PW = 10s
PW = 1s
1
PW = 100ms
PW = 10ms
PW = 1ms
PW = 100µs
0.1
PW = 10µs
2
TJ(max) = 150°C
TA = 25°C
Single Pulse
0
0
20
40
60
80
100
Qg, TOTAL GATE CHARGE (nC)
Fig. 11 Gate-Charge Characteristics
0.01
0.1
120
1
10
VDS, DRAIN-SOURCE VOLTAGE (V)
Fig. 12 Safe Operation Area
100
1
r(t), TRANSIENT THERMAL RESISTANCE
ADVANCE INFORMATION
NEW PRODUCT
Ciss
D = 0.7
D = 0.5
D = 0.3
0.1
D = 0.1
D = 0.9
D = 0.05
RθJA(t) = r(t) * RθJA
RθJA = 61°C/W
D = 0.02
0.01
D = 0.01
P(pk)
D = 0.005
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1/t2
D = Single Pulse
0.001
0.00001
0.0001
DMP2018LFK
Document number: DS35357 Rev. 5 - 2
t1
0.001
0.01
0.1
1
t1, PULSE DURATION TIME (s)
Fig. 13 Transient Thermal Response
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10
100
1,000
March 2012
© Diodes Incorporated
DMP2018LFK
ADVANCE INFORMATION
NEW PRODUCT
Package Outline Dimensions
A
A3
U-DFN2523-6
Dim Min Max Typ
A
0.57 0.63 0.60
A1
0
0.05 0.02
A3
0.152
−
−
b
0.25 0.35 0.30
D
2.45 2.55 2.50
D1 1.55 1.65 1.60
e
0.65
−
−
E
2.25 2.35 2.30
E1
1.18 1.28 1.23
L
0.30 0.40 0.35
L1
0.30 0.40 0.35
All Dimensions in mm
A1
D
e
L (3x)
Pin #1 ID
R0.150
E
E1
D1
L1 (2x)
b (6x)
Suggested Pad Layout
X1
Y1
Y2
Y3
Dimensions Value (in mm)
C
0.650
X
0.400
X1
1.700
Y
0.650
Y1
0.450
Y2
1.830
Y3
2.700
Y
C
DMP2018LFK
Document number: DS35357 Rev. 5 - 2
X
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March 2012
© Diodes Incorporated
DMP2018LFK
ADVANCE INFORMATION
NEW PRODUCT
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
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Copyright © 2012, Diodes Incorporated
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DMP2018LFK
Document number: DS35357 Rev. 5 - 2
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March 2012
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