5 V Low Power EIA RS-485 Transceiver ADM485 Meets EIA RS-485 standard 5 Mbps data rate Single 5 V supply –7 V to +12 V bus common-mode range High speed, low power BiCMOS Thermal shutdown protection Short-circuit protection Driver propagation delay: 10 ns typical Receiver propagation delay: 15 ns typical High-Z outputs with power off Superior upgrade for LTC485 FUNCTIONAL BLOCK DIAGRAM ADM485 RO 1 8 VCC RE 2 7 B DE 3 6 A 5 GND DI 4 R D 00078-001 FEATURES Figure 1. APPLICATIONS Low power RS-485 systems DTE/DCE interface Packet switching Local area networks (LNAs) Data concentration Data multiplexers Integrated services digital network (ISDN) GENERAL DESCRIPTION The ADM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with EIA standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver can be enabled independently. When disabled, the outputs are three-stated. The ADM485 operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. If during fault conditions, a significant temperature increase is detected in the internal driver circuitry, this feature forces the driver output into a high impedance state. Up to 32 transceivers can be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and when powered down, which minimizes the loading effect when the transceiver is not being used. The high impedance driver output is maintained over the common-mode voltage range of −7 V to +12 V. The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The ADM485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against ESD; all driver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up. The ADM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbps while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in 8-lead PDIP, 8-lead SOIC, and small footprint, 8-lead MSOP packages. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1993–2008 Analog Devices, Inc. All rights reserved. ADM485 TABLE OF CONTENTS Features .............................................................................................. 1 Test Circuits..................................................................................... 10 Applications....................................................................................... 1 Switching Characteristics .............................................................. 11 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 12 General Description ......................................................................... 1 Differential Data Transmission ................................................ 12 Revision History ............................................................................... 2 Cable and Data Rate................................................................... 12 Specifications..................................................................................... 3 Thermal Shutdown .................................................................... 12 Timing Specifications .................................................................. 4 Propagation Delay ...................................................................... 12 Absolute Maximum Ratings............................................................ 5 Receiver Open Circuit, Fail-Safe .............................................. 12 ESD Caution.................................................................................. 5 Outline Dimensions ....................................................................... 13 Pin Configuration and Function Descriptions............................. 6 Ordering Guide .......................................................................... 14 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 04/08—Rev. E to Rev. F 1/03—Rev. B to Rev. C. Updated Format..................................................................Universal Changes to Table 2............................................................................ 4 Updated Outline Dimension......................................................... 13 Changes to Ordering Guide .......................................................... 14 Change to Specifications ..................................................................2 Change to Ordering Guide...............................................................3 10/03—Rev. D to Rev. E Changes to Timing Specifications .................................................. 2 Updated Ordering Guide................................................................. 3 7/03—Rev. C to Rev. D Changes to Absolute Maximum Ratings ....................................... 3 Changes to Ordering Guide ............................................................ 3 Update to Outline Dimensions....................................................... 9 12/02—Rev. A to Rev. B. Deleted Q-8 Package ..........................................................Universal Edits to Features.................................................................................1 Edits to General Description ...........................................................1 Edits, additions to Specifications.....................................................2 Edits, additions to Absolute Maximum Ratings............................3 Additions to Ordering Guide...........................................................3 TPCs Updated and Reformatted .....................................................5 Addition of 8-Lead MSOP Package ................................................9 Update to Outline Dimensions........................................................9 Rev. F | Page 2 of 16 ADM485 SPECIFICATIONS VCC = 5 V ± 5%, all specifications TMIN to TMAX, unless otherwise noted. Table 1. Parameter DRIVER Differential Output Voltage, VOD VOD3 Δ|VOD| for Complementary Output States Common-Mode Output Voltage, VOC Δ|VOD| for Complementary Output States Output Short-Circuit Current, VOUT = High Output Short-Circuit Current, VOUT = Low CMOS Input Logic Threshold Low, VINL CMOS Input Logic Threshold High, VINH Logic Input Current (DE, DI) RECEIVER Differential Input Threshold Voltage, VTH Input Voltage Hysteresis, ΔVTH Input Resistance Input Current (A, B) CMOS Input Logic Threshold Low, VINL CMOS Input Logic Threshold High, VINH Logic Enable Input Current (RE) CMOS Output Voltage Low, VOL CMOS Output Voltage High, VOH Short-Circuit Output Current Three-State Output Leakage Current POWER SUPPLY CURRENT ICC, Outputs Enabled ICC, Outputs Disabled Min Typ 2.0 1.5 1.5 35 35 Max Unit Test Conditions/Comments 5.0 5.0 5.0 5.0 0.2 3 0.2 250 250 0.8 V V V V V V V mA mA V V μA R = ∞, see Figure 20 VCC = 5 V, R = 50 Ω (RS-422), see Figure 20 R = 27 Ω (RS-485), see Figure 20 VTST = −7 V to +12 V, see Figure 21 R = 27 Ω or 50 Ω, see Figure 20 R = 27 Ω or 50 Ω, see Figure 20 R = 27 Ω or 50 Ω −7 V ≤ VO ≤ +12 V −7 V ≤ VO ≤ +12 V −7 V ≤ VCM ≤ +12 V VCM = 0 V −7 V ≤ VCM ≤ +12 V VIN = 12 V VIN = −7 V 85 ±1.0 V mV kΩ mA mA V V μA V V mA μA IOUT = 4.0 mA IOUT = −4.0 mA VOUT = GND or VCC 0.4 V ≤ VOUT ≤ 2.4 V 2.2 1 mA mA Digital inputs = GND or VCC Digital inputs = GND or VCC 2.0 ±1.0 −0.2 +0.2 70 12 1 –0.8 0.8 2.0 ±1 0.4 4.0 7 1.0 0.6 Rev. F | Page 3 of 16 ADM485 TIMING SPECIFICATIONS VCC = 5 V ± 5%, all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter DRIVER Propagation Delay Input to Output, tPLH, tPHL Driver Output to OUTPUT, tSKEW Driver Rise/Fall Time, tR, tF Driver Enable to Output Valid Driver Disable Timing Matched Enable Switching |tZH − tZL| Matched Disable Switching |tHZ − tLZ| RECEIVER Propagation Delay Input to Output, tPLH, tPHL Skew |tPLH − tPHL| Receiver Enable, tZH, tZL Receiver Disable, tHZ, tLZ Tx Pulse Width Distortion Rx Pulse Width Distortion 1 Min Typ Max Unit Test Conditions/Comments 2 10 1 8 10 10 0 0 15 5 15 25 25 2 2 ns ns ns ns ns ns ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22 RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22 RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22 RL = 110 Ω, CL = 50 pF, see Figure 23 RL = 110 Ω, CL = 50 pF, see Figure 23 RL = 110 Ω, CL = 50 pF, see Figure 23 1 RL = 110 Ω, CL = 50 pF, see Figure 231 8 15 30 5 20 20 ns ns ns ns ns ns CL = 15 pF, see Figure 24 CL = 15 pF, see Figure 24 CL = 15 pF, RL = 1 kΩ, see Figure 25 CL = 15 pF, RL = 1 kΩ, see Figure 25 5 5 1 1 Guaranteed by characterization. Rev. F | Page 4 of 16 ADM485 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Transmitting Table 3. Parameter VCC Inputs Driver Input (DI) Control Inputs (DE, RE) Receiver Inputs (A, B) Outputs Driver Outputs (A, B) Receiver Output Power Dissipation 8-Lead MSOP θJA, Thermal Impedance Power Dissipation 8-Lead PDIP θJA, Thermal Impedance Power Dissipation 8-Lead SOIC θJA, Thermal Impedance Operating Temperature Range Commercial Range (J Version) Industrial Range (A Version) Storage Temperature Range Lead Temperature (Soldering, 10 sec) Vapor Phase (60 sec) Infrared (15 sec) DE Rating −0.3 V to +7 V Inputs DI B A 1 0 X1 0 1 Z2 1 0 Z2 1 1 0 −0.3 V to VCC + 0.3 V −0.3 V to VCC + 0.3 V −9 V to +14 V 1 2 Outputs X = don’t care. Z = high impedance. Table 5. Receiving −9 V to +14 V −0.5 V to VCC + 0.5 V 900 mW 206°C/W 500 mW 130°C/W 450 mW 170°C/W RE Input A − Input B Output RO 0 0 0 1 ≥ +0.2 V ≤ −0.2 V Inputs open X1 1 0 1 Z2 0°C to 70°C −40°C to +85°C −65°C to +150°C 300°C 215°C 220°C ESD CAUTION 1 2 X = don’t care. Z = high impedance. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. F | Page 5 of 16 ADM485 RO 1 RE 2 ADM485 8 VCC 7 B TOP VIEW DE 3 (Not to Scale) 6 A DI 4 5 GND 00078-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. Pin Configuration Table 6. Pin Function Descriptions Pin No. 1 2 3 Mnemonic RO RE DE 4 DI 5 6 7 8 GND A B VCC Function Receiver Output. When enabled, if A is greater than B by 200 mV, RO is high. If A is less than B by 200 mV, RO is low. Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a high impedance state. Driver Output Enable. A high level enables the driver differential outputs, A and B. A low level places it in a high impedance state. Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI forces A high and B low. Ground Connection, 0 V. Noninverting Receiver Input A/Driver Output A. Inverting Receiver Input B/Driver Output B. Power Supply, 5 V ± 5%. Rev. F | Page 6 of 16 ADM485 TYPICAL PERFORMANCE CHARACTERISTICS 0.40 50 I = 8mA 35 30 25 20 15 10 5 0.25 0.50 0.75 1.00 1.25 1.50 1.75 RECEIVER OUTPUT LOW VOLTAGE (V) 2.00 0.20 90 –2 80 –4 70 OUTPUT CURRENT (mA) 0 –6 –8 –10 –12 4.50 4.75 5.00 RECEIVER OUTPUT HIGH VOLTAGE (V) 125 0 0 Figure 4. Output Current vs. Receiver Output High Voltage 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 DRIVER DIFFERENTIAL OUTPUT VOLTAGE (V) 4.5 Figure 7. Output Current vs. Driver Differential Output Voltage 4.55 DRIVER DIFFERENTIAL OUTPUT VOLTAGE (V) 2.15 I = 8mA 4.50 4.45 4.40 4.35 4.30 4.25 4.20 –25 0 25 50 TEMPERATURE (°C) 75 100 125 RL = 26.8Ω 2.10 2.05 2.00 1.95 1.90 –50 00078-005 4.15 –50 100 30 10 4.25 75 40 –16 4.00 25 50 TEMPERATURE (°C) 50 20 3.75 0 60 –14 –18 3.50 –25 Figure 6. Receiver Output Low Voltage vs. Temperature 00078-004 OUTPUT CURRENT (mA) 0.25 0.15 –50 Figure 3. Output Current vs. Receiver Output Low Voltage RECEIVER OUTPUT HIGH VOLTAGE (V) 0.30 00078-007 0 00078-003 0 0.35 Figure 5. Receiver Output High Voltage vs. Temperature –25 0 25 50 75 TEMPERATURE (°C) 100 125 Figure 8. Driver Differential Output Voltage vs. Temperature Rev. F | Page 7 of 16 00078-008 OUTPUT CURRENT (mA) 40 00078-006 RECEIVER OUTPUT LOW VOLTAGE (V) 45 ADM485 0.7 100 90 0.6 0.5 RECEIVER SKEW (ns) OUTPUT CURRENT (mA) 80 70 60 50 40 30 | tPLH – tPHL | 0.4 0.3 0.2 20 0.1 0 0.5 4.0 1.0 1.5 2.0 2.5 3.0 3.5 DRIVER OUTPUT LOW VOLTAGE (V) 4.5 0 –50 00078-009 0 Figure 9. Output Current vs. Driver Output Low Voltage –25 0 25 50 75 TEMPERATURE (°C) 100 125 00078-012 10 Figure 12. Receiver Skew vs. Temperature 0 6 –10 5 –30 –40 DRIVER SKEW (ns) –50 –60 –70 –80 4 3 | tPHLA – tPHLB | 2 –90 1 –110 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 DRIVER OUTPUT HIGH VOLTAGE (V) 4.5 5.0 0 –50 00078-010 –120 Figure 10. Output Current vs. Driver Output High Voltage –25 0 25 50 TEMPERATURE (°C) 75 100 125 Figure 13. Driver Skew vs. Temperature 1.1 1.4 1.2 1.0 DRIVER ENABLED 1.0 0.9 PWD 0.8 0.8 | tPLH – tPHL | 0.6 0.7 0.4 DRIVER DISABLED 0.6 0.5 –50 0.2 –25 0 25 50 TEMPERATURE (°C) 75 100 125 0 –50 00078-011 SUPPLY CURRENT (mA) | tPLHA – tPLHB | 00078-013 –100 Figure 11. Supply Current vs. Temperature –25 0 25 50 75 TEMPERATURE (°C) 100 125 150 Figure 14. Driver Pulse Width Distortion (PWD) vs. Temperature Rev. F | Page 8 of 16 00078-014 OUTPUT CURRENT – mA –20 ADM485 T DI 4 T A A B B 1,2 CH2 1.00VΩ BW M5.00ns CH3 2.64V RO CH1 1.00VΩ BW CH3 5.00VΩ BW Figure 15. Unloaded Driver Differential Outputs CH2 1.00VΩ BW M10.00ns CH4 2.00VΩBW CH4 2.76V Figure 18. Driver/Receiver Propagation Delays, High to Low A A B B CH1 1.00VΩBW CH2 500mVΩ BW M5.00ns CH3 00078-016 1,2 2.74V 1,2 CH1 500mVΩ Figure 16. Loaded Driver Differential Outputs T A 4 B RO 1,2 CH4 400mV 00078-017 3 CH2 1.00VΩ BW M10.0ns CH4 2.00VΩBW M10.00ns Figure 19. Driver Output at 30 Mbps DI CH1 1.00VΩ BW CH3 5.00VΩ BW CH2 500mVΩ Figure 17. Driver/Receiver Propagation Delays, Low to High Rev. F | Page 9 of 16 CH4 2.76V 00078-019 CH1 1.00VΩBW 00078-015 3 00078-018 1,2 ADM485 TEST CIRCUITS VCC R A 0V OR 3V CL B 00078-020 VOC R RL S1 DE S2 VOUT 00078-023 VOD DE IN Figure 20. Driver Voltage Measurement Figure 23. Driver Enable/Disable 375Ω A VTST CL Figure 24. Receiver Propagation Delay Figure 21. Driver Voltage Measurement VCC +1.5V A CL1 S1 RLDIFF CL2 RL RE CL 00078-022 B –1.5V VOUT REIN Figure 25. Receiver Enable/Disable Figure 22. Driver Propagation Delay Rev. F | Page 10 of 16 S2 00078-025 375Ω VOUT RE B 00078-024 60Ω 00078-021 VOD3 ADM485 SWITCHING CHARACTERISTICS 3V 1.5V 0V 1.5V tPLH B tPHL A, B 0V tSKEW = tPLH – tPHL tPLH tPHL +VO VOH 90% POINT 90% POINT RO 10% POINT 10% POINT tR tF 1.5V 1.5V tSKEW = tPLH – tPHL 00078-026 0V VOL Figure 28. Receiver Propagation Delay Figure 26. Driver Propagation Delay, Rise/Fall Timing 3V 3V 1.5V tZL 0V tHZ 2.3V 1.5V RO VOH – 0.5V VOL tHZ OUTPUT HIGH VOH 0V VOL + 0.5V OUTPUT LOW tZH 00078-027 tZH tLZ VOL + 0.5V VOL A, B 1.5V 1.5V tZL 0V tLZ 2.3V A, B RE 1.5V Figure 27. Driver Enable/Disable Timing RO 1.5V VOH VOH – 0.5V 0V Figure 29. Receiver Enable/Disable Timing Rev. F | Page 11 of 16 00078-029 DE 00078-028 VO A –VO 0V 1/2VO ADM485 APPLICATIONS INFORMATION DIFFERENTIAL DATA TRANSMISSION RT D Table 7. Comparison of RS-422 and RS-485 Interface Standards Specification Transmission Type Maximum Cable Length Minimum Driver Output Voltage Driver Load Impedance Receiver Input Resistance Receiver Input Sensitivity Receiver Input Voltage Range No. of Drivers/Receivers per Line RS-422 Differential 4000 ft. ±2 V 100 Ω 4 kΩ min ±200 mV −7 V to +7 V 1/10 RS-485 Differential 4000 ft. ±1.5 V 54 Ω 12 kΩ min ±200 mV −7 V to +12 V 32/32 CABLE AND DATA RATE The transmission line of choice for RS-485 communications is a twisted pair. Twisted pair cable tends to cancel common-mode noise and causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair. The ADM485 is designed for bidirectional data communications on multipoint transmission lines. A typical application showing a multipoint transmission network is illustrated in Figure 30. An RS-485 transmission line can have as many as 32 transceivers on the bus. Only one driver can transmit at a particular time, but multiple receivers can be enabled simultaneously. D R The RS-422 standard specifies data rates up to 10 MBaud and line lengths up to 4000 ft. A single driver can drive a transmission line with up to 10 receivers. To cater to true multipoint communications, the RS-485 standard was defined. This standard meets or exceeds all the requirements of RS-422 but also allows for up to 32 drivers and 32 receivers to be connected to a single bus. An extended commonmode range of −7 V to +12 V is defined. The most significant difference between the RS-422 standard and the RS-485 standard is the fact that the drivers can be disabled, thereby allowing more than one (32 in fact) to be connected to a single line. Only one driver should be enabled at a time, but the RS-485 standard contains additional specifications to guarantee device safety in the event of line contention. RT R R D R D 00078-030 Differential data transmission is used to reliably transmit data at high rates over long distances and through noisy environments. Differential transmission nullifies the effects of ground shifts and noise signals that appear as common-mode voltages on the line. There are two main standards approved by the EIA that specify the electrical characteristics of transceivers used in differential data transmission. Figure 30. Typical RS-485 Network As with any transmission line, it is important that reflections be minimized. This can be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. Stub lengths of the main line should also be kept as short as possible. A properly terminated transmission line appears purely resistive to the driver. THERMAL SHUTDOWN The ADM485 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature and disables the driver outputs. The thermal sensing circuitry is designed to disable the driver outputs when a die temperature of 150°C is reached. As the device cools, the drivers are re-enabled at 140°C. PROPAGATION DELAY The ADM485 features very low propagation delay, ensuring maximum baud rate operation. The driver is well balanced, ensuring distortion free transmission. Another important specification is a measure of the skew between the complementary outputs. Excessive skew impairs the noise immunity of the system and increases the amount of electromagnetic interference (EMI). RECEIVER OPEN CIRCUIT, FAIL-SAFE The receiver input includes a fail-safe feature that guarantees a logic high on the receiver when the inputs are open circuit or floating. Rev. F | Page 12 of 16 ADM485 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 5 1 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 31. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5 5.15 4.90 4.65 4 PIN 1 0.65 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 45° 0.23 0.08 8° 0° SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 32. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. F | Page 13 of 16 0.80 0.60 0.40 012407-A 8 4.00 (0.1574) 3.80 (0.1497) ADM485 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 1 4 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) BSC 0.210 (5.33) MAX 0.060 (1.52) MAX 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE 0.005 (0.13) MIN 0.430 (10.92) MAX 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. 070606-A 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) Figure 33. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters) ORDERING GUIDE Model ADM485AN ADM485ANZ 1 ADM485AR ADM485AR-REEL ADM485ARZ1 ADM485ARZ-REEL1 ADM485ARM ADM485ARM-REEL ADM485ARM-REEL7 ADM485ARMZ1 ADM485ARMZ-REEL1 ADM485ARMZ-REEL71 ADM485JN ADM485JNZ1 ADM485JR ADM485JR-REEL ADM485JR-REEL7 ADM485JRZ1 ADM485JRZ-REEL1 ADM485JRZ-REEL71 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked. Rev. F | Page 14 of 16 Package Option N-8 N-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 Branding M41 M41 M41 M41# M41# M41# ADM485 NOTES Rev. F | Page 15 of 16 ADM485 NOTES ©1993–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00078-0-4/08(F) Rev. F | Page 16 of 16