Fairchild FOD8321 2.5a output current, gate drive optocoupler in optoplanar â® wide body sop 5-pin Datasheet

FOD8321
2.5A Output Current, Gate Drive Optocoupler in
Optoplanar® Wide Body SOP 5-Pin
Features
■ Fairchild’s
■
■
■
■
■
■
■
Description
Optoplanar®
packaging technology
provides reliable and high voltage insulation with
greater than 8mm creepage and clearance distance,
and 0.5mm internal insulation distance while still
offering a compact footprint
2.5A output current driving capability for medium
power IGBT/MOSFET
– Use of P-Channel MOSFETs at output stage
enables output voltage swing close to the supply
rail
20kV/µs Minimum Common Mode Rejection
Wide Supply Voltage range from 15V to 30V
Fast Switching Speed over full operating temperature
range
– 500ns max. propagation delay
– 300ns max. pulse width distortion
UnderVoltage LockOut (UVLO) with hysteresis
Extended industrial temperate range, -40 to 100°C
temperature range
Safety and regulatory approvals
– UL1577, 5,000VRMS for 1 min.
– DIN EN/IEC60747-5-5, 1,414V peak working
insulation voltage
Applications
The FOD8321 is a 2.5A Output Current Gate Drive
Optocoupler, capable of driving medium power IGBT/
MOSFETs. It is ideally suited for fast switching driving of
power IGBT and MOSFETs used in motor control
inverter applications, and high performance power
systems.
It utilizes Fairchild’s coplanar packaging technology,
Optoplanar®, and optimized IC design to achieve reliably
high insulation voltage and high noise immunity.
It consists of a aluminum gallium arsenide (AlGaAs) light
emitting diode optically coupled to an integrated circuit
with a high-speed driver for push-pull MOSFET output
stage. The device is housed in a wide body 5-pin small
outline plastic package.
Functional Schematic
ANODE 1
6 VDD
5 VO
CATHODE 3
4 VSS
■ AC and brushless DC motor drives
■ Industrial inverter
■ Uninterruptible power supply
■ Induction heating
■ Isolated IGBT/Power MOSFET gate drive
Related Resources
■ FOD3120, High Noise Immunity, 2.5A Output Current,
Gate Drive Optocoupler Datasheet
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
May 2012
VDD–VSS “Positive Going”
(Turn-on)
LED
VDD–VSS “Positive Going”
(Turn-off)
VO
Off
0V to 30V
0V to 30V
Low
On
0V to 11.5V
0V to 10V
Low
On
11.5V to 14.5V
10V to 13V
Transition
On
14.5V to 30V
13V to 30V
High
Pin Definitions
Pin #
Name
1
Anode
3
Cathode
Description
LED Anode
LED Cathode
4
VSS
Negative Supply Voltage
5
VO
Output Voltage
6
VDD
Positive Supply voltage
Pin Configuration
1
6
ANODE
CATHODE
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
5
3
4
VDD
VO
VSS
www.fairchildsemi.com
2
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Truth Table
Symbol
Parameter
Min.
Typ.
Max.
Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1
For Rated Mains Voltage < 150Vrms
I–IV
For Rated Mains Voltage < 300Vrms
I–IV
For Rated Mains Voltage < 450Vrms
I–IIII
For Rated Mains Voltage < 600Vrms
I–III
Climatic Classification
40/100/21
Pollution Degree (DIN VDE 0110/1.89)
2
CTI
Comparative Tracking Index
175
VPR
Input to Output Test Voltage, Method b,
VIORM x 1.875 = VPR, 100% Production Test with
tm = 1 sec., Partial Discharge < 5pC
2651
Input to Output Test Voltage, Method a,
VIORM x 1.5 = VPR, Type and Sample Test with
tm = 60 sec.,Partial Discharge < 5 pC
2121
VIORM
Max Working Insulation Voltage
1,414
Vpeak
VIOTM
Highest Allowable Over Voltage
6000
Vpeak
8.0
mm
External Creepage
External Clearance
8.0
mm
Insulation Thickness
0.5
mm
Safety Limit Values – Maximum Values Allowed in the
Event of a Failure
Case Temperature
150
°C
IS,INPUT
Input Current
200
mA
PS,OUTPUT
Output Power
600
mW
109
Ω
TS
RIO
Insulation Resistance at TS, VIO = 500V
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
3
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Safety and Insulation Ratings
As per DIN EN/IEC60747-5-5. This optocoupler is suitable for “safe electrical insulation” only within the safety limit
data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol
Parameter
Value
Units
TSTG
Storage Temperature
-40 to +125
°C
TOPR
Operating Temperature
-40 to +100
°C
Junction Temperature
-40 to +125
°C
260 for 10 sec
°C
TJ
TSOL
Lead Solder Temperature (Refer to Reflow Temperature
Profile)
IF(AVG)
Average Input Current
25
mA
F
Operating Frequency
50
kHz
VR
Reverse Input Voltage
5.0
V
IO(PEAK)
Peak Output Current(1)
3.0
A
0 to 35
V
0 to VDD
V
VDD
VO(PEAK)
tR(IN), tF(IN)
Supply Voltage
Peak Output Voltage
Input Signal Rise and Fall Time
500
ns
PDI
Input Power Dissipation(2)(4)
45
mW
PDO
Output Power Dissipation(3)(4)
500
mW
Notes:
1. Maximum pulse width = 10µs, maximum duty cycle = 0.2%.
2. No derating required across operating temperature range.
3. Derate linearly from 25°C at a rate of 5.2mW/°C
4. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Min.
Max.
Unit
Ambient Operating Temperature
-40
100
°C
Supply Voltage
16
30
V
IF(ON)
Input Current (ON)
10
16
mA
VF(OFF)
Input Voltage (OFF)
0
0.8
V
TA
VDD – VSS
Parameter
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
4
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Absolute Maximum Ratings (TA = 25ºC unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Apply over all recommended conditions, typical value is measured at TA = 25ºC
Symbol
Parameter
Conditions
Min.
VISO
Input-Output Isolation
Voltage
TA = 25ºC, R.H. < 50%, t = 1.0min,
II-O ≤ 20µA, 50Hz(5)(6)
RISO
Isolation Resistance
VI-O = 500V(5)
CISO
Isolation Capacitance
VI-O = 0V, Freq =
Typ.
Max.
5,000
1.0MHz(6)
Units
VRMS
1011
Ω
1
pF
Notes:
5. Device is considered a two terminal device: Pins 1 and 3 are shorted together and Pins 4, 5 and 6 are shorted
together.
6. 5,000 VACRMS for 1 minute duration is equivalent to 6,000 VACRMS for 1 second duration.
Electrical Characteristics
Apply over all recommended conditions, typical value is measured at VDD = 30V, VSS = Ground, TA = 25°C unless
otherwise specified.
Symbol
VF
Parameter
Input Forward Voltage
Conditions
IF = 10mA
Δ(VF / TA)
Temperature Coefficient of
Forward Voltage
BVR
Input Reverse Breakdown
Voltage
IR = 10µA
CIN
Input Capacitance
f = 1MHz, VF = 0V
IOH
High Level Output
Current(1)
IOL
VOH
VOL
Low Level Output
Current(1)
High Level Output
Voltage(7)(8)
Low Level Output
Voltage(7)(8)
Min.
1.1
Typ.
Max.
1.5
1.8
-1.8
1.0
2.0
VOL = VSS + 3V
1.0
VOL = VSS+ 6V
2.0
V
16
V
60
VOH = VDD – 3V
Figure
mV/°C
5
VOH = VDD – 6V
Units
2.0
2.0
pF
2.5
A
1, 3
2.5
A
1, 3, 19
2.5
A
4, 6
2.5
A
4, 6, 18
IF = 10mA, IO = -2.5A
VDD – 6.25
VDD – 2.5
V
1
IF = 10mA, IO = -100mA
VDD – 0.5
VDD – 0.1
V
1, 2, 20
IF = 10mA, IO = 2.5A
VSS + 2.5
VSS + 6.25
V
4
IF = 0mA, IO = 100mA
VSS + 0.1
VSS + 0.5
V
5, 21
IDDH
High Level Supply Current VO Open, IF = 10 to 16mA
2.9
5
mA
7, 8, 22
IDDL
Low Level Supply Current
VO Open, VF = 0 to 0.8V
2.8
5
mA
7, 8, 23
IFLH
Threshold Input Current
Low to High
IO = 0mA, VO > 5V
2.4
7.5
mA
9, 15, 24
VFHL
Threshold Input Voltage
High to Low
IO = 0mA, VO < 5V
0.8
V
25
IF = 10mA, VO > 5V
11.5
12.7
14.5
V
17, 26
IF = 10mA, VO < 5V
10.0
11.2
13.0
V
17, 26
VUVLO+
VUVLOUVLOHYS
UnderVoltage Lockout
Threshold
UnderVoltage Lockout
Threshold Hysteresis
1.5
V
Notes:
7. In this test, VOH is measured with a dc load current of 100mA. When driving capacitive load VOH will approach VDD
as IOH approaches zero amps.
8. Maximum pulse width = 1ms, maximum duty cycle = 20%.
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
5
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Isolation Characteristics
Apply over all recommended conditions, typical value is measured at VDD = 30V, VSS = Ground, TA = 25°C unless
otherwise specified.
Symbol
Parameter
tPHL
Propagation Delay Time to
Logic Low Output(9)
tPLH
Propagation Delay Time to
Logic High Output(10)
PWD
Pulse Width Distortion(11)
|tPHL – tPLH|
PDD
(Skew)
Conditions
IF = 10mA to 16mA, Rg = 10Ω,
Cg =10nF, f = 10kHz,
Duty Cycle = 50%
Propagation Delay Difference
Between Any Two Parts(12)
Min.
Typ.
Max.
Units
Figure
100
285
500
ns
10, 11,
12, 13,
14, 27
100
260
500
ns
10, 11,
12, 13,
14, 27
25
300
ns
-350
350
tR
Output Rise Time
(10% to 90%)
60
ns
27
tF
Output Fall Time
(90% to 10%)
60
ns
27
0.8
µs
tULVO ON
tULVO OFF
ULVO Turn On Delay
IF = 10mA, VO > 5V
ULVO Turn Off Delay
IF = 10mA, VO < 5V
0.4
µs
|CMH|
Common Mode Transient
Immunity at Output High
TA = 25°C, VDD = 30V,
IF = 10 to 16mA, VCM = 2000V(13)
20
50
kV/µs
28
|CML|
Common Mode Transient
Immunity at Output Low
TA = 25°C, VDD = 30V, VF = 0V,
VCM = 2000V(14)
20
50
kV/µs
28
Notes:
9. tPHL propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the
falling edge of the VO signal.
10. tPLH propagation delay is measured from the 50% level on the rising edge of the input pulse to the 50% level of the
rising edge of the VO signal.
11. PWD is defined as | tPHL – tPLH | for any given device.
12. The difference between tPHL and tPLH between any two FOD8321 parts under same operating conditions, with equal
loads.
13. Common mode transient immunity at output high is the maximum tolerable negative dVcm/dt on the trailing edge of
the common mode impulse signal, Vcm, to assure that the output will remain high (i.e. VO > 15.0V).
14. Common mode transient immunity at output low is the maximum tolerable positive dVcm/dt on the leading edge of
the common pulse signal, Vcm, to assure that the output will remain low (i.e. VO < 1.0V).
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
6
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Switching Characteristics
Figure 2. Output High Voltage Drop vs. Ambient Temperature
0
VOH–VDD – OUTPUT HIGH VOLTAGE DROP (V)
VOH – V DD – OUTPUT HIGH VOLTAGE DROP (V)
Figure 1. Output High Voltage Drop vs. Output High Current
-0.5
-1.0
-1.5
TA = -40°C
-2.0
25°C
-2.5
100°C
-3.0
VDD = 15V to 30V
VSS = 0V
IF = 10mA to 16mA
f = 200Hz 0.2% Duty Cycle
-3.5
-4.0
0
0.5
1.0
1.5
2.0
2.5
0
-0.05
-0.10
-0.15
-0.20
VDD = 15V to 30V
VSS = 0V
IF = 10mA to 16mA
IO = -100mA
-0.25
-0.30
-40
-20
0
60
80
100
4
7
VOL – OUTPUT LOW VOLTAGE (V)
IOH – OUTPUT HIGH CURRENT (A)
40
Figure 4. Output Low Voltage vs. Output Low Current
Figure 3. Output High Current vs. Ambient Temperature
8
6
5
VO = V DD – 6V
4
VO = V DD – 3V
3
2
VDD = 15V to 30V
VSS = 0V
IF = 10mA to 16mA
f = 200Hz 0.2% Duty Cycle
1
0
-40
-20
0
VDD = 15V to 30V
VSS = 0V
IF = 0mA
f = 200Hz 99.8% Duty Cycle
3
TA = 100°C
25°C
2
-40°C
1
0
20
40
60
80
100
0
0.5
Figure 5. Output Low Voltage vs. Ambient Temperature
2.0
2.5
8
IOL – OUTPUT LOW CURRENT (A)
VDD = 15V to 30V
VSS = 0V
VF = 0V or 0.8V
IO = 100mA
0.15
0.10
0.05
0
-40
1.5
Figure 6. Output Low Current vs. Ambient Temperature
0.25
0.20
1.0
IOL – OUTPUT LOW CURRENT (A)
TA – AMBIENT TEMPERATURE (°C)
VOL – OUTPUT LOW VOLTAGE (V)
20
TA – AMBIENT TEMPERATURE (°C)
IOH – OUTPUT HIGH CURRENT (A)
-20
0
20
40
60
80
VO = V SS + 6V
4
VO = VSS + 3V
2
0
-40
100
TA – AMBIENT TEMPERATURE (°C)
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
6
VDD = 15V to 30V
VSS = 0V
IF = 0A
f = 200Hz 99.8% Duty Cycle
-20
0
20
40
60
80
100
TA – AMBIENT TEMPERATURE (°C)
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7
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Typical Performance Characteristics
Figure 7. Supply Current vs. Ambient Temperature
Figure 8. Supply Current vs. Supply Voltage
3.6
VDD = 30V
VSS = 0V
IF = 10mA (for IDDH)
IF = 0mA (for IDDL)
3.2
IDD – SUPPLY CURRENT (mA)
IDD – SUPPLY CURRENT (mA)
3.6
IDDH
2.8
IDDL
2.4
2.0
-40
-20
0
20
40
60
80
IF = 10mA (for IDDH)
IF = 0mA (for IDDL)
VSS = 0V
TA = 25°C
3.2
IDDH
2.8
IDDL
2.4
2.0
15
100
20
TA – AMBIENT TEMPERATURE (°C)
Figure 9. Low to High Input Current Threshold
vs. Ambient Temperature
VDD = 15V to 30V
VSS = 0V
Output = Open
3.5
tP – PROPAGATION DELAY (ns)
IFLH – LOW TO HIGH INPUT CURRENT
THRESHOLD (mA)
500
3.0
2.5
2.0
1.5
1.0
-40
-20
0
20
40
60
80
IF = 10mA
Rg = 10Ω
Cg = 10nF
TA = 25°C
f = 10kHz 50% Duty Cycle
400
tPHL
300
tPLH
200
100
15
100
18
TA – AMBIENT TEMPERATURE (°C)
21
24
27
30
VDD – SUPPLY VOLTAGE (V)
Figure 12. Propagation Delay vs. Ambient Temperature
Figure 11. Propagation Delay vs. LED Forward Current
500
500
VDD = 30V
VSS = 0V
f = 10kHz 50% Duty Cycle
Rg = 10Ω
400 Cg = 10nF
TA = 25°C
tP – PROPAGATION DELAY (ns)
tP – PROPAGATION DELAY (ns)
30
Figure 10. Propagation Delay vs. Supply Voltage
4
tPHL
300
tPLH
200
100
25
VDD – SUPPLY VOLTAGE (V)
6
8
10
12
14
tPHL
300
tPLH
200
100
-40
16
IF – FORWARD LED CURRENT (mA)
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
400
VDD = 30V
VSS = 0V
IF = 10mA
f = 10kHz 50% Duty Cycle
Rg = 10Ω
Cg = 10nF
-20
0
20
40
60
80
100
TA – AMBIENT TEMPERATURE (°C)
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FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Typical Performance Characteristics (Continued)
Figure 14. Propagation Delay vs. Load Capacitance
500
VDD = 30V
VSS = 0V
IF = 10mA
f = 10kHz 50% Duty Cycle
400 Cg = 10nF
TA = 25°C
VDD = 30V
VSS = 0V
IF = 10mA
f = 10kHz 50% Duty Cycle
400 Rg = 10Ω
TA = 25°C
tP – PROPAGATION DELAY (ns)
tP – PROPAGATION DELAY (ns)
Figure 13. Propagation Delay vs. Series Load Resistance
500
tPHL
300
tPLH
200
100
0
10
20
30
40
tPLH
200
100
50
tPHL
300
0
20
Rg – SERIES LOAD RESISTANCE (Ω)
Figure 15. Transfer Characteristics
80
100
100
VDD = 30V
TA = 25°C
IF – FORWARD CURRENT (mA)
30
VO – OUTPUT VOLTAGE (V)
60
Figure 16. Input Forward Current vs. Forward Voltage
35
25
20
15
10
5
0
40
Cg – LOAD CAPACITANCE (nF)
0
1
2
3
4
10
100°C
1
0.1
0.01
0.001
0.6
5
-40°C
25°C
0.8
I F – FORWARD LED CURRENT (mA)
1.0
1.2
1.4
1.6
1.8
VF – FORWARD VOLTAGE (V)
Figure 17. Under Voltage Lockout
14
IF = 10mA
TA = 25°C
VO – OUTPUT VOLTAGE (V)
12
10
8
VUVLO = 11.56V
VUVLO = 13.12V
6
4
2
0
0
5
10
15
20
VDD–VSS – SUPPLY VOLTAGE (V)
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
9
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Typical Performance Characteristics (Continued)
Power Supply
+
+
C1
0.1μF
Pulse Generator
PW = 4.99ms
Period = 5ms
ROUT = 50Ω
VDD = 15V to 30V
C2
47μF
Pulse-In
1
6
IOL
R2
100Ω
Power Supply
+
5
D1
VOL
3
+
C3
0.1μF
V = 6V
C4
47μF
4
LED-IFmon
To Scope
R1
100Ω
Test Conditions:
Frequency = 200Hz
Duty Cycle = 99.8%
VDD = 15V to 30V
VSS = 0V
IF = 0mA
Figure 18. IOL Test Circuit
Power Supply
+
+
C1
0.1μF
VDD = 15V to 30V
C2
47μF
Pulse Generator
PW = 10μs
Period = 5ms
ROUT = 50Ω
Pulse-In
1
+
6
IOH
R2
100Ω
3
4
C4
47μF
Power Supply
V = 6V
–
5
D1
VOH
LED-IFmon
+
C3
0.1μF
Current
Probe
To Scope
R1
100Ω
Test Conditions:
Frequency = 200Hz
Duty Cycle = 0.2%
VDD = 15V to 30V
VSS = 0V
IF = 10mA to 16mA
Figure 19. IOH Test Circuit
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
10
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Test Circuit
1
6
0.1μF
+
–
VO
5
IF = 10 to 16mA
VDD = 15 to 30V
100mA
3
4
Figure 20. VOH Test Circuit
1
6
0.1μF
5
3
100mA
VO
+
–
VDD = 15 to 30V
4
Figure 21. VOL Test Circuit
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
11
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Test Circuit (Continued)
6
1
0.1μF
IF = 10 to 16mA
VO
5
3
+
–
VDD = 30V
+
–
VDD = 30V
4
Figure 22. IDDH Test Circuit
6
1
0.1μF
+
–
5
VF = -3.0 to 0.8V
VO
4
3
Figure 23. IDDL Test Circuit
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
12
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Test Circuit (Continued)
6
1
0.1μF
VO > 5V
5
+
–
VDD = 15 to 30V
+
–
VDD = 15 to 30V
IF
3
4
Figure 24. IFLH Test Circuit
1
6
0.1μF
+
–
VO
5
VF = –3.0 to 0.8V
3
4
Figure 25. VFHL Test Circuit
1
6
0.1μF
IF = 10mA
5
3
VO = 5V
+
–
15V or 30V
VDD Ramp
4
Figure 26. UVLO Test Circuit
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
13
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Test Circuit (Continued)
6
1
0.1μF
5
VO
+
–
Rg = 10Ω
Probe
f = 10KHz
DC = 50%
3
4
+
–
VDD = 15 to 30V
+
–
VDD = 30V
Cg = 10nF
50Ω
IF
tR
tF
90%
50%
VOUT
10%
tPLH
tPHL
Figure 27. tPHL, tPLH, tR and tF Test Circuit and Waveforms
IF
A
6
1
B
5V
0.1μF
+
–
5
3
VO
4
+–
VCM = 2,000V
VCM
0V
Δt
VO
VOH
Switch at A: IF = 10mA
VO
VOL
Switch at B: IF = 0mA
Figure 28. CMR Test Circuit and Waveforms
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
14
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Test Circuit (Continued)
Part Number
Package
Packing Method
FOD8321
Wide Body SOP 5-Pin
Tube (100 units per tube)
FOD8321R2
Wide Body SOP 5-Pin
Tape and Reel (1,000 units per reel)
FOD8321V
Wide Body SOP 5-Pin, DIN EN/IEC60747-5-5 Option Tube (100 units per tube)
FOD8321R2V
Wide Body SOP 5-Pin, DIN EN/ IEC60747-5-5 Option Tape and Reel (1,000 units per reel)
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
1
2
3
8321 V
D X YY KK W
4
6
5
8
7
Definitions
1
Fairchild logo
2
Device number, e.g., ‘8321’ for FOD8321
3
DIN EN/IEC60747-5-5 Option (only appears on
component ordered with this option)
4
Plant code, e.g., ‘D’
5
Last digit year code, e.g., ‘C’ for 2012
6
Two digit work week ranging from ‘01’ to ‘53’
7
Lot traceability code
8
Package assembly code, W
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
15
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Ordering Information
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Reflow Profile
Temperature (°C)
TP
260
240
TL
220
200
180
160
140
120
100
80
60
40
20
0
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
tP
Tsmax
tL
Preheat Area
Tsmin
ts
120
240
360
Time 25°C to Peak
Time (seconds)
Profile Freature
Pb-Free Assembly Profile
Temperature Min. (Tsmin)
150°C
Temperature Max. (Tsmax)
200°C
Time (tS) from (Tsmin to Tsmax)
60–120 seconds
Ramp-up Rate (tL to tP)
3°C/second max.
Liquidous Temperature (TL)
217°C
Time (tL) Maintained Above (TL)
60–150 seconds
Peak Body Package Temperature
260°C +0°C / –5°C
Time (tP) within 5°C of 260°C
30 seconds
Ramp-down Rate (TP to TL)
6°C/second max.
Time 25°C to Peak Temperature
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
8 minutes max.
www.fairchildsemi.com
16
0.60
4.15
3.15
2.05
6
4
1.27
D
A
6
4
1.27
4.33
11.80
10.80
9.30
8.30
2.54
1
0.33 C
2.54
5X 0.51
0.31
B
0.25
5 TIPS
C A-B D
A
2.65
2.45
0.10 C
LAND PATTERN
RECOMMENDATION
3
1
PIN ONE
INDICATOR
3
SEATING
PLANE
2.95 MAX
0.10 C
0.30
0.10
5X
C
NOTES: UNLESS OTHERWISE SPECIFIED
(1.25)
GAUGE
PLANE
0.25
8°
0°
C
(R1.29)
1.04
0.44
A) THIS PACKAGE DOES NOT
CONFORM TO ANY STANDARD.
(R0.54 B) ALL DIMENSIONS ARE IN
)
MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF
BURRS, MOLD FLASH AND TIE BAR
PROTRUSIONS
0.25 D) DRAWING CONFORMS TO ASME
0.19
Y14.5M-1994
E) DRAWING FILE NAME:
MKT-M05BREV1
SEATING PLANE
SCALE: 3.2:1
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
www.fairchildsemi.com
17
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Package Dimensions
Do
t
Po
P2
E
F
d
W1
W
Bo
K1
Ko
P
Ao
User Direction of Feed
Symbol
W
t
Description
Tape Width
Dimmension in mm
24.00 + 0.20 / -0.10
Tape Thickness
0.30 ± 0.05
Po
Sprocket Hole Pitch
Do
Sprocket Hole Diameter
1.50 + 0.10 / -0.00
D1
Pocket Hole Diameter
1.50 + 0.25 / -0.00
4.00 ± 0.20
E
Sprocket Hole Location
1.75 ± 0.10
F
Pocket Location
11.50 ± 0.10
P2
2.00 ± 0.10
P
Pocket Pitch
8.00 ± 0.10
Ao
Pocket Dimension
4.50 ± 0.10
Bo
12.00 ± 0.10
Ko
3.35 ± 0.10
K1
2.85 ± 0.10
W1
d
Cover Tape Width
21.30 ± 0.10
Cover Tape Thickness
0.05 ± 0.01
Max Component Rotation or Tilt
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4
D1
10°
www.fairchildsemi.com
18
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
Carrier Tape Specification (SOIC-5L OPTO R2 & R2V Option)
FOD8321 — 2.5A Output Current, Gate Drive Optocoupler in Optoplanar® Wide Body SOP 5-Pin
19
www.fairchildsemi.com
©2010 Fairchild Semiconductor Corporation
FOD8321 Rev. 1.0.4