ICST ICS650R-07T Broadcom clock source Datasheet

ICS650-07B
Broadcom Clock Source
Description
Features
The ICS650-07B is a low cost, low jitter, high
performance clock synthesizer customized for
Broadcom. Using analog Phase-Locked Loop
(PLL) techniques, the device accepts a 25.00 MHz
clock or fundamental mode crystal input to
produce multiple output clocks of 25.0 MHz, two
125.0 MHz, 133.33 MHz, and a selectable
33.3/66.6 MHz clock. All output clocks are
frequency locked together. The ICS650-07B
outputs all have 0 ppm synthesis error.
Do not use the 125 MHz outputs to drive Gigabit
Ethernet SERDES. Instead, the 25 MHz clock
can be driven into our ICS601 in the X5 mode.
The ICS601 has low enough jitter and phase noise
for all popular SERDES.
• Packaged in 20 pin narrow (150 mil) SSOP (QSOP)
• 25.00 MHz fundamental crystal or clock input
• Four fixed output clocks of 25 MHz, 133.33 MHz,
and two copies of 125 MHz
• One selectable output clock of 33.3 or 66.6 MHz
• Zero ppm synthesis error in all clocks
• PCI clock switching occurs within 1 µs
• Ideal for Broadcom’s BCM5600 chipset
• Full CMOS output swing
• Advanced, low power, sub-micron CMOS process
• 3.0 V to 5.5 V operating voltage
Block Diagram
VDD
GND
4
3
PS
Clock Synthesis
and Control
Circuitry
25.00 MHz
crystal or clock
X1
X2
Clock
Buffer/
Crystal
Oscillator
Output
Buffer
PCI CLK
Output
Buffer
125.00 MHz
Output
Buffer
125.00 MHz
Output
Buffer
133.33 MHz
Output
Buffer
25.00 MHz
OE (all outputs)
Optional crystal capacitors are shown and may be required for tuning of initial accuracy (determined once per board).
1
Revision 042600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel • www.icst.com
MD S 650-07B A
ICS650-07B
Broadcom Clock Source
Pin Assignment
PS
X2
X1/ICLK
VDD
DC
GND
125M
125M
DC
133M
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDD
VDD
25M
PCICLK
VDD
OE
GND
DC
DC
GND
PCI CLK Output Select Table
PS
Pin 1
0
1
PCICLK
Pin 17
33.33 MHz
66.66 MHz
0 = connect directly to GND
1 = connect directly to VDD
20 pin (150 mil) SSOP
Pin Descriptions
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
PS
X2
X1/ICLK
VDD
DC
GND
125M
125M
DC
133M
GND
DC
DC
GND
OE
VDD
PCICLK
25M
VDD
VDD
Type
I
XO
XI
P
P
O
O
O
P
P
I
P
O
O
P
P
Description
PCI Clock frequency select input. Determines PCI CLK output per table above.
Crystal connection. Connect to 25 MHz crystal or leave unconnected for a clock input.
Crystal connection. Connect to 25 MHz fundamental crystal or clock input.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
Don't Connect. Do not connect anything to this pin.
Connect to ground.
125.0 MHz clock output. Cannot be used for Gigabit Ethernet SERDES.
125.0 MHz clock output. Cannot be used for Gigabit Ethernet SERDES.
Don't Connect. Do not connect anything to this pin.
133.33 MHz clock output.
Connect to ground.
Don't Connect. Do not connect anything to this pin.
Don't Connect. Do not connect anything to this pin.
Connect to ground.
Output Enable. Tri-states all outputs when low. Internal pull-up.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
PCI Clock output per table above.
25.0 MHz buffered reference clock output.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
Key: XI, XO = crystal connections; I = Input; O = Output; P = power supply connection
2
Revision 042600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel • www.icst.com
MD S 650-07B A
ICS650-07B
Broadcom Clock Source
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
7
VDD+0.5
70
260
150
V
V
°C
°C
°C
5.5
V
V
V
V
V
V
V
V
mA
mA
kΩ
ABSOLUTE MAXIMUM RATINGS (n
note 1)
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Referenced to GND
Referenced to GND
-0.5
0
Max of 20 seconds
-65
DC CHARACTERISTICS (VDD = 3.3 V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH, X1 pin only
Input Low Voltage, VIL, X1 pin only
Input High Voltage, VIH, PS pin only
Input Low Voltage, VIL, PS pin only
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD
Short Circuit Current
Internal pull-up resistor
3
VDD/2 + 1
VDD/2
VDD/2
VDD/2 - 1
VDD-0.5
0.5
IOH=-12 mA
IOL=12 mA
IOH=-4 mA
No Load
Each output
PS, OE
2.4
0.4
VDD-0.4
35
±50
200
AC CHARACTERISTICS (VDD = 3.3 V unless noted)
Input Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Frequency error
Absolute Jitter, short term
Notes:
25.000
0.8 to 2.0 V
2.0 to 0.8 V
At VDD/2
All clocks
Variation from mean
40
50
±200
1.5
1.5
60
0
MHz
ns
ns
%
ppm
ps
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
External Components
The ICS650-07B requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01µF should be connected between each VDD and GND, as close to the ICS650-07B as
possible. A series termination resistor of 33 Ω may be used for each clock output. The 25.00 MHz crystal
must be connected as close to the chip as possible. The crystal should be a fundamental mode (do not use
third overtone), parallel resonant. Crystal capacitors should be connected from pins X1 to ground and X2
to ground to optimize the initial accuracy. The value of these capacitors is given by the following equation,
where CL is the crystal load capacitance: Crystal caps (pF) = (CL-6) x 2. So for a crystal with 16 pF load
capacitance, two 20 pF caps should be used.
3
Revision 042600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel • www.icst.com
MD S 650-07B A
ICS650-07B
Broadcom Clock Source
Package Outline and Package Dimensions
(For current dimensional specifications, see JEDEC Publication No. 95.)
20 pin SSOP
E1
INDEX
AREA
1
2
E
Inchees
Min
Max
0.053 0.069
0.004 0.010
0.008 0.012
0.007 0.010
0.337 0.344
.025 BSSC
0.228 0.244
0.150 0.157
0.016 0.050
Symbol
A
A1
b
c
D
e
E
E1
L
Millim
meters
Min
Max
1.35
1.75
0.10
0.25
0.20
0.30
0.19
0.25
8.56
8.74
0.635 BSC
5.79
6.20
3.81
3.99
0.41
1.27
D
A
c
A1
e
b
L
Ordering Information
Part/Order Number
ICS650R-07
ICS650R-07T
Marking
ICS650R-07
ICS650R-07
Shipping packaging
tubes
tape and reel
Package
20 pin SSOP
20 pin SSOP
Temperature
0-70°C
0-70°C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc (ICS) assumes no responsibility for either its use or for
the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental
requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize
or warrant any ICS product for use in life support devices or critical medical instruments.
4
Revision 042600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel • www.icst.com
MD S 650-07B A
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