TI1 LM2476 Monolithic triple channel 6.5 ns high gain crt driver and bias clamp Datasheet

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LM2476 Monolithic Triple Channel 6.5 ns High Gain CRT Driver and Bias Clamp
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FEATURES
DESCRIPTION
•
The LM2476 is a monolithic triple channel CRT driver
and triple bias clamp for low-cost color monitor
applications. The highly integrated IC contains three
wide-band amplifiers for driving the RGB cathodes of
a CRT through external coupling capacitors and three
low-band clamp amplifiers for DC restoration and
cutoff adjustment of the video outputs. The CRT
drivers have a high, fixed gain of -27 and can drive
CRT capacitive loads as well as resistive loads
present in other applications, limited only by the
package's power dissipation.
1
2
•
•
•
•
Well-Matched to the LM123X/4X Family of
Preamplifiers
Operates with VCC = 60V to 90V
Convenient TO-220 Staggered Lead Package
Style
CRT Drivers
– High Gain of –27 for up to 60VP-P Output
Swing
– Stable with Capacitive Loads and Inductive
Peaking Networks
Bias Clamps
– Gain of –17 for up to 60V DC Output Range
APPLICATIONS
•
•
•
The IC is packaged in a 19-lead TO-220 molded
plastic package and must be operated with a properly
chosen heat sink. See the Package Mounting and
Thermal
Considerations
sections
for
more
information.
1024 x 768 Displays up to 85 Hz Refresh Rate
Pixel Clock Frequencies up to 95 MHz
Monitors Using Video Blanking
Pinout Diagram and Pin Descriptions
19
VCC
VBB
CRT DRIVER
1 CH
VBB
BIAS CLAMP
1 CH
IND
Driver Input Pins (1, 3, 4)
INC
Clamp Input Pins (6, 7, 8)
Bias Voltage Pin (2)
OUTD1
18
GND
VBB
17
OUTD2
VCC
Supply Voltage Pin (14)
16
GND
GND (1)
Ground Pins (5, 10, 12, 16, 18)
15
OUTD3
OUTC
Clamp Output Pins (9, 11, 13)
OUTD
Driver Output Pins (15, 17, 19)
14
VCC
Pin Name Pin Description
VCC
13
OUTC1
12
GND
11
OUTC2
10
GND
9
OUTC3
8
INC3
7
INC2
6
INC1
5
GND
4
IND3
3
IND2
2
1
VBB
IND1
Note: Tab is at GND
19 Pin TO-220 Package
See Package Number NDN
(1)
Note: All GND pins should be connected together via low HF
impedance traces on the PCB.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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Schematic Diagrams
Figure 1. CRT Driver Simplified Schematic (One Channel)
Figure 2. Bias Clamp Simplified Schematic (One Channel)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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ABSOLUTE MAXIMUM RATINGS (1) (2) (3)
Supply Voltage (VCC)
96V
Bias Voltage (VBB)
10V
Driver Input Voltage (VIND)
0V to 4.5V
Clamp Input Voltage (VINC)
0V to 5.0V
−65°C to +150°C
Storage Temperature Range (TSTG)
Lead Temperature (Soldering, <10 sec.)
ESD Tolerance
(1)
(2)
(3)
300°C
Human Body Model
2 KV
Machine Model
200V
All voltages are measured with respect to GND, unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
OPERATING RANGES (1)
VCC
60V to 85V
VBB
7V to 9V
VIND
0V to 3.5V
VINC
0V to 4.0V
VOUTD (Driver Output Voltage)
12V to VCC
VOUTC (Clamp Output Voltage)
12V to VCC
Case Temperature (device tab)
−20°C to +100°C
Do not operate the part without a heat sink.
(1)
Operating ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured
specifications and test conditions, see the Electrical Characteristics. Datasheet min/max specification limits are ensured by design, test,
or statistical analysis. The ensured specifications apply only for the test conditions listed. Some performance characteristics may change
when the device is not operated under the listed test conditions.
ELECTRICAL CHARACTERISTICS
(See Figure 3 for Test Circuit)
Unless otherwise noted: VCC = 85V, VBB = 8V, CL = 8 pF, TC = 40°C
DC Tests: VIND = 2.30V, VINC = 2.35V
AC Tests: VOUTD = 40VP-P (35V – 75V) at 1 MHz, VINC = 2.35V
Symbol
Parameter
Conditions
LM2476
Min
Typical
Max
Units
ICC
Supply Current
All Three Channels, No AC Input Signal, No Output Load
34
45
mA
IBB
Bias Current
All Three Channels, No AC Input Signal, No Output Load
21
30
mA
VOUTD,
1
Driver DC Output Voltage
No AC Input Signal, VIND = 2.30V
41
46
51
V
VOUTD,
2
Driver DC Output Voltage
No AC Input Signal, VIND = 1.15V
72
77
82
V
Driver DC Voltage Gain
No AC Input Signal
–24
–27
–30
AV-OUTD
ΔAV-OUTD Driver Gain Matching
No AC Input Signal (1)
LEOUTD
Driver Linearity Error
No AC Input Signal (1) (2)
tR
Rise Time
tF
1.0
dB
5
%
10% to 90% (3)
6.0
ns
Fall Time
90% to 10% (3)
6.7
ns
OS
Overshoot
See (3)
VOUTC
Clamp DC Output Voltage VINC = 2.35V
VOUTCRANGE
Clamp DC Output Voltage VINC-RANGE = 0.5V to 4.0V
Range
AV-OUTC
Clamp DC Voltage Gain
No AC Input Signal
LEOUTC
Clamp Linearity Error
No AC Input Signal (1) (2)
(1)
(2)
(3)
3
46
51
%
56
58
–14.5
–16.5
V
VDC
–18.5
5
%
Calculated value from Voltage Gain test on each channel.
Driver Linearity Error is the variation in dc gain from VIND = 1.1V to VIND = 3.6V.
Input from signal generator: tr, tf < 1 ns.
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LM2476 TEST CIRCUITS
+8V
+
Input from
Pulse
Generator
47 PF
+85V
0.1 PF
0.01 PF
0.1 PF
2
+
VBB VCC
100:
0.47 PF
1, 3, 4
1 k:
50:
47 PF
Test
Point
14
VBIAS
VIND
VOUTD
1 k:
0.1 PF
6, 7, 8
VOUTC 9, 11, 13
VINC
GND
2.49 k: 0.1 PF
Output to
50: Scope
15, 17, 19
LM2476
VDC
2.49 k:
CL = 8 pF
Test
Point
+85V
CCOMP
50:
470:
0.1 PF
330 k:
5, 10, 12,
16, 18
Note: 8 pF load includes parasitic capacitance.
Figure 3. CRT Driver and Bias Clamp Test Circuits (One Channel)
Figure 3 shows a typical test circuit to evaluate the LM2476 CRT Driver and Bias Clamp electrical characteristics.
The driver test circuit is designed to allow for testing the transient response in a 50Ω environment without the use
of an expensive FET probe. An input from a 50Ω pulse generator output can be AC coupled and biased with an
external supply via the VBIAS input. The two 2.49 kΩ resistors form a 200:1 divider with the 50Ω resistor and the
oscilloscope. The clamp test circuit is designed to allow for testing the clamp outputs. A clamp input can be
biased with an external supply via the VDC input and a high impedance voltmeter (>100MΩ) can be used to
measure the DC voltage at the clamp outputs. Test points can included to accommodate voltmeter or
oscilloscope probes.
4
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TYPICAL PERFORMANCE CHARACTERISTICS
(VCC = 85V, VBB = 8V, CL = 8 pF, VOUTD = 40VP-P (35V − 75V), VINC = 2.35V, Test Circuit - Figure 3 unless otherwise specified)
VOUTD vs VIND
VOUTC vs VINC
90
90
80
80
70
70
VOUTC (V)
100
VOUTD (V)
100
60
50
40
60
50
40
30
30
20
20
10
10
0
0
0
1
2
3
4
5
0
1
2
3
VIND (V)
VINC (V)
Figure 4.
Figure 5.
LM2476 Pulse Response
4
5
Speed vs Offset
7.50
7.25
7.00
tF
10V/DIV
SPEED (ns)
6.75
6.50
6.25
6.00
tR
5.75
5.50
5.25
5.00
50 51 52 53 54 55 56 57 58 59 60
30 ns/DIV
OFFSET VOLTAGE (VDC)
Figure 6.
Figure 7.
Speed vs Load Capacitance
10.0
Speed vs Temperature
7.5
9.0
7.0
tF
tF
SPEED (ns)
SPEED (ns)
8.0
7.0
tR
6.5
6.0
tR
6.0
5.0
4.0
5.5
8
10
12
14
16
18
20
LOAD CAPACITANCE (pF)
40
50
60
70
80
90
100
CASE TEMPERATURE (°C)
Figure 8.
Figure 9.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
(VCC = 85V, VBB = 8V, CL = 8 pF, VOUTD = 40VP-P (35V − 75V), VINC = 2.35V, Test Circuit - Figure 3 unless otherwise specified)
Power Dissipation vs Frequency
10
POWER DISSIPATION (W)
9
8
7
6
5
4
3
2
1
0
0
10 20 30 40 50 60 70 80 90 100
FREQUENCY (MHz)
(72% ACTIVE TIME)
Figure 10.
6
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THEORY OF OPERATION
The LM2476 is a high voltage monolithic three channel CRT driver and triple bias clamp suitable for low-cost
color monitor applications. The LM2476 operates with 85V and 8V power supplies. The part is housed in the 19lead TO-220 molded plastic power package. The pinout and internal connection diagram is shown in .
The CRT Driver circuit diagram is shown in . The PNP emitter follower, Q5, provides input buffering. Q1 and Q2
form a fixed gain cascode amplifier with resistors R1 and R2 setting the gain at −27. Emitter followers Q3 and Q4
isolate the high output impedance of the cascode stage from the capacitance of the CRT cathode which
decreases the sensitivity of the device to load capacitance. Q6 provides biasing to the output emitter follower
stage to reduce crossover distortion at low signal levels. The typical driver DC transfer function is shown in
Figure 4.
The Bias Clamp circuit diagram is shown in Figure 2. The clamp circuit amplifies the DC inputs, VINC, by the
internally fixed gain of –16.5. Each clamp output, VOUTC, will require a pull-up resistor to VCC. The typical clamp
DC transfer function is shown in Figure 5.
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APPLICATION HINTS
INTRODUCTION
Texas Instruments is committed to provide application information that assists our customers in obtaining the
best performance possible from our products. The following information is provided in order to support this
commitment. The reader should be aware that the optimization of performance was done using a specific printed
circuit board designed at TI. Variations in performance can be realized due to physical changes in the printed
circuit board and the application. Therefore, the designer should know that component value changes may be
required in order to optimize performance in a given application. The values shown in this document can be used
as a starting point for evaluation purposes. When working with high bandwidth circuits, good layout practices are
also critical to achieving maximum performance.
IMPORTANT INFORMATION
The LM2476 performance is targeted for the VGA (640 x 480) to XGA (1024 x 768, 85Hz) resolution market. The
application circuits shown in this document to optimize performance and to protect against damage from CRT
arcover are designed specifically for the LM2476. If another member of the TI CRT Driver or Bias Clamp family is
used, please refer to its data sheet.
POWER SUPPLY BYPASS
Since the LM2476 contains wide bandwidth video amplifiers, proper power supply bypassing is critical for
optimum performance. Improper power supply bypassing can result in large overshoot, ringing or oscillation. 0.1
µF capacitors should be connected from the supply pins, VCC and VBB, to ground, as close to the LM2476 as is
practical. Additionally, a 47 µF or larger electrolytic capacitor should be connected from both supply pins to
ground reasonably close to the LM2476. For optimal supply bypassing, the bypass capacitors should have the
shortest connections between the supply and ground pins of the LM2476.
ARC PROTECTION
During normal CRT operation, internal arcing may occasionally occur. A spark gap SG1 – in the range of 200V –
connected from each of the CRT cathodes to CRT ground will limit the maximum voltage, but to a value that is
much higher than allowable on the LM2476. This fast, high voltage, high energy pulse can damage the LM2476
driver and/or clamp output stages. The application circuit shown in Figure 11 is designed to help clamp the
voltage at the outputs of the LM2476 to a safe level. The arc protection clamp diodes, D1 and D2, should have a
fast transient response, high peak current rating, low series impedance and low shunt capacitance. FDH400 or
equivalent diodes are recommended. Do not use 1N4148 diodes for the clamp diodes. D1 and D2 should have
short, low impedance connections to VCC and ground respectively. The cathode of D1 should be located very
close to a separately decoupled bypass capacitor (C1 in Figure 11). The ground connection of D2 and the
decoupling capacitor should be closest to the CRT ground. This will significantly reduce the high frequency
voltage transients that the LM2476 would be subjected to during an arcover condition. Resistor R2 limits the
arcover current that is seen by the diodes while R1 limits the current into the LM2476 as well as the voltage
stress at the outputs of the device. R2 should be a ½W solid carbon type resistor. R1 can be a ¼W metal or
carbon film type resistor. Having large value resistors for R1 and R2 would be desirable, but this has the effect of
increasing rise and fall times. Inductor L1 is critical to reduce the initial high frequency voltage levels that the
LM2476 would be subjected to. The inductor will not only help protect the device but it will also help minimize
rise and fall times as well as minimize EMI. Current-limiting resistor R3 and bypass capacitor C2 should be
placed very close to the clamp output pins to protect the LM2476 against damage during an arcover condition.
The ground connection of C2 should have a short return path to CRT ground to shunt arcover currents away
from the LM2476. For proper arc protection, it is important to not omit any of the arc protection components
shown in Figure 11.
8
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+8V
+
47 PF
+85V
0.1 PF
0.1 PF
2
14
VBB
1, 3, 4
6, 7, 8
VOUTC
VINC
R1
L1
100:
0.33 PH
D2
GND
R2
9, 11, 13
Cathode
R3
470:
0.1 PF
330 k:
15, 17, 19
LM2476
1 k:
Clamp In
VOUTD
VIND
C1
0.1 PF
47 PF
D1
VCC
100:
Video In
+
1 PF
NP
33:
D3
SG1
C2
0.1 PF
5, 10, 12,
16, 18
Figure 11. One Channel of the LM2476 with the Recommended Application Circuit
OPTIMIZING TRANSIENT RESPONSE
Referring to Figure 11, there are three components (R1, R2 and L1) that can be adjusted to optimize the
transient response of the application circuit. Increasing the values of R1 and R2 will slow the circuit down while
decreasing overshoot. Increasing the value of L1 will speed up the circuit as well as increase overshoot. It is very
important to use inductors with very high self-resonant frequencies, preferably above 300 MHz. Ferrite core
inductors from J.W. Miller Magnetics (part # 78FR--k) were used for optimizing the performance of the device in
the NSC application board. The values shown in Figure 13 can be used as a good starting point for the
evaluation of the LM2476. Using a variable resistor for R1 will simplify finding the value needed for optimum
performance in a given application. Once the optimum value is determined, the variable resistor can be replaced
with a fixed value.
EFFECT OF OFFSET
Figure 7 shows the variation in rise and fall times when the output offset of the device is varied from 50 to
60VDC. The rise time shows a maximum variation of 13% relative to the center data point (55 VDC). The fall time
shows a maximum variation of less than 3% relative to the center data point.
EFFECT OF LOAD CAPACITANCE
Figure 8 shows the effect of increased load capacitance on the speed of the device. This demonstrates the
importance of knowing the load capacitance in the application.
THERMAL CONSIDERATIONS
Figure 9 shows the performance of the LM2476 in the test circuit shown in Figure 3 as a function of case
temperature (on the device tab). The figure shows that the rise and fall times of the LM2476 increase by
approximately 10% and 5%, respectively, as the case temperature increases from 50°C to 100°C. This
corresponds to a speed degradation of 2% and 1%, respectively, for every 10°C rise in case temperature.
Figure 10 shows the maximum power dissipation of the LM2476 vs. Frequency when all three channels of the
device are driving an 8 pF load with a 40 VP-P alternating one pixel on, one pixel off signal. The graph assumes a
72% active time (device operating at the specified frequency) which is typical in a monitor application. The other
28% of the time the device is assumed to be sitting at the black level (75V in this case). This graph gives the
designer the information needed to determine the heat sink requirement for his application. The designer should
note that if the load capacitance is increased the AC component of the total power dissipation will also increase.
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The LM2476 case temperature must be maintained below 100°C. If the maximum expected ambient temperature
is 70°C and the maximum power dissipation is about 6W (from Figure 10, 95 MHz bandwidth), then a maximum
heat sink thermal resistance can be calculated:
RTH =
100°C - 70°C
= 5°C/W
6W
(1)
PACKAGE MOUNTING CONSIDERATIONS
Mounting of the TO-220 package to a heat sink must be done such that there is sufficient pressure from the
mounting screws to insure good contact with the heat sink for efficient heat flow. The surface of the heat sink
should be free of contaminants before mounting to insure good contact. Incorrect mounting may lead to both
thermal and mechanical problems. Over tightening the mounting screws will cause the package to warp,
reducing contact area with the heat sink. Less contact with the heat sink will increase the thermal resistance from
the package case to the heat sink (θCS) resulting in higher operating die temperatures. Extreme over tightening of
the mounting screws will cause severe physical stress resulting in a cracked or chipped package and possible
catastrophic IC failure.
The recommended mounting screw size is M3 with a maximum torque of 50 N-cm. It is best to use fiber washers
under the screws to distribute the force over a wider area. Additionally, if the mounting screws are used to force
the package into correct alignment with the heat sink, package stress will be increased. This increase in package
stress will result in reduced contact area with the heat sink increasing die operating temperature and possible
catastrophic IC failure.
TYPICAL APPLICATION
10V/DIV
A typical application of the LM2476 is shown in Figure 13. Used in conjunction with an LM123X/4X preamplfier, a
complete video channel from monitor input to CRT cathode can be achieved. Performance is ideal for 1024 x
768 resolution displays with pixel clock frequencies up to 95 MHz. Please see the next two sections below for
hints on how to properly evaluate the LM123X/4X and LM2476 combination in a monitor. Figure 12 shows the
typical cathode response for this application. The peaking component values used are shown in Figure 11 and
Figure 13.
30 ns/DIV
40VP-P (35V – 75V)
Figure 12. Typical Cathode Response
10
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PC BOARD LAYOUT CONSIDERATIONS
For optimum performance, use single-point grounds systems with adequate ground planes, isolate between
channels, apply good supply bypassing, and minimize unwanted feedback and parasitic capacitance. Also, the
length of the video signal traces from the preamplifier to the LM2476 and from the LM2476 to the CRT cathodes
should be as short as possible. The following references are recommended:
Ott, Henry W., “Noise Reduction Techniques in Electronic Systems”, John Wiley & Sons, New York, 1976.
“Video Amplifier Design for Computer Monitors”, TI Application Note 1013.
Pease, Robert A., “Troubleshooting Analog Circuits”, Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may oscillate in a monitor if feedback occurs around the
video channel through the chassis wiring. To prevent this, leads to the video amplifier input circuit should be
shielded, and input circuit wiring should be spaced as far as possible from output circuit wiring.
TI DEMONSTRATION BOARD
Figure 13 is the schematic for the TI LM1276/3X/4X_2476 Demonstration PCB that can be used to evaluate the
LM1276, LM123X, or LM124X preamp with the LM2476 in a monitor. Figure 14 shows the routing and
component placement on the TI Demonstration PCB. This board provides a good example of a layout that can
be used as a guide for future layouts. Note the location of the following components:
• C26—VCC bypass capacitor, located very close to Pin 14 and GND Pins
• C27—VBB bypass capacitors, located close to Pin 2 and GND Pins
• C28, C30, C33—VCC bypass capacitors, near LM2476 and VCC clamp diodes. These are very important for
arc protection.
The routing of the LM2476 driver outputs to the CRT is very critical to achieving optimum performance. Figure 15
shows the routing and component placement from Pin 17 of the LM2476 to the Red cathode. Note that the
components are placed so that they almost line up from the output pin of the LM2476 to the Red cathode pin of
the CRT connector. This is done to minimize the length of the video path between these two components for
optimal performance and to minimize EMI. Note also that L4, D9, D13 and R23, R19, D10 are placed to minimize
the size of the video nodes that they are attached to. This minimizes parasitic capacitance in the video path and
also enhances the effectiveness of the protection diodes. The anode of protection diode D13 is connected
directly to a section of the ground trace that has a short and direct path to CRT ground to shunt arcover current
away from the LM2476. The cathode of D9 is connected to VCC very close to decoupling capacitor C30 (see
Figure 15) which is connected to the same section of the ground trace as D13. The diode placement and routing
is very important for minimizing the voltage stress on the LM2476 during an arcover event. R37 and C29 are
placed very close to the clamp output on Pin 11. These components will help limit the current and voltage stress
to the clamp output. Lastly, notice that S2 is placed very close to the Red cathode and is connected directly to
CRT ground.
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Figure 13. TI Demonstration PCB Schematic
12
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Figure 14. TI Demonstration PCB Layout
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Figure 15. Trace Routing and Component Placement for Red Channel Output
14
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REVISION HISTORY
Changes from Revision A (April 2013) to Revision B
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 14
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