MP4054A Primary-Side Control, Offline LED Controller with Active PFC, NTC and PWM Dimming DESCRIPTION FEATURES The MP4054A is a primary-side-control, offline LED lighting controller. In a tiny TSOT23-8 package, it achieves high power factor (PF) and accurate LED current for isolated, single-powerstage lighting applications. This simplifies LED-lighting-system design significantly by eliminating the secondary-side feedback components and the optocoupler. The MP4054A integrates power factor correction (PFC) and valley switching mode to reduce MOSFET switching losses. The MP4054A has NTC function and allows PWM dimming. To enhance system reliability and safety, the MP4054A has multiple internally integrated protection features, including over-voltage protection (OVP), short-circuit protection (SCP), primary-side over-current protection (OCP), brown-out protection, over-temperature protection (OTP), cycle-by-cycle current limit, VCC under-voltage lockout (UVLO), and autorestart function. Real-Current Control without SecondaryFeedback Circuit <2% Line/Load Regulation NTC Thermal Current Fold-Back PWM Dimming Available High PF (≥0.9) over Universal Input Voltage Valley Switching Mode for Improved Efficiency Brown-Out Protection Over-Voltage Protection Short-Circuit Protection Over-Temperature Protection Primary-Side Over-Current Protection Cycle-By-Cycle Current Limit VCC Under-Voltage Lockout Protection Auto-Restart Function Available in TSOT23-8 Package APPLICATIONS Solid-State Lighting Industrial and Commercial Lighting Residential Lighting All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION CIRCUIT MULT MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 1 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC ORDERING INFORMATION Part Number MP4054AGJ* Package TSOT23-8 Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MP4054AGJ–Z) TOP MARKING ALR: product code of MP4054AGJ; Y: year code. PACKAGE REFERENCE TSOT23-8 MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 2 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VCC ............................................. -0.3V to +30V GATE Drive Voltage .................... -0.3V to +17V CS/ZCD ........................................ -0.3V to 6.5V Other Analog Inputs and Outputs .. -0.3V to 6.5V Max. GATE Source Current ....................... 0.8A Max. GATE Sink Current ............................ -1A (2) Continuous Power Dissipation (TA = +25°C) TSOT23-8 ................................................ 1.25W Junction Temperature .............. -40C to +150C Lead Temperature ................................... 260°C Storage Temperature ............... -65°C to +150°C TSOT23-8………………... Recommended Operating Conditions (3) (4) θJA θJC 100.... 55.. °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Supply Voltage VCC ........................ 12V to 28V Operating Junction Temp. (TJ). -40°C to +125°C MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 3 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC ELECTRICAL CHARACTERISTICS Typical values are at VCC = 20V, TJ = +25°C, unless otherwise noted. Minimum and maximum values are at VCC = 20V, TJ = -40°C to +125°C, unless otherwise noted, guaranteed by characterization. Parameter Supply Voltage Symbol Condition Min Operating Range Turn-On Threshold Turn-Off Threshold Hysteretic Voltage Supply Current Start-Up Current Quiescent Current Operating Current Under Fault Condition Operating Current Multiplier Linear Operation Range Gain Brown-Out Protection Threshold Brown-Out Detection Time Brown-Out Protection Hysteretic Voltage VCC VCCON VCCOFF VCCHYS After turn on VCC rising edge VCC falling edge 12 23.0 8.4 14.2 ISTARTUP IQ VCC= VCCON -1V No switching ICC VMULT (5) K Typ Max Units 25.5 9.5 15.7 28 28.0 11.0 17.3 V V V V 20 0.6 50 0.85 µA mA No switching 2 fs =70kHz,CGATE=1nF 2 mA 0 3 mA 3 270 25 1.3 300 42 330 60 V 1/V mV ms 70 100 130 mV NTC High-Threshold Voltage Low-Threshold Voltage VH_NTC VL_NTC 1.17 0.67 1.23 0.77 1.29 0.87 V V Shutdown Threshold VSD_NTC 0.355 0.39 0.425 V 85 44 100 54 115 64 1 mV μA μA 0.401 0.413 0.425 V Shutdown-Voltage Hysteretic Pull-Up Current Source Leakage Current IPULL_UP ILEAKAGE Error Amplifier Reference Voltage Transconductance VREF (6) GEA 125 µA/V Upper Clamp Voltage VCOMP_H 4.5 4.75 5.1 V Lower Clamp Voltage VCOMP_L 1.42 1.5 1.58 V Max. Source Current Max. Sink Current (6) (6) ICOMP_SOURCE 50 µA ICOMP_SINK -200 µA MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 4 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC ELECTRICAL CHARACTERISTICS (continued) Typical values are at VCC = 20V, TJ = +25°C, unless otherwise noted. Minimum and maximum values are at VCC = 20V, TJ = -40°C to +125°C, unless otherwise noted, guaranteed by characterization. Parameter Symbol Condition Current Sense Comparator and Zero Current Detector CS/ZCD Bias Current Leading-Edge-Blanking Time Current-Sense Clamp Voltage Over-Current Protection, Leading-Edge-Blanking Time Over-Current Protection Threshold Zero-Current Detection Threshold Zero-Current Detect Hysteresis ZCD Blanking Time Typ Max Units IBIAS_CS/ZCD tLEB_CS VCS_CLAMP 290 1.9 400 2.0 500 650 2.1 nA ns V tLEB_CS_OCP 190 280 480 ns VCS_OCP 2.36 2.46 2.56 V 0.270 562 0.295 595 0.318 628 V mV 1.2 1.6 2.1 μs 0.6 0.8 1.1 μs 1.2 1.6 2.1 μs 0.6 0.8 1.1 μs 4.9 5.1 5.4 V 4 5.5 8 µs VZCD_T VZCD_HYS tLEB_ZCD Over-Voltage Blanking Time tLEB_OVP Over-Voltage Protection Threshold Minimum Off Time Starter VZCD_OVP VZCD falling edge After turn-off, (5) VMULT_O >0.3V After turn-off, VMULT_O ≤0.3V After turn-off, VMULT_O >0.3V After turn-off, VMULT_O ≤0.3V 1.6μs delay after turn-off tOFF_MIN Start-Timer Period Gate Driver tSTART Output-Clamp Voltage Minimum-Output Voltage (6) Max. Source Current (6) Max. Sink Current Thermal Shutdown Thermal Shutdown Threshold Thermal Shutdown Recovery (6) Hysteresis Min VGATE_CLAMP VCC=28V VGATE_MIN VCC=VCCOFF + 50mV IGATE_SOURCE IGATE_SINK (6) 190 13.0 6.7 14.5 µs 17.0 0.8 -1 V V A A TSD 150 °C THYS 25 °C Notes: 5) The multiplier output VMULT_O is given by: VCS=VMULT_O=K•VMULT• (VCOMP-1.5) 6) Guaranteed by characterization. MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 5 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC TYPICAL PERFORMANCE CHARACTERISTICS VIN = 90VAC to 264VAC, Isolated Flyback Converter, 6 LEDs in series, VOUT = 20V, ILED=350mA, TA = 25°C, unless otherwise noted. MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 6 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 90VAC to 264VAC, Isolated Flyback Converter, 6 LEDs in series, VOUT = 20V, ILED=350mA, TA = 25°C, unless otherwise noted. MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 7 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC PIN FUNCTIONS Pin # Name 1 VCC Power Supply Input. Supply power for the control signals and driving high-current MOSFET. Bypass to ground with an external bulk capacitor (typically 4.7µF). 2 MULT Multiplier Input. Connect to the tap of resistor divider between the rectified AC line and GND. The half-wave sinusoid provides a reference signal for the internal-current-control loop. MULT is used for brown-out protection detection. 3 NTC LED Temperature Protection. Connect an NTC resistor from this pin to GND can reduce the output current to protect the LED when ambient temperature rising high. Apply an external PWM signal on this pin can dim the LED with PWM mode. A 2.2nF to 4.7nF ceramic cap is recommended to connect from NTC to GND to bypass the high frequency noise when activate temperature protection. For PWM dimming, the cap can be removed. 4 COMP Loop Compensation Input. Connect a compensation network to stabilize the LED driver and maintain an accurate LED current. 5 GND 6 FB Feedback Input. If the accurate LED current is needed, connect this pin to the LEDcurrent-sensing resistor. CS/ZCD Current-Sense and Zero-Current Detection. This is a MPS proprietary dual function pin. When the gate driver turns on, CS/ZCD senses the MOSFET current. The difference between the sensed voltage and the internal sinusoidal-current-reference determines when the MOSFET turns off. When the gate driver turns off, the zero crossing (after blanking time) triggers GATE turnon signal. Connect CS/ZCD to a resistor divider through a diode between the auxiliary winding and GND. Output over-voltage condition is detected through ZCD. During every turn-off interval, if the ZCD voltage exceeds the over-voltage protection threshold, after the 1.6µs (VMULT_O>0.3V) or 0.8µs (VMULT_O≤0.3V) blanking time, over-voltage protection is triggered and the system stops switching until auto-restart. CS/ZCD is used for primary-side over-current protection. If the sensing voltage reaches 2.46V (after blanking time), the primary-side over-current protection is triggered and the system stops switching until auto-restart. A 10pF ceramic cap is recommended to connect CS/ZCD to GND to bypass the highfrequency noise. In order to reduce RC delay influence on the accuracy of the currentsensing signal, a 1kΩ down-side resistance (RZCD2 in Figure 7) from CS/ZCD is recommended. GATE Gate Drive Output. This totem-pole output stage can drive a high-power MOSFET with a peak current of 0.8A source and 1A sink. The high-voltage limit is clamped to 14.5V to avoid excessive gate-drive voltage. The drive-voltage is higher than 6.7V to guarantee a sufficient drive capacity. 7 8 Description Ground. Current return for the control signal and the gate-drive signal. MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 8 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC FUNCTION DIAGRAM N :1 EMI Filter MULT UVLO GND VCC Internal Power supply Peak detector Multiplier MULT_O GATE PWM generator Driver Q1 Brown out Brown out OTP Current Sense CS/ZCD COMP Current Limit OCP FB Real Current Control OVP OCP ZCD_OVP Detection 54µA NTC VREF Zero Crossing Detection Figure 1: MP4054A Function Block Diagram MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 9 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC OPERATION The MP4054A is a primary-side control, offline LED controller. It incorporates all the features of high-performance LED lighting. The LED current is controlled accurately with the realcurrent control method from primary-side information. Active power factor correction (PFC) eliminates unwanted harmonic noise on the AC line. The rich protection features achieve high safety and reliability in real application. VDRAIN VBUS+NVOUT VBUS Turn On IPRI Start Up ISEC/N Magnetizing Current Initially, the VCC cap is charged by the start-up resistor from the AC line. When VCC reaches 25.5V, the control logic activates and the gate driver signal begins to switch; the power supply is taken over by the auxiliary winding. tON tOFF VCS/ZCD The chip shuts down when VCC drops below 9.5V. 0 The high hysteretic voltage allows for a small VCC capacitor (typically 4.7μF) to shorten the start-up time. Figure 2: Valley Switching Mode Valley Switching Mode During the external MOSFET ON-time (tON), the rectified-input voltage (VBUS) charges the primary-side inductor (LP) causing the primaryside current (IPRI) to increase linearly from zero to peak value (IPK). When the MOSFET turns off, the energy stored in the inductor is transferred to the secondary-side, which activates the secondary-side diode to power the load. The secondary current (ISEC) decreases linearly from its peak value to zero. When the secondary current decreases to zero, the MOSFET drainsource voltage starts oscillating, which is caused by the primary-side magnetizing inductance and parasitic capacitances—the voltage ring also is reflected on the auxiliary winding (see Figure 2). To improve primarycontrol precision, the chip monitors when ZCD voltage falls to zero twice before the next switching period. The zero-current detector from CS/ZCD generates GATE turn-on signal when the ZCD voltage falls below 0.295V the second time (see Figure 3). Figure 3: Zero-Current Detector Real-Current Control The proprietary real-current-control method allows the MP4054A to control the secondaryside LED current using primary-side information. The mean value of the output LED current is calculated approximately as: Io N VREF 2 RS N—Turn ratio between primary side and secondary side; This virtually eliminates switch turn-on loss and diode reverse-recovery losses, ensuring high efficiency and low EMI noise. MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 10 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC VREF—The feedback (typical 0.413V); reference voltage RS—The sensing resistor connected between the MOSFET source and GND. Power-Factor Correction (PFC) MULT is connected to a pull-up resistor from the rectified-instantaneous-line voltage; the multiplier output is sinusoidal. This signal sets the sinusoidal primary side peak current. This achieves a high power factor (PF). Multiplier output Inductor current Figure 4: Power-Factor Correction The maximum output voltage of the multiplier is clamped to 2.0V, setting the cycle-by-cycle current limit. Auto Starter The MP4054A integrates an auto-restart that begins timing when the MOSFET turns off. If ZCD fails to send a turn-on signal after 190µs, a turn-on signal is initiated. This avoids an unnecessary IC shut down if ZCD misses detection. Minimum Off Time The MP4054A operates with variable switching frequency. The frequency changes with the input instantaneous line voltage. To limit the maximum frequency and enhance EMI performance, the chip employs an internal minimum OFF-time of 5.5µs. Leading-Edge Blanking (LEB) Internal leading-edge-blanking (LEB) is employed to prevent a switching pulse from terminating prematurely due to parasitic capacitance discharging when the MOSFET turns on. During the blanking time, the path from CS/ZCD to the current comparator input is blocked. Figure 6 shows the leading-edge blanking time. The LEB time of primary-side OCP detection is relatively short at 280ns. VCC Under-Voltage Lockout (UVLO) When the VCC voltage drops below the UVLO threshold 9.5V, the IC stops switching and shuts down; the operating current is very low under this condition. VCC is then charged by the external resistor from the AC line. Figure 5 shows the typical waveform of UVLO. VCC Protection happens Auxiliary Winding Takes Charge And Regulates the VCC Figure 6: Leading-Edge Blanking Output Over-Voltage Protection (OVP) 25.5 V 9.5 V 0 Internal Gate Switching Pulses Figure 5: VCC Under-Voltage Lockout Output over-voltage protection prevents component damage from over-voltage conditions. The auxiliary winding’s positive plateau voltage is proportional to the output voltage; the OVP uses the auxiliary-winding voltage instead of directly monitoring the output voltage. MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 11 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC Figure 7 shows the OVP circuit. Once the ZCD voltage is higher than 5.1V and exceeds the OVP blanking time (during the gate turn-off interval), the OVP signal is latched, turning the gate driver off. When VCC drops below UVLO, the IC restarts. The output OVP setting point is calculated as: VOUT _ OVP NAUX R ZCD2 5.1V NSEC RZCD1 RZCD2 VOUT_OVP—The protection point; NAUX— The auxiliary winding turns; NSEC— The secondary winding turns output over-voltage Gate_OFF CS/ZCD Latch 5.1V OVP Blanking time RZCD 2 If an output short occurs, ZCD cannot detect the transformer’s zero-current-crossing signal, so the 190μs auto-restart timer triggers the MOSFET’s turn-on signal. The switching frequency of the power circuit drops to about 5kHz and the output current is limited to its nominal current. The auxiliary-winding voltage drops to follow the secondary-winding voltage, VCC drops to less than the UVLO threshold, and then the system restarts. This sequence limits both the output power and IC temperature if an output short occurs. Primary-Side Over-Current Protection (OCP) Gate + - Output Short-Circuit Protection (SCP) R1 RZCD 1 The primary-side over-current protection prevents device damage from excessive current, such as a primary winding short circuit. If the CS/ZCD voltage rises to 2.46V during the gate turn-on interval (see Figure 9), the primary-side over-current protection signal is latched, turning the gate driver off. When VCC drops below UVLO, the IC restarts. Figure 7: OVP Sampling Unit To prevent a voltage spike from an OVP mistrigger, OVP sampling has a tLEB_OVP blanking period, typically 1.6µs when VMULT_O > 0.3V and 0.8µs when VMULT_O ≤ 0.3V (see Figure 8). Sampling Here VCS/ZCD 0V t LE B _OV P Figure 8: ZCD Voltage and OVP Sampler A current-limit resistor between the output of the auxiliary winding and the ZCD resistor divider also works as a suppresser to avoid an OVP mis-trigger. Figure 9: Primary-Side OCP Sampling Unit Brown-Out Protection The MP4054A has brown-out protection; the internal peak detector detects the peak value of the rectified sinusoid waveform on MULT. If the peak value is less than the brown-out protection threshold, 0.3V for typically 42ms, MP4054A identifies this as a brown-out, dropping COMP to zero and disabling the power circuit. If the peak value exceeds 0.4V, the IC restarts and the COMP voltage rises again softly. This feature prevents the transformer and LED current from saturating during fast ON/OFF switching (see Figure 10). MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 12 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC PWM Dimming The MP4054A can accept direct PWM dimming signal. Applying a PWM signal (>200Hz) on NTC pin can achieve dimming performance. Following the NTC curve of Figure 11, if the high level of the PWM signal is higher than VH_NTC, the internal reference voltage VREF is full scale. And if the low level of the PWM signal is lower than VSD_NTC, the internal reference voltage VREF is at the minimal value. Then the internal reference voltage of EA can be modulated as the external PWM dimming signal to capture the duty cycle information. Figure 10: Brown-Out Protection Waveforms To Multiplier COMP NTC Thermal Protection The NTC provides LED thermal protection. A NTC resistor to monitor the LED temperature can be connected to this pin directly. The internal pull-up resistor generates a corresponding voltage on the external NTC resistor, and the LED current changes as NTC voltage changes. Figure 11 shows the NTC curve. CCOMP EA NTC VREF Current Caculation PWM Signal CS Figure 12: PWM Dimming With large COMP cap, the loop response is slow. As long as the PWM frequency is higher than 200Hz, the duty cycle information can be filtered and averaged by COMP. Then, by the close loop control, the output LED current linearly changes with dimming duty from maximum to minimum. Io Iset VH_NTC VL_NTC 0 VSD_NTC Iset/3 VNTC IC Thermal Shut Down To prevent thermal damage to the system and IC, if internal temperatures exceed 150°C, the MP4054A stops switching and the IC is latched off until VCC drops below UVLO and restarts. Figure 11: NTC Curve If the NTC voltage drops below VSD_NTC, the LED current drops to minimum output, the minimum output current is determined by gate minimum on time. (equal to 400ns LEB time) MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 13 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC NON-ISOLATED APPLICATIONS Although isolated solutions can prevent electric shock from the grid when touching the load, they cause power loss and increase costs. Non-isolated solutions achieve higher efficiency and are highly cost-effective. BUS N1 Generally, the flyback converter is used for offline, isolated applications. For the nonisolated applications, a low-side buck-boost topology is used. The MP4054A can operate in both offline isolated and non-isolated LEDlighting applications (see Figure 19). Operation of Low-Side Buck-Boost The low-side buck-boost equates to a flyback converter with a 1:1 turn ratio transformer. As opposed to an isolated solution, there is not a separate primary and secondary winding, making a smaller core size. This saves cost and improves the efficiency of the driver. The Selection of FET & Rectifier Diode Since it is just an inductor for non-isolated solution, compared with isolated solution, at same output voltage, the power FET can be selected with lower voltage rating. But, oppositely, the voltage rating of rectifier diodes for output and aux-winding must be increased. Improvement of RF EMI C12 in Figure 19 is added for RF EMI improvement. The recommended value is from 10nF to 68nF with 630V rating. Improvement of PFC & THD The 1:1 ratio reduces the converter’s duty cycle using the same specifications. Based on the PFC principle in an isolated solution, the converter’s PF and THD drops. A non-isolated solution is suitable particularly for high-output voltage since the higher output voltage can extend the duty cycle to improve PF, THD and efficiency. For a non-isolated solution with low-output voltage, the tapped inductor can be applied to improve the PF and THD. N2 GATE CS Figure 13: Tapped-Inductor for Low-Side BuckBoost Solution Shown in Figure 13, the tapped-inductor includes two windings (N1 & N2) and a tap to connect the rectifier diode. When the power FET is turned on, the current goes through both of the windings. When the power FET is off, only N1 conducts the current through the rectifier diode. The stored energy of N2 is released by flux couple. The tapped inductor features a turn ratio similar to the transformer in an isolated solution. The nominal turns ratio is n N1 N2 1 N1 The duty cycle of the converter is extended by the tapped inductor, which makes the improved PF and THD available. Like the transformer, the snubber is necessary to clamp the voltage spike. However, the non-dimmable solution usually needs to cover the universal input range. The input range is very wide, from 85VAC to 264VAC. MULT is used to detect the inputvoltage signal, but the resistor divider of MULT MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 14 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC is fixed. At high-line input, the signal for MULT is very low, which results in an adverse affect on the internal multiplier sampling; this affects the PFC performance. input current at the top of BUS is increased while the input current at the zero-crossing is reduced. This results in the input current becoming more sinusoidal, improving THD. Figure 14 shows an improved circuitry on the MULT resistor divider; this adjusts the ratio of the divider to enhance THD. Operation of High-Side Buck/Buck-Boost BUS ZD1 RMULT1 RMULT3 The MP4054A features FB pin, which is used to receive the feedback signal of LED current directly. So, the MP4054A can be designed in high-side Buck or Buck-Boost application to achieve excellent LED current accuracy regulation, especially for very high load regulation requirement. Figure 20 is a 7.2W high-side Buck solution. MULT Multiplier RMULT2 COMP CCOMP Figure 14: THD Improved Circuitry The ZD1 is a HV Zener diode. The common voltage rating is from 80V to 130V. At low line input, ZD1 does not conduct. The MULT signal is: VMULT RMULT2 VBUS RMULT1 RMULT2 When the input voltage rises above ZD1 threshold, RMULT3 is paralleled with RMULT1 to increase the ratio of the divider; this raises the MULT signal. MULT After adding the circuit High-side Buck solution can achieve higher efficiency. But the system just works @ VIN>VOUT based on step-down converter’s operation. But the input voltage of PFC solution is a sinusoid wave. When VIN<VOUT, the gate keeps ON and VOUT drops, so the solution is suitable for the low VOUT application (relative to input voltage). And since the system is out of control at zero-crossing, it has adverse effect on THD. High-side Buck-boost’s operation is similar as low-side Buck-boost. With LED current sample, it can cover very wide output voltage range, like up to 100V voltage difference. Layout Considerations Solution of High-Side Since GND is not connected on a stable point but on switching for high-side solution, the noise impact is serious. Good layout is very important for high-side solution’s stable operation. The external feedback resistors should be placed next to the FB pin. And the switching loop is sensitive to noise, so the switch node traces should be short and away from the feedback network. The switching loop includes input/output caps, MOS & rectifier diode. Figure 15: The MULT Signal with THD Improved Circuitry As shown in Figure 15, after adding the THD improved circuitry, the MULT voltage rises. The MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 15 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC Figure 16: The Switching Loop of High-Side Buck Figure 17: The Switching Loop of High-Side Buck-Boost MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 16 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC TYPICAL APPLICATION CIRCUITS Figure 18: A19 Bulb Driver, 90-265VAC Input, Isolated Flyback Converter, VO =20V, ILED=350mA Figure 19: T8 Driver, 85-265VAC Input, Low-side Buck-boost Converter, VO =36V, ILED=500mA MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 17 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC Figure 20: A19 Bulb Driver, 90-265VAC Input, High-side Buck Converter, VO =36V, ILED=200mA MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 18 MP4054A – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC PACKAGE INFORMATION TSOT23-8 See note 7 EXAMPLE TOP MARK PIN 1 ID IAAAA RECOMMENDED LAND PATTERN TOP VIEW SEATING PLANE SEE DETAIL''A'' FRONT VIEW SIDE VIEW NOTE: DETAIL ''A'' 1) ALL DIMENSIONS ARE IN MILLIMETERS . 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) JEDEC REFERENCE IS MO-193, VARIATION BA. 6) DRAWING IS NOT TO SCALE. 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK) NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP4054A Rev. 1.01 www.MonolithicPower.com 9/27/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 19