Analogic AAT2820IXN-5.0-T1 Triple-output charge pump regulator Datasheet

AAT2820
Triple-Output Charge Pump Regulator
General Description
Features
The AAT2820 is a member of AnalogicTech's Total
Power Management IC™ (TPMIC™) product family. It is a triple output charge pump targeted for
active matrix thin-film transistor (TFT), liquid crystal displays (LCDs), and CCD camera bias for systems operating with lithium-ion/polymer batteries.
The device generates three regulated output voltages for turn-on gate drive bias (VPOS), turn-off
gate voltage bias (VNEG), and logic voltage.
•
•
•
•
•
•
•
•
•
•
The VPOS and VNEG output voltages are independently regulated. Both outputs use external diode
and capacitor multiplier stages (as many stages as
required) to regulate output voltages up to +25V
and -25V. An additional regulated output voltage is
provided for biasing the display module. Built-in
soft-start circuitry prevents excessive inrush current
during start-up. A high switching frequency enables
the use of very small external capacitors. A low
shutdown feature disconnects the load from VIN and
reduces quiescent current to less than 0.1µA.
ChargePump™
VIN Range: 2.7V to 5.5V
5V Regulated Output Voltage
Two Adjustable Regulated Output Voltages:
VPOS and VNEG
— Positive Charge Pump Up to +25V
— Negative Charge Pump Down to -25V
— Optional Power-Up Sequence with
AAT2820-1
Internal Power MOSFETs
<1µA of Shutdown Current
Internally Controlled Soft Start
Fast Transient Response
Ultra-Thin Solution (No Inductors)
16-Pin TDFN44 Package
Temperature Range: -40°C to +85°C
Applications
•
•
•
•
•
The AAT2820 is available in a Pb-free TDFN44-16
package and is specified over the -40°C to +85°C
operating temperature range.
CCD Cameras
Hand-Held Instruments
Passive-Matrix Displays
Personal Digital Assistants (PDAs)
TFT Active-Matrix LCDs
Typical Application
C FLY
C+
VIN
C-
IN
Enable
EN
CIN
Enable (Positive and
Negative Output)
EN/PN
VOUT
OUT
DRVN
AAT2820
FBN
COUT
DRVP
VNEG
REF
GND
2820.2006.04.1.4
FBP
VPOS
1
AAT2820
Triple-Output Charge Pump Regulator
Pin Description
Pin #
Symbol
1
2
3, 4, 8, 9, 12
5
6
7
DVRP
DRVN
GND
OUT
IN
EN
10
11
13
CC+
FBP
14
15
EN/PN
REF
16
FBN
EP
Function
Positive charge pump driver output. Output high level is VSUPP and low level is PGND.
Negative charge pump driver output. Output high level is VSUPN and low level is PGND.
Ground connection.
Regulated 5V output. Requires a 4.7µF bypass capacitor to ground.
Input power supply. A 1µA capacitor should be connected between this pin and ground.
Enable input control pin. When low, the device is powered down and consumes less than
0.1µA. This pin should not be left floating.
Flying capacitor negative terminal.
Flying capacitor positive terminal. Connect a 1µF capacitor between C+ and C-.
Positive charge pump feedback input. Regulates to 1.2V nominal. Connect feedback
resistive divider to analog ground (GND).
Enable input. When EN/PN is pulled low, VPOS and VNEG are turned off.
Internal reference bypass terminal. Connect a 0.1µF capacitor from this terminal to analog ground (GND). External load capability to 50uA. REF is disabled in shutdown.
Negative charge pump regulator feedback input. Regulates to 0V nominal. Connect feedback resistive divider to the reference (REF).
Exposed paddle (bottom); connect to GND directly beneath package.
Pin Configuration
TDFN44-16
(Top View)
DRVP
DRVN
GND
GND
OUT
IN
EN
GND
2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
FBN
REF
EN/PN
FBP
GND
C+
CGND
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
Absolute Maximum Ratings1
Symbol
VIN
VOUT
VEN
VN_CH
VP_CH
Other Inputs
IMAX
TLEAD
Description
Input Voltage
Charge Pump Output
EN or EN/PN to GND
DRVN to GND
DRVP to GND
REF, FBN, FBP to GND
Continuous Current into DRVN, DRVP, OUT
All Other Pins
Maximum Soldering Temperature (at leads, 10 sec)
Value
Units
-0.3 to 6.0
-0.3 to 6.0
-0.3 to 6.0
-0.3V to (VIN + 0.3V)
-0.3V to (VIN + 0.3V)
-0.3V to (VIN + 0.3V)
±200
±10
300
V
V
V
V
V
V
mA
°C
Thermal Information2
Symbol
θJA
PD
Description
Maximum Thermal Resistance
Power Dissipation3
Value
Units
50
2.0
°C/W
W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board.
3. Derate 6.25mW/°C above 25°C.
2820.2006.04.1.4
3
AAT2820
Triple-Output Charge Pump Regulator
Electrical Characteristics1
VIN = 3.3V; CIN = COUT = CFLY = 1.0µF, TA = 0°C to +85°C, unless otherwise noted.
Typical values are TA = 25°C.
Symbol Description
VIN
UVLO
ICC
ISD
TSS
FOSC
Negative
VFBN
IFBN
INEG
RDS_NCH
Input Supply Range
Input Under-Voltage Lockout
Threshold
Operating Current
Shutdown Supply Current
Soft-Start Time
Operating Frequency
Low-Power Charge Pump
FBN Regulation Voltage
FBN Input Bias Current
Maximum Negative Output Current2
DRVN NCH On-Resistance
MIN DRVN PCH On-Resistance
RDS_PCH
MAX DRVN PCH On-Resistance
Positive Low-Power Charge Pump
VFBP
FBP Regulation Voltage
IFBP
FBP Input Bias Current
IPOS
Maximum Positive Output Current2
RDS_PCH DRVP PCH On-Resistance
MIN DRVP NCH On-Resistance
RDS_NCH
MAX DRVP NCH On-Resistance
Reference
Reference Voltage
VREF
Reference Under-Voltage Lockout
Threshold
VEN(L)
EN and EN/PN Threshold Low
VEN(H)
EN and EN/PN Threshold High
II
Enable Input Current
TSD
Over-Temperature Shutdown
Threshold
THYS
Over-Temperature Shutdown
Hysteresis
Regulated 5V Charge Pump
Output Voltage Tolerance
VOUT
Output Voltage
IOUT
Maximum Output Current2
Conditions
Min Typ Max Units
2.7
VIN Rising
VIN Falling
VFBP = 1.5V, VFBN = -0.2V, No Load on
DRVN and DRVP; EN = EN/PN = VIN
VEN = VEN/PN = 0V
VFBN = -50mV
3.3 ≤ VIN ≤ 5.5; No Load at VPOS and VOUT
5.0
0.1
200
1.0
-100
-100
1.15
-60
1.2
1.0
3
20
VFBP = 1.15V, VIN = 4V
VFBP = 1.25V, VIN = 4V
-2.0µA < IREF < 50µA
0
1.5
1.0
20
VFBN = 100mV, VIN = 4V
VFBN = -100mV, VIN = 4V
VFBP = 1.5V
3.3 ≤ VIN ≤ 5.5; No Load at VNEG and VOUT
5.5
1.8
1.6
1.18
VREF Rising
1.2
V
1.0
mV
nA
mA
Ω
Ω
kΩ
1.25
+100
25
5.0
15
V
nA
mA
Ω
Ω
kΩ
1.22
V
0.8
140
V
V
µA
°C
15
°C
1.5
-1.0
4.8
mA
µA
µs
MHz
+100
+100
25
5.0
5.0
0.5
2.7V < VIN < 5V, IOUT = 50mA
3.0V < VIN < 5V, IOUT = 100mA
3.3 ≤ VIN ≤ 5.5; No Load at VPOS and VNEG
V
1.0
±4.0
5.0
5.2
150
%
V
mA
1. The AAT2820 is guaranteed to meet performance specifications from 0°C to 70°C. Specification over the -40°C to +85°C operating
temperature range is assured by design, characterization, and correlation with statistical process controls.
2. Loads greater than those listed in maximum output load conditions may cause permanent damage to the device.
4
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA = 25°C, unless otherwise noted.
5V Output vs. Output Current
5V Output Efficiency vs. Output Current
(No-Load at VPOS and VNEG)
100
5.0
4.8
80
VIN = 3.3V
4.6
VIN = 3.0V
90
VIN = 4.2V
Efficiency (%)
Output Voltage (V)
5.2
VIN = 2.7V
VIN = 2.7V
70
60
VIN = 3.3V
50
40
VIN = 4.2V
30
20
4.4
10
VIN = 3.0V
4.2
0
50
100
150
200
0
250
300
0.1
1.0
Output Current (mA)
1000
5V Output Voltage vs. Temperature
5V Output Efficiency vs. Output Current
(No-Load at VPOS and VNEG)
(VOUT = 5V; VPOS = 12.5V @ 10mA; VNEG = -7.8V @ 5mA)
70
60
Efficiency (%)
VIN = 4.2V
5.00
4.98
4.96
VIN = 2.7V
4.94
VIN = 3.3V
4.92
VIN = 2.7V
50
40
30
VIN = 3.3V
VIN = 4.2V
20
10
4.90
-40
0
-20
0
20
40
60
80
0
100
20
40
60
Temperature (°°C)
80
100
120
140
160
Output Current (mA)
Switching Frequency vs. Temperature
Operating Current vs. Temperature
930
5.7
Operating Current (mA)
Switching Frequency (kHz)
100
Output Current (mA)
5.02
5V Output Voltage (V)
10
920
910
900
890
880
870
860
850
5.6
5.5
5.4
5.3
5.2
5.1
5.0
4.9
840
-40
-20
0
20
40
Temperature (°°C)
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60
80
100
-40
-20
0
20
40
60
80
100
Temperature (°°C)
5
AAT2820
Triple-Output Charge Pump Regulator
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA = 25°C, unless otherwise noted.
Positive Charge Pump Output
Voltage vs. Temperature
Reference Voltage vs. Temperature
(No Load at VNEG and VOUT)
Positive Output Voltage (V)
Reference Voltage (V)
1.22
1.21
1.20
1.19
1.18
1.17
-40
-20
0
20
40
60
80
100
12.70
VPOS = 12.5V
12.65
IPOS = 5mA
12.60
12.55
12.50
IPOS = 15mA
12.45
12.40
12.35
12.30
-40
-20
0
12.4
12.3
VIN = 3.3V
VIN = 2.7V
12.1
VIN = 3.0V
VIN = 2.7V
70
VIN = 4.2V
12.2
100
(No Load at VNEG and VOUT)
80
Efficiency (%)
Positive Output Voltage (V)
80
Positive Charge Pump Efficiency
vs. Output Current
60
VIN = 3.3V
50
VIN = 4.2V
40
30
20
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Output Current (mA)
Output Current (mA)
Negative Charge Pump Output
Voltage vs. Temperature
Negative Charge Pump Output
vs. Output Current
(No Load at VPOS and VOUT)
(No Load at VPOS and VOUT)
-7.6
-7.65
VNEG = -7.8V
-7.70
Output Voltage (V)
Negative Output Voltage (V)
60
Positive Charge Pump Output
Voltage vs. Output Current
(No Load at VNEG and VOUT)
-7.75
-7.80
INEG = 15mA
-7.85
-7.90
INEG = 5mA
-7.95
-8.00
-8.05
VIN = 2.7V
-7.5
VIN = 3.3V
-7.4
-7.3
VIN = 4.2V
-7.4
-8.10
-8.15
-40
-20
0
20
40
Temperature (°°C)
6
40
Temperature (°°C)
12.5
12
20
Temperature (°°C)
60
80
100
-7.1
0
5
10
15
20
25
30
Output Current (mA)
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA = 25°C, unless otherwise noted.
Load Transient Response
Negative Charge Pump Efficiency
vs. Output Current
(10mA - 100mA; VIN = 3.3V)
(No Load at VPOS and VOUT)
70
5.05
5.00
Output Voltage
(50mV/div) (top)
65
Efficiency (%)
60
55
50
VIN = 3.0V
VIN = 3.3V
45
40
VIN = 4.2V
35
4.95
4.90
4.85
0.10
10mA
30
0
5
10
15
20
25
0.05
0.00
ROUT = 500Ω to 55Ω
25
20
0.15
100mA
Output Current
(50mA/div) (bottom)
VIN = 2.7V
-0.05
Time (50μ
μs/div)
30
Output Current (mA)
5V Output Startup Time
with 100mA Load
Output Ripple Waveform
(VOUT = 5V @ 100mA; VPOS = 12.5V @ 10mA;
VNEG = -7.8V @ 10mA)
VOUT
(20mV/div)
3V
Enable
(1V/div)
+5V
0V
VPOS
(10mV/div)
VOUT
(1V/div)
VNEG
(10mV/div)
0V
μs/div)
Time (100μ
Time (250ns/div)
AAT2820-1 Power-Up Sequence
AAT2820 Power-Up Sequence
(VIN = 4.2V)
4V
Enable
(2V/div)
0V
5V
VOUT
(5V/div)
0V
10V
VPOS
(10V/div)
VNEG
(10V/div)
0V
0V
-10V
μs/div)
Time (250μ
2820.2006.04.1.4
4V
Enable
(2V/div)
0V
5V
VOUT
(5V/div)
0V
10V
VPOS
(10V/div)
VNEG
(10V/div)
0V
0V
-10V
μs/div)
Time (250μ
7
AAT2820
Triple-Output Charge Pump Regulator
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA = 25°C, unless otherwise noted.
Maximum Line Load
Maximum Line Load
(Positive Charge Pump)
(Negative Charge Pump)
27
-3
24
-6
VNEG (V)
VPOS (V)
6 Stages
18
15
12
2 Stages
0
5
3 Stages
-15
-18
6 Stages
10
15
5 Stages
-24
4 Stages
IPOS (mA)
8
-12
-21
9
6
3 Stages
-9
5 Stages
21
2 Stages
20
25
30
-27
4 Stages
0
5
10
15
20
25
30
INEG (mA)
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
Functional Block Diagram
C+
C-
Soft Start
EN
2X Charge
Pump
1MHz
Oscillator
OUT
IN
VREF
Reference
Oscillator
Charge
Pump
Control
Logic
EN/PN
DVRP
DVRN
FBP
OverTemperature
Protection
REF
VREF
FBN
GND
Functional Description
5V Regulated Output
The main power supply is a charge pump doubler
architecture used to support the high-current
demand required by the application. Charge pump
regulation is achieved by sensing the output voltage through an internal resistor divider network. A
switch doubling circuit is enabled when the divided
output drops below a preset trip point controlled by
an internal comparator. The free-running charge
pump switching frequency is approximately 1MHz.
The charge pump is designed to deliver 150mA of
continuous current (loads greater than the maximum load condition may cause permanent damage to the device).
Dual Charge Pump Regulators
The dual charge pump provides low-power regulated output voltages from two individual charge
2820.2006.04.1.4
pumps. Using a single stage, the first charge pump
inverts the supply voltage (VIN) and provides a regulated negative output voltage. The second charge
pump doubles VIN and provides a regulated positive output voltage. These outputs use external
Schottky diodes and capacitor multiplier stages (as
many as required) to regulate up to ±25V. A constant switching frequency of 1MHz minimizes the
output ripple and capacitor size.
Negative Charge Pump Regulator
During the first half-cycle, the P-channel MOSFET
turns on and the flying capacitor C11 charges to
VIN minus a diode drop (Figure 1). During the second half-cycle, the P-channel MOSFET turns off
and the N-channel MOSFET turns on, level shifting
C11. This connects C11 in parallel with the output
reservoir capacitor C23. If the voltage across C23
minus a diode drop is less than the voltage across
C11, current flows from C11 to C23 until the diode
turns off.
9
AAT2820
Triple-Output Charge Pump Regulator
Positive Charge Pump Regulator
Enable
During the first half-cycle, the N-channel MOSFET
turns on and charges the flying capacitor C12
(Figure 2). During the second half-cycle, the Nchannel MOSFET turns off and the P-channel
MOSFET turns on, level shifting C12 the input voltage. This connects C12 in parallel with the reservoir capacitor C24. If the voltage across C24 plus a
diode drop is less than the level shifted by the flying capacitor (C12 + VIN), charge is transferred
from C12 to C24 until the diode turns off. If the
positive charge pump output is connected to
ground, output may not recover until power is recycled. Loads greater than the maximum load condition may cause permanent damage to the device;
please review the Maximum Line Load Curves and
the Electrical Characteristics table.
In the normal operating state, the AAT2820 typically consumes 5mA of quiescent operating current.
By pulling the enable pin (EN) low, the AAT2820
disables all three outputs. Once the device is shut
down, the supply current drops to less than 1µA to
maximize battery life.
Voltage Reference
The voltage reference is a simple band gap with an
output voltage equal to VBE + K*VT. The band gap
reference amplifier has an additional compensation
capacitor from the negative input to the output. This
capacitor serves to slow down the circuit during
startup and soft starts the voltage reference and the
regulator output from overshoot. The reference circuit amplifier also increases the overall PSRR of the
device. An 80kΩ resistor serves to isolate and buffer
the amplifier from a small internal filter capacitor and
an optional large external filter capacitor.
The AAT2820 gives the application an option to
independently turn on/off the positive and negative
charge pump outputs. These two outputs can be
disabled by pulling the EN/PN pin low. The threshold levels lie between 0.5V and 1.5V. Depending
on the application, the supplies must be sequenced
properly to avoid damage or latch-up.
Soft-Start and Start-up Sequence
The AAT2820 has an internal soft-start circuit to
guarantee a smooth transition to 5V for the main output when the device is enabled (typical 200µs). This
device has two versions for the start-up sequence.
The AAT2820 ramps up the positive charge pump
after the negative charge pump is present; the
AAT2820-1 ramps up the positive charge pump
before the negative charge pump.
Over-Temperature Protection
To protect the AAT2820, as well as the system application, this device has a thermal protection circuit
that will shut down all the charge pumps if the die
temperature rises above the preset internal thermal
limit. This protects the device if the ambient temperature exceeds the operating limit for the device.
IN
IN
OSC
DRVN
CTL
C11 1/2 A3
VIN
OSC
C12
CTL
1/2 A4
DRVP
BAT54SDW
BAT54SDW
R1
FBN
VON = -(R1/R2) x VREF
R4
FBP
VON
R2
GND
VREF
1.2V
C23
C5
Figure 1: Negative Charge Pump Block Diagram.
10
VOP
⎛
R4⎞
VOP = 1 +
× VREF
R3⎠
⎝
VREF
1.2V
R3
C24
GND
Figure 2: Postive Charge Pump Block Diagram.
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
Design Procedure and
Component Selection
Number of Stages for Dual Charge
Pump Regulators
The number of stages required can be determined by:
NPOS =
VPOS - 5
5 - 2VFWD
for the positive output, and
NNEG =
VNEG
2VFWD - 5
for the negative output.
Where,
VNEG = Negative output voltage
VPOS = Positive output voltage
VFWD = Forward voltage drop of the Schottky diode
(0.31V, based on BAT54SDW diode when
IF = 4mA)
After solving for the number of stages (NPOS and
NNEG), round up the solutions to the next highest
integers for the number of stages required.
Tables 1 and 2 show the number of stages required
for positive and negative charge pumps, respectively.
VPOS (V)
# of Stages (n)
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
1
1
2
2
2
2
3
3
3
3
3
4
4
4
4
5
5
5
Table 1: Number of Stages Required for
Positive Charge Pump.
VNEG (V)
# of Stages (n)
-7
-8
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
2
2
3
3
3
3
3
4
4
4
4
5
5
5
5
6
6
6
6
Table 2: Number of Stages Required for
Negative Charge Pump.
2820.2006.04.1.4
11
AAT2820
Triple-Output Charge Pump Regulator
VNEG
The negative output voltage is adjusted by a resistive divider from the output (VNEG) to the FBN and
REF pin. The maximum reference voltage current
is 50µA; therefore, the minimum allowable value for
R2 of Figure 1 is 24kΩ. It is best to select the smallest value possible for R2 as this will keep R1 to a
minimum. This limits errors due to the FBN input
bias current. The FBN input has a maximum input
bias current of 100nA. Using the full 50µA reference current for programming VNEG:
IPGM =
VREF 1.2V
=
= 50μA
R2
24kΩ
will limit the error due to the input bias current at
FBN to less than 0.2%.
IFBN
0.1μA
=
= 0.2%
IPGM
50μA
With R2 selected, R1 can be determined by:
V
· R2
R1 = NEG
-VREF
VNEG (V)
Ω)
R1, Closest Value (kΩ
-7
-8
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
143
162
182
205
226
243
267
287
309
324
348
360
390
412
430
453
470
487
510
Ω
Table 3: Closest Value for R1 if Using 24.3kΩ
as R2.
VPOS
The positive output voltage is set by way of a resistive divider from the output (VPOS) to the FBP and
ground pin. Limiting the size of R3 reduces the
effect of the FBP bias current. For less than 0.1%
error, limit R3 to less than 12kΩ.
See the example in Table 3.
IPGM =
VREF 1.2V
=
= 100μA
R3
12kΩ
IFBN
0.1μA
=
= 0.1%
IPGM 100μA
Once R3 has been determined, then solve for R4
(see example in Table 4).
⎛ VPOS ⎞
R4 = R3 · V
-1
⎝ REF ⎠
12
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
VPOS (V)
Ω)
R4, Closest Value (kΩ
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
59.0
69.8
78.7
88.7
100.0
110.0
120.0
130.0
140.0
150.0
160.0
169.0
180.0
191.0
200.0
210.0
220.0
232.0
240.0
Ω
Table 4: Closest Value for R4 if Using 12.1kΩ
as R3.
Capacitor Selection
Careful selection of the three external capacitors
CIN, CFLY, and COUT is important because they will
affect turn-on time, output ripple, efficiency, and
load transient response. Optimum performance will
be obtained when low equivalent series resistance
(ESR) ceramic capacitors are used. In general, low
ESR may be defined as less than 100mΩ. A value
of 1µF for input and flying capacitors is a good
starting point when designing with the AAT2820.
This not only provides for a very small printed circuit board area, but cost is further reduced by the
minimized bill of materials.
Input Capacitor
A 1µF multilayer ceramic chip capacitor is suggested for the input. This capacitor should be connected between the IN pin and ground; 1µF should be
suitable for most applications. Even though the
AAT2820 switching ripple and noise are very low,
2820.2006.04.1.4
back-injected line noise may be further reduced by
increasing the value of CIN. A low equivalent series
inductance (ESL) ceramic capacitor is ideal for this
function. The size required will vary depending on
the load, output voltage, and input voltage characteristics. Other types of capacitors may be used for
CIN at the cost of compromised circuit performance.
Output Capacitor
The output capacitor (COUT) should be connected
between the OUT pin and ground. Switching noise
and ripple seen on the charge pump output
increases with load current. Typically, the output
capacitor should be 5 to 10 times greater than the
flying capacitor. To minimize stray inductance, the
capacitor should be placed as closely as possible
to the IC. This keeps the high frequency content of
the input current localized, minimizing radiated and
conducted EMI.
A 1µF ceramic capacitor is recommended for most
applications for optimum transient response.
However, if the application has a larger load from
the main and multiplier stage charge pump outputs,
a 4.7µF ceramic capacitor is suggested to reduce
the feedback injection noise from the multiplier
stage and lower switching ripple. Capacitor types
other than ceramic capacitors can be used for COUT.
However, capacitors composed of non-ceramic
material will typically have a greater value of ESR,
resulting in increased output switching ripple.
Charge Pump Capacitor (CFLY)
Due to the switching operation of the voltage doubling circuit topology, current flow through the flying
capacitor is bi-directional. The flying capacitor
selected must be a non-polarized type. A 1µF low
ESR ceramic capacitor is ideal for most applications.
Capacitor Characteristics
Ceramic composition capacitors are highly recommended over all other types of capacitors for use
with the AAT2820. Ceramic capacitors offer many
advantages over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically
has very low ESR, is lowest cost, has a smaller
13
AAT2820
Triple-Output Charge Pump Regulator
PCB footprint, and is non-polarized. Low ESR
ceramic capacitors help maximize charge pump
transient response. Since ceramic capacitors are
non-polarized, they are not prone to incorrect connection damage.
both the positive and negative charge pumps
(regardless of the number of stages) is:
Rectifier Diodes
The BAT54SDW quad Schottky in an SOT363
(2x2mm) package is a good choice for multiplestage charge pump configuration (see evaluation
board schematic in Figure 3).
VRESERVE = VIN - VF
For the rectifiers, use Schottky diodes with a voltage rating of 1.5X the input voltage. The maximum
steady-state voltage seen by the rectifier diodes for
VIN
VOUT_5V
SP
A3
1
J5
Stage
1 2
2
C23
1μF
C21
1μF
1
6
C9
4
0.1μF
5
5
3
BAT54SDW
A1
C8
6
0.1μF
7
8
1
6
C18
1μF
3
BAT54SDW
DRVN REF
GND EN/PN
GND
FBP
OUT
GND
IN
C+
EN
GND
CGND
16
5
C5
0.1μF
14
13
C14
R4
C15
10
C2
R3
12.1K
3
1
1 2 3
C17
3
C3
C1
1μF 4.7μF
1μF
1 2
5
1
C28
1μF
J10
1 2
2
BAT54SDW
J8
1 2
J9
4
6
Stage
2
Stage
3
Stage
4
C27
1μF
BAT54SDW
A6
0.1μF
0.1μF
C26
1μF
2
0.1μF
C6
1 2
5
9 1μF
Enable
J7
4
6
J6
1 2
C25
1μF
BAT54SDW
A5
0.1μF
C16
C24
1μF
2
0.1μF
12
11
1
0.1μF
R2
24.3K
15
C7
0.1μF
5
4
DRVP FBN
AAT2820
C4
GND
3
U1
4
6
0.1μF
2
C19
1μF
C13
R1
2
4
J2
Stage
1 2
5
VOUT_N
1 2 3
2
1
A4
3
0.1μF
Enable/PN
3 C10
BAT54SDW
A2
C20
1μF
J1
Stage
1 2
6
C11
0.1μF
4
J4
Stage
1 2
3
J3
Stage
1 2
4
6
5
C22
1μF
C12
SN
2
C29
1μF
GND
Stage
5
Stage
6
VOUT_P
GND
C1 Taiyo Yuden LMK212 BJ105KD 1μF 10V X7R 0805
C2 Taiyo Yuden LMK107 BJ105KA 1μF 10V X7R 0603
C3 Taiyo Yuden LMK212 BJ475KD 4.7μF 10V X5R 0805
C5, C9-C14 Taiyo Yuden EMK107 BJ104MA 0.1μF 16V X7R 0603
C6-C8, C15-C17 Taiyo Yuden TMK107 BJ104KA 0.1μF 25V X5R 0603
C20-C27 Taiyo Yuden EMK212 BJ105KG 1μF 16V X7R 0805
C18, C19, C28, C29 Taiyo Yuden TMK212 BJ105KG 1μF 25V X5R 0805
[Optional] C4 Taiyo Yuden LMK212 BJ105KD 1μF 10V X7R 0805
Figure 3: AAT2820 Evaluation Board Schematic (Shown With Six Stages).
14
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
Flying and Output Capacitor Multiplier
Stages
Negative Charge Pump Capacitor
Voltage Ratings
A 0.1µF X7R or X5R ceramic capacitor is typically
used. The voltage rating of the flying and reservoir
output capacitors will vary with the number of
charge pump stages. The reservoir output capacitor should be roughly 10X the flying capacitor. Use
larger capacitors for reduced output ripple. A 1µF
X7R or X5R type ceramic is typically used.
The absolute steady-state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is:
Positive Charge Pump Capacitor
Voltage Ratings
The absolute steady-state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is:
VBULK(n) = -n · VIN + 2 · n · VFWD
This is also the voltage rating required for the nth
bulk capacitor in the negative output charge pump.
The voltage rating for the nth flying capacitor in the
negative stage (see Table 6) is:
VFLY(n) = VFWD - VBULK(n)
VBULK(n) = (n + 1) · VIN - 2 · n · VFWD
where VFWD is the estimated forward drop of the
Schottky diode. This is also the voltage rating
required for the nth bulk capacitor in the positive
output charge pump.
The voltage rating for the nth flying capacitor in the
positive stage is:
# of Stages (n)
VBULK(n)
VFLY(n)
1
2
3
4
5
6
-4.4V
-8.8V
-13.2V
-17.6V
-22.0V
-26.4V
4.7V
9.1V
13.5V
17.9V
22.3V
26.7V
Table 6: Negative Charge Pump Capacitor
Voltages (VFWD = 0.31V).
VFLY(n) = VBULK(n + 1) - VFWD
where VBULK(0) is the input voltage (see Table 5).
# of Stages (n)
VBULK(n)
VFLY(n)
1
2
3
4
5
6
9.4V
13.8V
18.2V
22.6V
27.0V
31.4V
4.7V
9.1V
13.5V
17.9V
22.3V
26.7V
Table 5: Positive Charge Pump Capacitor
Voltages (VFWD = 0.31V).
2820.2006.04.1.4
PC Board Layout
The input and reference capacitor should be
placed as closely to the IC as possible. Place the
programming resistors (R1-R4) close to the IC,
minimizing trace length to FBN and FBP. Place the
main charge pump flying capacitor close to the C+
and C- pins, with wide traces and no vias. Place all
multiplier stage (charge pump) circuitry to the IC as
closely as possible using wide traces, and avoid
using vias when possible.
Figures 4 and 5 show the recommended evaluation
board layout with the TDFN44-16 package.
15
AAT2820
Triple-Output Charge Pump Regulator
Figure 4: AAT2820 Evaluation Board
Top Side Layout.
16
Figure 5: AAT2820 Evaluation Board
Bottom Side Layout.
2820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
Ordering Information
Package
Power-Up Sequence
Marking1
Part Number (Tape and Reel)2
TDFN44-16
TDFN44-16
-, +
+, -
OCXYY
ODXYY
AAT2820IXN-5.0-T1
AAT2820IXN-5.0-1-T1
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Package Information
3.30 ± 0.05
Detail "B"
4.00 ± 0.05
Index Area
(D/2 x E/2)
0.3 ± 0.10
0.375 ± 0.125
0.16
0.075 ± 0.075
0.1 REF
4.00 ± 0.05
2.60 ± 0.05
Top View
Pin 1 Indicator
(optional)
0.23 ± 0.05
Bottom View
0.45 ± 0.05
Detail "A"
0.229 ± 0.051
+ 0.05
0.8 -0.20
7.5° ± 7.5°
0.05 ± 0.05
Detail "B"
Option A:
C0.30 (4x) max
Chamfered corner
Side View
Option B:
R0.30 (4x) max
Round corner
Detail "A"
All dimensions in millimeters
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
2820.2006.04.1.4
17
AAT2820
Triple-Output Charge Pump Regulator
© Advanced Analogic Technologies, Inc.
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Phone (408) 737-4600
Fax (408) 737-4611
18
2820.2006.04.1.4