ALD ALD111933 Dual n-channel enhancement mode epad Datasheet

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ADVANCED
LINEAR
DEVICES, INC.
TM
EPAD
EN
®
AB
LE
D
ALD111933
DUAL N-CHANNEL ENHANCEMENT MODE
MATCHED PAIR MOSFET ARRAY
EPAD®
GENERAL DESCRIPTION
APPLICATIONS
The ALD111933 is a high precision monolithic dual N-Channel Enhancement Mode Matched Pair MOSFET Array matched at the
factory using ALD’s proven EPAD® CMOS technology. This device is intended for precision nano-watt, low voltage, small signal
applications. ALD111933 features a pecision matched +3.30V
threshold voltage for each of the dual MOSFET devices as well as
a max. offset voltage of 20mV. These two key features enable
extremely low power (nW) precision comparator circuit functions
with the threshold voltage itself being used as a zero (near-zero
drain current) power coarse voltage reference.
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ALD111933 MOSFETs are designed and built with exceptional device electrical characteristics matching. Since these devices are
on the same monolithic chip, they also exhibit excellent tempco
tracking characteristics. Each device is versatile as a circuit element and is a useful design component for a broad range of precision analog applications. They are basic building blocks for current mirrors, current sources, differential amplifier input stages,
transmission gates, and multiplexer applications. For most applications, connect V- and IC pins to the most negative voltage potential in the system on the printed circuit board. All other pins
must have voltages within V+ and V- voltage limits.
VGS(th)= +3.30V
Precision current mirrors
Precision current sources
Voltage choppers
Differential amplifier input stages
Discrete voltage comparators
Voltage bias circuits
Sample and Hold circuits
Analog inverters
Level shifters
Source followers and buffers
Current multipliers
Discrete analog multiplexers/matrices
Discrete analog switches
Low current voltage clamps
Voltage detectors
Capacitive probes
Sensor interfaces
Peak detectors
Level shifters
Multiple preset voltage hysteresis circuits
(with other VGS(th) EPAD MOSFETS)
• Energy harvesting circuits
• Zero standby power voltage monitors
ALD111933 devices are built for minimum offset voltage and differential thermal response, and they are designed for switching
and amplifying applications in +3.0V to +10V systems where low
input bias current, low input capacitance and fast switching speed
are desired. Since these are MOSFET devices, they feature very
large (almost infinite) current gain in a low frequency, or near DC,
operating environment. The high input impedance and the high
DC current gain of the Field Effect Transistor result in extremely
low current loss through the Gate Input, enabling control with very
low input power and circuit functions operating with nano-power.
PIN CONFIGURATION
FEATURES
• Enhancement-mode (normally off)
• Precision Gate Threshold Voltage: +3.30V
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• Parallel connection of MOSFETs to increase drain currents
• Low input capacitance
• VGS(th) match (Offset Voltage) to 20mV
• High input impedance — 1012Ω typical
• Positive, zero, and negative VGS(th) temperature coefficient
• DC current gain >108
• Low input and output leakage currents
ALD111933
VIC*
1
8
GN2
GN1
2
7
DN2
DN1
3
6
V-
SN1
4
5
SN2
V-
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
Operating Temperature Range *
0°C to +70°C
8-Pin SOIC Package
ALD111933SAL
SAL, PAL PACKAGES
8-Pin Plastic Dip Package
*IC pins are internally connected, connect to V-
ALD111933PAL
*Contact factory for industrial temp. range or user-specified threshold voltage values.
©2015 Advanced Linear Devices, Inc., Vers. 2.0
www.aldinc.com
1 of 10
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, VDS
10.6V
10.6V
Gate-Source voltage, VGS
Operating Current
80mA
Power dissipation
500mW
Operating temperature range SAL, PAL
0°C to +70°C
Storage temperature range
-65°C to +150°C
Lead temperature, 10 seconds
+260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V V- = GND TA = 25°C unless otherwise specified
ALD111933
Parameter
Symbol
Gate Threshold Voltage
VGS(th)
Offset Voltage
Min
3.25
Typ
Max
3.30
3.35
VOS
2
20
Offset Voltage Tempco
TCVOS
GateThreshold Voltage Tempco
TCVGS(th)
Drain Source On Current
IDS(ON)
Unit
Test Conditions
V
IDS = 1µA, VDS = 0.1V
mV
VGS(th)M1 - VGS(th)M2
IDS = 1µA
5
µV/°C
VDS1 = VDS2
-1.7
0.0
+1.6
mV/°C
IDS = 1µA, VDS = 0.1V
IDS = 20µA, VDS = 0.1V
IDS = 40µA, VDS = 0.1V
6.9
mA
VGS = +10V, VDS = +5V
3.0
mA
VGS = +7.3V, VDS = +5V
VGS = +7.3V
VDS = +9.8V
Forward Transconductance
GFS
1.4
mmho
Transconductance Mismatch
∆GFS
1.8
%
Output Conductance
GOS
68
µmho
VGS = +7.3V
VDS = +9.8V
Drain Source On Resistance
RDS(ON)
500
Ω
VGS = +7.3V
VDS = 0.1V
Drain Source On Resistance
Mismatch
∆RDS(ON)
0.5
%
VGS = +7.3V
VDS = 0.1V
Drain Source Breakdown
Voltage
BVDSX
V
VGS = +2.3V
IDS = 1.0µA
Drain Source Leakage Current1
IDS(OFF)
Gate Leakage Current1
10
10
100
4
pA
nA
VGS = +2.3V, VDS = 10V
TA = 125°C
IGSS
3
30
1
pA
nA
VGS = 10V, VDS = 0V
TA = 125°C
Input Capacitance
CISS
2.5
pF
Transfer Reverse Capacitance
CRSS
0.1
pF
Turn-on Delay Time
ton
10
ns
V+ = 5V, RL = 5KΩ
Turn-off Delay Time
toff
10
ns
V+ = 5V, RL = 5KΩ
60
dB
f = 100KHz
Crosstalk
Notes:
1
Consists of junction leakage currents
ALD111933, Vers. 2.0
Advanced Linear Devices
2 of 10
PERFORMANCE CHARACTERISTICS OF EPAD®
PRECISION MATCHED PAIR MOSFET FAMILY
The ALD111933 is a unique member of the ALD1108xx/ALD1109xx
Product Family of monolithic quad/dual N-Channel MOSFETs
matched at the factory using ALD’s proven EPAD® CMOS technology. The family of devices are intended for low voltage, small signal applications. ALD111933 MOSFETs feature a precision matched
+3.30V threshold voltage for each of the dual MOSFET devices as
well as a max. matched offset voltage of 20mV. These features
enable extremely low power (nW) precision comparator circuit functions with the threshold voltage itself being used as a zero (nearzero drain current) power coarse voltage reference. The
ALD111933, being part of the EPAD Family, behaves according to
descriptions characterized below for the entire EPAD MOSFET
Product Family.
ALD’s Electrically Programmable Analog Device (EPAD) technology provides a family of matched transistors with a range of precision threshold values. All members of this family are designed and
actively programmed for exceptional matching of device electrical
characteristics. Threshold values range from -3.50V Depletion to
+3.50V Enhancement devices, including standard products specified at -3.50V, -1.30V, -0.40V, +0.00V, +0.20V, +0.40V, +0.80V,
+1.40V, and +3.30V. ALD can also provide any customer desired
value between -3.50V and +3.50V. For all these devices, even the
depletion and zero threshold transistors, ALD EPAD technology
enables the same well controlled turn-off, subthreshold, and low
leakage characteristics as standard enhancement mode MOSFETs.
With the design and active programming, even units from different
batches and different date of manufacture have well matched characteristics. As these devices are on the same monolithic chip, they
also exhibit excellent tempco tracking.
The EPAD MOSFET Array product family (EPAD MOSFET) is available in the three separate categories, each providing a distinctly
different set of electrical specifications and characteristics. The first
category is the ALD110800/ALD110900 Zero-Threshold™ mode
EPAD MOSFETs. The second category is the ALD1108xx/
ALD1109xx enhancement mode EPAD MOSFETs. The third category is the ALD1148xx/ALD1149xx depletion mode EPAD
MOSFETs. (The suffix “xx” denotes threshold voltage in 0.1V steps,
for example, xx=08 denotes 0.80V).
The ALD110800/ALD110900 (quad/dual) are EPAD MOSFETs in
which the individual threshold voltage of each MOSFET is fixed at
zero. The threshold voltage is defined as IDS = 1µA @ VDS = 0.1V
when the gate voltage VGS = 0.00V. Zero threshold devices operate in the enhancement region when operated above threshold voltage and current level (VGS > 0.00V and IDS > 1µA) and subthreshold region when operated at or below threshold voltage and current level (VGS <= 0.00V and IDS < 1µA). This device, along with
other very low threshold voltage members of the product family,
constitute a class of EPAD MOSFETs that enable ultra low supply
voltage operation and nanopower type of circuit designs, applicable
in either analog or digital circuits.
The ALD1108xx/ALD1109xx (quad/dual) product family features
precision matched enhancement mode EPAD MOSFET devices,
which require a positive bias voltage to turn on. Precision threshold
values such as +1.40V, +0.80V, +0.20V are offered. No conductive
channel exists between the source and drain at zero applied gate
voltage for these devices, except that the +0.20V version has a
subthreshold current at about 20nA.
The ALD1148xx/ALD1149xx (quad/dual) features depletion mode
EPAD MOSFETs, which are normally-on devices when the gate
bias voltage is at zero volt. The depletion mode threshold voltage
ALD111933, Vers. 2.0
is at a negative voltage level at which the EPAD MOSFET turns off.
Without a supply voltage and/or with VGS = 0.0V the EPAD MOSFET
device is already turned on and exhibits a defined and controlled
on-resistance between the source and drain terminals.
The ALD1148xx/ALD1149xx depletion mode EPAD MOSFETs are
different from most other types of depletion mode MOSFETs and
certain types of JFETs in that they do not exhibit high gate leakage
currents and channel/junction leakage currents. When negative
signal voltages are applied to the gate terminal, the designer/user
can depend on the EPAD MOSFET device to be controlled, modulated and turned off precisely. The device can be modulated and
turned-off under the control of the gate voltage in the same manner
as the enhancement mode EPAD MOSFET and the same device
equations apply.
EPAD MOSFETs are ideal for minimum offset voltage and differential thermal response, and they are used for switching and amplifying applications in low voltage (1V to 10V or +/-0.5V to +/-5V) or
ultra low voltage (less than 1V or +/- 0.5V) systems. They feature
low input bias current (less than 30pA max.), ultra low power
(microWatt) or Nanopower (power measured in nanoWatt) operation, low input capacitance and fast switching speed. These devices can be used where a combination of these characteristics
are desired.
KEY APPLICATION ENVIRONMENT
EPAD MOSFET Array products are for circuit applications in one or
more of the following operating environments:
* Low voltage: 1V to 10V or +/- 0.5V to +/- 5V
* Ultra low voltage: less than 1V or +/- 0.5V
* Low power: voltage x current = power measured in microwatt
* Nanopower: voltage x current = power measured in nanowatt
* Precision matching and tracking of two or more MOSFETs
ELECTRICAL CHARACTERISTICS
The turn-on and turn-off electrical characteristics of the EPAD
MOSFET products are shown in the Drain-Source On Current vs
Drain-Source On Voltage and Drain-Source On Current vs GateSource Voltage graphs. Each graph show the Drain-Source On
Current versus Drain-Source On Voltage characteristics as a function of Gate-Source voltage in a different operating region under
different bias conditions. As the threshold voltage is tightly specified, the Drain-Source On Current at a given gate input voltage is
better controlled and more predictable when compared to many
other types of MOSFETs.
EPAD MOSFETs behave similarly to a standard MOSFET, therefore classic equations for a n-channel MOSFET applies to EPAD
MOSFET as well. The Drain current in the linear region (VDS <
VGS - VGS(th)) is given by:
IDS = u . COX . W/L . [VGS - VGS(th) - VDS/2] . VDS
where:
u = Mobility
COX = Capacitance / unit area of Gate electrode
VGS = Gate to Source voltage
VGS(th) = Turn-on threshold voltage
VDS = Drain to Source voltage
W = Channel width
L = Channel length
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3 of 10
PERFORMANCE CHARACTERISTICS OF EPAD®
PRECISION MATCHED PAIR MOSFET FAMILY (cont.)
In this region of operation the IDS value is proportional to VDS value
and the device can be used as gate-voltage controlled resistor.
For higher values of VDS where VDS >= VGS - VGS(th), the saturation current IDS is now given by (approx.):
IDS = u . COX . W/L . [VGS - VGS(th)]2
SUB-THRESHOLD REGION OF OPERATION
Low voltage systems, namely those operating at 5V, 3.3V or less,
typically require MOSFETs that have threshold voltage of 1V or
less. The threshold, or turn-on, voltage of the MOSFET is a voltage
below which the MOSFET conduction channel rapidly turns off. For
analog designs, this threshold voltage directly affects the operating
signal voltage range and the operating bias current levels.
power consumed is measure in micro-watts. In other cases, power
dissipation can be reduced to nano-watt region and still provide a
useful and controlled circuit function operation.
ZERO TEMPERATURE COEFFICIENT (ZTC) OPERATION
For an EPAD MOSFET in this product family, there exist operating
points where the various factors that cause the current to increase
as a function of temperature balance out those that cause the current to decrease, thereby canceling each other, and resulting in net
temperature coefficient of near zero. One of these temperature
stable operating points is obtained by a ZTC voltage bias condition, which is 0.55V above a threshold voltage when VGS = VDS,
resulting in a temperature stable current level of about 68µA. For
other ZTC operating points, see ZTC characteristics.
PERFORMANCE CHARACTERISTICS
At or below threshold voltage, an EPAD MOSFET exhibits a turnoff characteristic in an operating region called the subthreshold region. This is when the EPAD MOSFET conduction channel rapidly
turns off as a function of decreasing applied gate voltage. The conduction channel induced by the gate voltage on the gate electrode
decreases exponentially and causes the drain current to decrease
exponentially. However, the conduction channel does not shut off
abruptly with decreasing gate voltage. Rather, it decreases at a
fixed rate of approximately 116mV per decade of drain current decrease. Thus, if the threshold voltage is +0.20V, for example, the
drain current is 1µA at VGS = +0.20V. At VGS = +0.09V, the drain
current would decrease to 0.1µA. Extrapolating from this, the drain
current is 0.01µA (10nA) at VGS = -0.03V, 1nA at VGS = -0.14V,
and so forth. This subthreshold characteristic extends all the way
down to current levels below 1nA and is limited by other currents
such as junction leakage currents.
At a drain current to be declared “zero current” by the user, the
VGS voltage at that zero current can now be estimated. Note that
using the above example, with VGS(th) = +0.20V, the drain current
still hovers around 20nA when the gate is at zero volts, or ground.
Performance characteristics of the EPAD MOSFET product family
are shown in the following graphs. In general, the threshold voltage shift for each member of the product family causes other affected electrical characteristics to shift with an equivalent linear
shift in VGS(th) bias voltage. This linear shift in VGS causes the
subthreshold I-V curves to shift linearly as well. Accordingly, the
subthreshold operating current can be determined by calculating
the gate voltage drop relative to its threshold voltage, VGS(th).
RDS(ON) AT VGS = GROUND
Several of the EPAD MOSFETs produce a fixed resistance when
their gate is grounded. For ALD110800, the drain current is 1µA at
VDS = 0.1V and VGS = 0.0V. Thus just by grounding the gate of the
ALD110800, a resistor with RDS(ON) = ~100KΩ is produced. When
an ALD114804 gate is grounded, the drain current IDS = 18.5µA @
VDS = 0.1V, producing RDS(ON) = 5.4KΩ. Similarly, ALD114813
and ALD114835 produce drain currents of 77µA and 185µA, respectively, at VGS = 0.0V, and RDS(ON) values of 1.3KΩ and 540Ω,
respectively.
LOW POWER AND NANOPOWER
MATCHING CHARACTERISTICS
When supply voltages decrease, the power consumption of a given
load resistor decreases as the square of the supply voltage. So
one of the benefits in reducing supply voltage is to reduce power
consumption. While decreasing power supply voltages and power
consumption go hand-in-hand with decreasing useful AC bandwidth
and at the same time increases noise effects in the circuit, a circuit
designer can make the necessary tradeoffs and adjustments in any
given circuit design and bias the circuit accordingly.
With EPAD MOSFETs, a circuit that performs a specific function
can be designed so that power consumption can be minimized. In
some cases, these circuits operate in low power mode where the
ALD111933, Vers. 2.0
A key benefit of using a matched pair EPAD MOSFET is to maintain temperature tracking. In general, for EPAD MOSFET matched
pair devices, one device of the matched pair has gate leakage currents, junction temperature effects, and drain current temperature
coefficient as a function of bias voltage that cancel out similar effects of the other device, resulting in a temperature stable circuit.
As mentioned earlier, this temperature stability can be further enhanced by biasing the matched-pairs at Zero Tempco (ZTC) point,
even though that could require special circuit configuration and
power consumption design consideration.
Advanced Linear Devices
4 of 10
TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
DRAIN-SOURCE ON CURRENT
(mA)
5
TA = +25°C
VGS - VGS(th) = +5V
4
VGS - VGS(th) = +4V
3
VGS - VGS(th) = +3V
2
VGS - VGS(th) = +2V
1
VGS - VGS(th) = +1V
0
0
2
4
6
8
DRAIN-SOURCE ON RESISTANCE
(Ω)
DRAIN-SOURCE ON RESISTANCE
vs. DRAIN-SOURCE ON CURRENT
2500
TA = +25°C
2000
1500
VGS = VGS(th) + 4V
1000
500
VGS = VGS(th) + 6V
0
10
100
10
DRAIN-SOURCE ON VOLTAGE (V)
10000
TRANSCONDUCTANCE vs.
AMBIENT TEMPERATURE
20
2.5
VGS(th) = -3.5V
TA = +25°C
VDS = +10V
15
VGS(th) = -1.3V
VGS(th) = -0.4V
10
VGS(th) = 0.0V
VGS(th) = +0.2V
VGS(th) = +0.8V
5
VGS(th) = +1.4V
TRANSCONDUCTANCE
(mA/V)
DRAIN-SOURCE ON CURRENT
(mA)
FORWARD TRANSFER CHARACTERISTICS
VGS(th) = +3.3V
0
2
0
-2
4
6
8
10
2.0
1.5
1.0
0.5
0
12
-50
-25
GATE-SOURCE VOLTAGE (V)
DRAIN-SOURCE ON CURRENT
(nA)
TA = +25°C
VDS = +0.1V
VGS
(th) = +3.3V
VGS
(th) = +1.4V
VGS
(th) = +0.8V
1
VGS
(th) = +0.2V
10
VGS
(th) = 0.0V
VGS
(th) = -1.3V
VGS
(th) = -0.4V
1000
100
25
50
75
100
125
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
100000
10000
0
AMBIENT TEMPERATURE (°C)
SUBTHRESHOLD FORWARD TRANSFER
CHARACTERISTICS
DRAIN-SOURCE ON CURRENT
(nA)
1000
DRAIN-SOURCE ON CURRENT (µA)
0.1
0.01
10000
1000
100
VDS = +0.1V
~ 110mV/decade
Slope =
10
1
0.1
0.01
-2
-1
0
1
2
3
4
GATE-SOURCE VOLTAGE (V)
ALD111933, Vers. 2.0
VGS(th)-0.5
VGS(th)-0.4
VGS(th)-0.3
VGS(th)-0.2
VGS(th)-0.1
VGS(th)
GATE-SOURCE VOLTAGE (V)
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5 of 10
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
DRAIN-SOURCE ON CURRENT, BIAS
CURRENT vs. AMBIENT TEMPERATURE
DRAIN-SOURCE ON CURRENT, BIAS
CURRENT vs. AMBIENT TEMPERATURE
100
-55°C
4
-25°C
3
0°C
2
1
+70°C
0
VGS(th)-1
VGS(th)
VGS(th)+1
+125°C
DRAIN-SOURCE ON CURRENT
(µA)
DRAIN-SOURCE ON CURRENT
(mA)
5
+125°C
50
-25°C
0
VGS(th)+3 VGS(th)+4
VGS(th)+2
VGS(th)
VGS(th)+0.2
VGS(th)+0.6
VGS(th)+0.8
GATE- AND DRAIN-SOURCE VOLTAGE
(VGS = VDS) (V)
DRAIN-SOURCE ON CURRENT vs.
DRAIN-SOURCE ON RESISTANCE
GATE-SOURCE VOLTAGE vs.
DRAIN-SOURCE ON CURRENT
VGS(th)+1.0
10000
TA = +25°C
1000
100
VDS = +5V
10
VDS = +0.1V
1
VDS = +1V
0.1
GATE-SOURCE VOLTAGE (V)
VGS(th)+4
0.01
VDS = RON • IDS(ON)
VGS(th)+3
D
VGS(th)+2
VDS
VGS
VDS = +0.5V
TA = +125°C
VDS = +0.5V
TA = +25°C
IDS(ON)
S
VDS = +5V
TA = +125°C
VGS(th)+1
VDS = +5V
TA = +25°C
VGS(th)
VGS(th)-1
0.1
1
10
100
1000
10000
1
0.1
DRAIN-SOURCE ON RESISTANCE (KΩ)
10
100
1000
10000
DRAIN-SOURCE ON CURRENT (µA)
OFFSET VOLTAGE vs.
AMBIENT TEMPERATURE
DRAIN-SOURCE ON CURRENT
vs. OUTPUT VOLTAGE
5
4
3
VDS = +10V
4
TA = +25°C
3
VDS = +5V
2
1
VDS = +1V
OFFSET VOLTAGE
(mV)
DRAIN-SOURCE ON CURRENT
(mA)
VGS(th)+0.4
GATE- AND DRAIN-SOURCE VOLTAGE
(VGS = VDS) (V)
100000
DRAIN-SOURCE ON CURRENT
(µA)
Zero Temperature
Coefficient (ZTC)
REPRESENTATIVE UNITS
2
1
0
-1
-2
-3
0
-4
VGS(th)
VGS(th)+1
VGS(th)+2
VGS(th)+3
VGS(th)+4 VGS(th)+5
OUTPUT VOLTAGE (V)
ALD111933, Vers. 2.0
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
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6 of 10
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
GATE SOURCE VOLTAGE vs.
DRAIN-SOURCE ON RESISTANCE
GATE LEAKAGE CURRENT
vs. AMBIENT TEMPERATURE
VGS(th)+4
GATE-SOURCE VOLTAGE (V)
GATE LEAKAGE CURRENT
(pA)
10000
1000
100
10
1
IGSS
0.1
0.0V ≤ VDS ≤ 5.0V
VGS(th)+3
+125°C
D
VGS(th)+2
-50
S
VGS(th)+1
-25
0
25
50
75
100
0
125
AMBIENT TEMPERATURE (°C)
2
4
6
8
10
DRAIN-SOURCE ON RESISTANCE (KΩ)
DRAIN-GATE DIODE CONNECTED VOLTAGE
TEMPCO vs. DRAIN-SOURCE ON CURRENT
TRANSFER CHARACTERISTICS
1.6
5
-55°C ≤ TA ≤ +125°C
TRANSCONDUCTANCE
(mΩ-1)
DRAIN-GATE DIODE CONNECTED
VOLTAGE TEMPCO (mV/°C)
IDS(ON)
VGS
+25°C
VGS(th)
0.01
2.5
0
-2.5
VGS(th) = -3.5V
TA = +25°C
VDS = +10V
VGS(th) = -1.3V
VGS(th) = -0.4V
1.2
0.8
VGS(th) = 0.0V
VGS(th) = +0.2V
0.4
VGS(th) = +0.8V
VGS(th) = +1.4V
VGS(th) = +3.3V
0.0
-5
1
100
10
1000
-2
4
2
0
6
8
12
10
DRAIN-SOURCE ON CURRENT (µA)
GATE-SOURCE VOLTAGE (V)
ZERO TEMPERATURE
COEFFICIENT CHARACTERISTICS
SUBTHRESHOLD CHARACTERISTICS
0.6
2.5
VGS(th) = -3.5V
GATE-SOURCE VOLTAGE
(V)
GATE-SOURCE VOLTAGE
(V)
VDS
0.5
VGS(th) = -1.3V, -0.4V, 0.0V, +0.2V, +0.8V, +1.4V
0.3
0.2
2.0
1.5
1.0
0.1
0.2
0.5
1.0
2.0
0.0
5.0
VGS(th) = +0.2V
TA = +25°C
100000 10000
VGS(th) = +0.2V
TA = +55°C
1000
100
10
1
0.1
DRAIN-SOURCE ON CURRENT (nA)
DRAIN-SOURCE ON VOLTAGE (V)
ALD111933, Vers. 2.0
VGS(th) = +0.4V
TA = +55°C
0.5
-0.5
0.0
VGS(th) = +0.4V
TA = +25°C
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7 of 10
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)
TRANCONDUCTANCE vs.
DRAIN-SOURCE ON CURRENT
THRESHOLD VOLTAGE vs.
AMBIENT TEMPERATURE
4.0
TA = +25°C
VDS = +10V
THRESHOLD VOTAGE
(V)
TARNCONDUCTANCE
(m Ω-1)
1.2
0.9
0.6
0.3
Vt = +3.3V
3.0
IDS = +1µA
VDS = +0.1V
2.0
Vt = +1.4V
1.0
Vt = 0.0V
Vt = +0.8V
Vt = +0.2V
Vt = +0.4V
0.0
0.0
0
2
4
6
8
10
-50
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
NORMALIZED SUBTHRESHOLD
CHARACTERISTICS RELATIVE TO
GATE THRESHOLD VOLTAGE
SUBTHRESHOLD FORWARD
TRANSFER CHARACTERISTICS
125
4.0
0.3
VGS(th) = +3.3V
0.2
THRESHOLD VOLTAGE
(V)
GATE-SOURCE VOLTAGE
VGS - VGS(th) (V)
-25
DRAIN-SOURCE ON CURRENT (mA)
VDS = +0.1V
0.1
0
-0.1
+25°C
-0.2
+55°C
-0.3
-0.4
3.0
2.0
IDS = +1µA
VDS = +0.1V
VGS(th) = +1.4V
1.0
VGS(th) = 0.0V
0.0
VGS(th) = -0.4V
-1.0
VGS(th) = -1.3V
-2.0
10000
1000
100
10
1
0.1
DRAIN-SOURCE ON CURRENT (nA)
ALD111933, Vers. 2.0
-25
25
75
125
AMBIENT TEMPERATURE (°C)
Advanced Linear Devices
8 of 10
SOIC-8 PACKAGE DRAWING
8 Pin Plastic SOIC Package
E
Millimeters
Dim
S (45°)
D
A
Min
1.35
Max
1.75
Min
0.053
Max
0.069
A1
0.10
0.25
0.004
0.010
b
0.35
0.45
0.014
0.018
C
0.18
0.25
0.007
0.010
D-8
4.69
5.00
0.185
0.196
E
3.50
4.05
0.140
0.160
1.27 BSC
e
A
A1
e
b
Inches
0.050 BSC
H
5.70
6.30
0.224
0.248
L
0.60
0.937
0.024
0.037
ø
0°
8°
0°
8°
S
0.25
0.50
0.010
0.020
S (45°)
H
L
ALD111933, Vers. 2.0
C
ø
Advanced Linear Devices
9 of 10
PDIP-8 PACKAGE DRAWING
8 Pin Plastic DIP Package
E
E1
Millimeters
D
S
A2
A1
e
b
b1
A
L
Inches
Dim
Min
Max
Min
Max
A
3.81
5.08
0.105
0.200
A1
0.38
1.27
0.015
0.050
A2
1.27
2.03
0.050
0.080
b
0.89
1.65
0.035
0.065
b1
0.38
0.51
0.015
0.020
c
0.20
0.30
0.008
0.012
D-8
9.40
11.68
0.370
0.460
E
5.59
7.11
0.220
0.280
E1
7.62
8.26
0.300
0.325
e
2.29
2.79
0.090
0.110
e1
L
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
S-8
1.02
2.03
0.040
0.080
0°
15°
0°
15°
ø
c
e1
ALD111933, Vers. 2.0
ø
Advanced Linear Devices
10 of 10
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