FSA2267 / FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch Features ? ? ? ? ? ? ? Description Typical 0.35 On Resistance (RON) for +2.7V Supply FSA2267A Features <10µA ICCT Current when S Input is Lower than VCC RON Fatness for +2.7V Supply: 0.25 Maximum 1.6mm x 2.1mm 10-Lead MicroPak™ Package Broad VCC Operating Range Low THD (0.02% Typical for 32Load) High Current Handling Capability (350mA Continuous Current <3.3V Supply) Applications ? ? ? Cell phone PDA Portable Media Player The FSA2267 and FSA2267A are Dual Single Pole Double Throw (SPDT) analog switches. The FSA2267 operates from a single 1.65V to 3.6V supply, while the FSA2267A operates from a single 2.3V to 4.3V supply. Each features an ultra-low On Resistance of 0.35 at a +2.7V supply and 25°C. Both devices are fabricated with sub-micron CMOS technology to achieve fast switching speeds and designed for break-before-make operation. FSA2267A features very low quiescent current, even when the control voltage is lower than the VCC supply. This feature services the mobile handset applications very well, allowing for the direct interface with baseband processor general-purpose I/Os. Ordering Information Order Number Top Mark Package Description Packing Method FSA2267L10X FC 10-Lead MicroPak, 1.6 x 2.1mm, JEDEC MO-255 5000 Units on Tape and Reel FSA2267AL10X FD 10-Lead MicroPak, 1.6 x 2.1mm, JEDEC MO-255 5000 Units on Tape and Reel FSA2267AMUX FSA 2267A 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide 4000 Units on Tape and Reel . Figure 1. Application Diagram © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch March 2012 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch Analog Symbols 1B0 1B1 1A 1S 2B0 2B1 2A 2S Figure 2. Analog Symbol Connections Diagram Vcc 1B0 1 10 Vcc 1B1 2 9 1A 2B0 3 8 1S 2B1 4 7 2S GND 5 6 2A 10 9 1A 2 8 1S 2B0 3 7 2S 2B1 4 6 2A 1B0 1 1B1 5 GND Figure 4. 10-Lead Micropak Figure 3. 10-Lead MSOP Truth Table Control Input(s) Function LOW Logic Level B0 Connected to A HIGH Logic Level B1 Connected to A Pin Descriptions Pin Name 1, 2, 3, 4, 6, 9 1B0, 1B1, 2B0, 2B1, 2A, 1A Data Ports 8, 7 1S, 2S Control Input 10 VCC Supply Voltage 5 GND Ground © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267ARev. 1.0.5 Function www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.. Symbol Parameter Min. Max. Unit Supply Voltage -0.5 +5.5 V VS Switch Voltage(1) -0.5 VCC + 0.5 V VIN Control Input Voltage(1) -0.5 5.5 V VCC Current(2) IIK Input Diode ISW Switch Current 350 mA Peak Switch Current (Pulsed at 1ms Duration, <10% Duty Cycle) 500 mA +150 °C ISWPEAK TSTG -50 Storage Temperature Range -65 mA TJ Maximum Junction Temperature +150 °C TL Lead Temperature (Soldering, 10 Seconds) +260 °C Human Body Model: FSA2267 7500 V Human Body Model, JESD22-A114:FSA2267A 7000 V Charged Device Model, JESD22-C101: FSA2267/FSA2267A 1000 V ESD Notes: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. 2. Minimums define the acceptable range of current. Negative current should not exceed minimun negative values. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Supply Voltage VCC Unit V FSA2267 1.65 FSA2267A 3.6 V 2.3 4.3 VIN Control Input Voltage(3) 0 VCC V VSW Switch Input Voltage 0 VCC V -40 +85 °C TA Operating Temperature Note: 3. Unused inputs must be held HIGH or LOW. They may not float. © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267ARev. 1.0.5 www.fairchildsemi.com 3 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch Absolute Maximum Ratings ESD Performance of the FSA2267/FSA2267A FSA2267 ? HBM all pins 7.0kV ? CDM all pins 1.0kV FSA2267A HBM all pins 7.5kV ? CDM all pins 1.0kV ? Figure 5. Human Body ESD Test Model Human Body Model Figure 5 shows the schematic representation of the Human Body Model ESD event. Figure 6 is the ideal waveform representation of the Human Body Model. The device is tested to JEDEC: JESD22-A114 Human Body Model. Charged Device Model In manufacturing test and handling environments, a more useful model is the Charged Device Model and the FSA2267/FSA2267A has a very good ESD immunity to this model. The device is tested to JEDEC: JESD22C101 Charged Device Model. Figure 6. HBM Current Waveform IEC 61000-4-2 The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment and evaluates the equipment in its entirety for ESD immunity. Fairchild Semiconductor has evaluated this device using the IEC 6100-4-2 representative system model depicted in Figure 7. ESD values measured via the IEC 61000-4-2 evaluation method are influenced by the specific board layout, board size, and many other factors of the manufacturer’s product application. Measured system ESD values cannot be guaranteed by Fairchild Semiconductor to exactly correlate to a manufacturer’s in-house testing due to these application environment variables. Fairchild Semiconductor has been able to determine that, for ultra-portable applications, an enhanced ESD immunity, relative to the IEC 61000-4-2 specification, can be achieved with the inclusion of a 100series resistor in the VCC supply path to the analog switch (see Figure 8). Typical improvements of between 3-6kV of ESD immunity (I/O to GND) have been measured with the inclusion of the resistor with the IEC 61000-4-2 representative model. For more information on ESD testing methodologies, please refer to: AN-6019 Fairchild Analog Switch Products ESD Test Methodology Overview http://www.fairchildsemi.com/an/AN/AN-6019.pdf. Figure 7. IEC 61000-4-2 ESD Test Model Analog Switch Supply Rail 100 1B0 Additional ESD Test Conditions VCC 1B1 1A 2B0 1S 2B1 2A ESD Event 2S For information regarding test methodologies and performance levels, please contact Fairchild Semiconductor. Ultra-portable Connector Figure 8. ESD Immunity with 100Resistor © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 4 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch ESD Protection All typical values are at 25°C unless otherwise specified. Symbol Parameter VCC Conditions (V) VIH VIL IIN Input Voltage High Input Voltage Low Control Input Leakage INO(OFF), Off-Leakage Current of INC(OFF) Port nB0 and nB1 IA(ON) RON RON On Leakage Current of Port 1A and 2A Switch On Resistance(4) See Figure 9 On Resistance Matching Between Channels(5) RFLAT(ON) On Resistance Flatness(6) ICC VIN = 0V to VCC TA= 40 to +85C Units Min. Typ. Max. Min. Max. TA = +25C 2.7 to 3.6 2.0 2.3 to 2.7 1.7 1.65 to 1.95 0.65 VCC V 2.7 to 3.6 0.8 2.3 to 2.7 0.7 1.65 to 1.95 0.35 VCC 1.65 to 3.6 -0.5 0.5 5.0 -50 50 -5.0 5.0 -50 50 1.95 -5.0 5.0 -50 50 nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating 3.6 -5.0 5.0 -50 50 nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating 2.7 -5.0 5.0 -50 50 nA = 0.3V, 1.65V, nB0 or nB1 = 0.3V, 1.65V or floating 1.95 -5.0 5.0 -50 50 IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.0V, 2.7V 2.7 0.35 0.60 IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 1.6V, 2.3V 2.3 0.45 0.75 IOUT = 100mA, nB0 or nB1 = 0.8V 1.65 1.0 3.9 2.7 0.040 0.075 2.3 0.040 0.080 1.65 0.1 nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating 3.6 -5.0 nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating 2.7 nA = 0.3V, 1.65V, nB0 or nB1 = 0.3V, 1.65V or floating IOUT = 100mA, nB0 or nB1 = 0.7V IOUT = 100mA, nB0 or nB1 = 0V to VCC Quiescent Supply Current VIN = 0V or VCC, IOUT = 0A V A nA nA 2.7 0.25 2.3 0.3 500 nA 1.65 3.6 0.3 -100 100 -500 Notes: 4. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 5. RON = RONmax - RONmin measured at identical VCC, temperature, and voltage. 6. Flatness is defined as the difference between the maximum and minimum value of RON over the specified range of conditions. © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 5 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch FSA2267 DC Electrical Characteristics All typical values are at 25°C unless otherwise specified. Symbol Parameter VCC Conditions (V) VIH VIL IIN Input Voltage High Input Voltage Low Control Input Leakage INO(OFF), Off-Leakage Current of INC(OFF) Port nB0 and nB1 IA(ON) RON RON RFLAT(ON) On Leakage Current of Port 1A and 2A Switch On Resistance(7) On Resistance Matching Between Channels(8) See Figure 10 On Resistance Flatness(9) VIN = 0V to VCC TA= 40 to +85C Units Min. Typ. Max. Min. Max. TA = +25C 3.6 to 4.3 1.7 2.7 to 3.6 1.5 2.3 to 2.7 1.4 V 3.6 to 4.3 0.7 2.7 to 3.6 0.5 2.3 to 2.7 0.4 2.3 to 4.3 -0.5 0.5 10.0 -100 100 -5.0 5.0 -50 50 2.7 -5.0 5.0 -50 50 nA = 0.3V, 4.0V, nB0 or nB1 = 0.3V, 4.0V or floating 4.3 -20.0 20.0 -200 200 nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating 3.6 -5.0 5.0 -50 50 nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating 2.7 -5.0 5.0 -50 50 IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 3.6V, 4.3V 4.3 0.35 0.6 IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.3V, 3.0V 3.0 0.35 0.6 IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.0V, 2.7V 2.7 0.35 0.6 IOUT = 100mA, nB0 or nB1 = 0.8V 1.65 1.0 4.3 0.04 0.075 3.0 0.04 0.075 2.7 0.04 0.075 1.65 0.1 4.3 0.15 0.25 3.0 0.15 0.25 2.7 0.15 0.25 1.65 0.3 nA = 0.3V, 4.0V, nB0 or nB1 = 4.0V, 0.3V or floating 4.3 -10.0 nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating 3.6 nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating IOUT = 100mA, nB0 or nB1 = 0.7V IOUT = 100mA, nB0 or nB1 = 0V to VCC ICC Quiescent Supply Current VIN = 0V or VCC, IOUT = 0A ICCT Increase in ICC per Input VIN = 1.8V 4.3 4.3 VIN = 2.6V -100 80 100 -500 500 7.0 10.0 15.0 0.5 2.0 7.0 V µA nA nA nA µA Notes: 7. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 8. RON = RONmax - RONmin measured at identical VCC, temperature, and voltage. 9. Flatness is defined as the difference between the maximum and minimum value of RON over the specified range of conditions. © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 6 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch FSA2267A DC Electrical Characteristics All typical values are at 25°C unless otherwise specified. Symbol tON tOFF tBBM Q OIRR Xtalk BW THD Parameter Turn-On Time Turn-Off Time Break-BeforeMake Time Charge Injection Off Isolation Crosstalk -3db Bandwidth Total Harmonic Distortion VCC (V) Conditions TA= -40 to Figure +85°C Units Number Min. Typ. Max. Min. Max. 2.7 to 3.6 30.0 38.0 2.3 to 2.7 29.0 37.0 40.0 1.65 to 1.95 27.0 35.0 38.0 2.7 to 3.6 13.0 16.0 18.0 2.3 to 2.7 14.0 18.0 20.0 1.65 to 1.95 15.0 21.0 25.0 2.7 to 3.6 17.0 2.3 to 2.7 15.0 2.0 1.65 to 1.95 12.0 2.0 CL = 100 pF, VGEN = 0V, RGEN = 0 2.7 to 3.6 9.0 CL = 100 pF, VGEN = 0V, RGEN = 0 2.3 to 2.7 9.0 CL = 100 pF, VGEN = 0V, RGEN = 0 1.65 to 1.95 9.0 nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF f = 100kHz, RL = 50, CL = 5pF (Stray) f = 100kHz, RL = 50, CL = 5pF (Stray) 2.7 to 3.6 -80.0 2.3 to 2.7 -80.0 1.65 to 1.95 -80.0 2.7 to 3.6 -80.0 2.3 to 2.7 -80.0 1.65 to 1.95 -80.0 RL = 50 1.65 to 3.6 45.0 RL = 32, VIN = 2Vpk-pk, f = 20Hz to 20kHz 2.7 to 3.6 0.024 RL = 32, VIN = 1.5Vpk-pk, f = 20Hz to 20kHz 2.3 to 2.7 0.015 RL = 32, VIN = 1.2Vpk-pk, f = 20Hz to 20kHz 1.65 to 1.95 0.35 © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267ARev. 1.0.5 TA = +25°C 42.0 ns Figure 11 ns Figure 11 ns Figure 12 pC Figure 14 dB Figure 13 dB Figure 13 MHz Figure 16 % Figure 17 2.0 www.fairchildsemi.com 7 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch FSA2267 AC Electrical Characteristics All typical value are at 25°C unless otherwise specified. Symbol Parameter VCC (V) Conditions TA = +25°C TA= -40 to +85°C Units Figure Number Min. Typ. Max. Min. Max. tON tOFF tBBM Q OIRR Xtalk BW THD Turn-On Time Turn-Off Time Break-BeforeMake Time Charge Injection Off Isolation nB0 or nB1 = 1.5V, RL = 50, CL = 35pF nB0 or nB1 = 1.5V, RL = 50, CL = 35pF -3db Bandwidth Total Harmonic Distortion 37.0 46.0 48.0 2.7 to 3.6 37.0 50.0 57.0 2.3 to 2.7 60 1.65 570 3.6 to 4.3 15.0 23.0 25.0 2.7 to 3.6 16.0 30.0 30.0 2.3 to 2.7 50.0 1.65 500 3.6 to 4.3 8.0 2.0 2.7 to 3.6 8.0 2.0 2.3 to 2.7 8.0 2.0 CL = 100 pF, VGEN = 0V, RGEN = 0 3.6 to 4.3 24.0 CL = 100 pF, VGEN = 0V, RGEN = 0 2.7 to 3.6 24.0 CL = 100 pF, VGEN = 0V, RGEN = 0 2.3 to 2.7 24.0 nB0 or nB1 = 1.5V, RL = 50, CL = 35pF 3.6 to 4.3 -75.0 2.7 to 3.6 -75.0 2.3 to 2.7 -75.0 3.6 to 4.3 -70.0 2.7 to 3.6 -70.0 2.3 to 2.7 -70.0 RL = 50 2.3 to 4.3 45.0 RL = 32, VIN = 2Vpk-pk, f = 20Hz to 20kHz 3.6 to 4.3 0.02 RL = 32, VIN = 1.5Vpk-pk, f = 20Hz to 20kHz 2.7 to 3.6 0.02 RL = 32, VIN = 1.2Vpk-pk, f = 20Hz to 20kHz 2.3 to 2.7 0.02 VCC (V) TA = +25°C f = 100kHz, RL = 50, CL = 5pF (Stray) f = 100kHz, RL = 50, CL = 5pF (Stray) Crosstalk 3.6 to 4.3 ns Figure 11 ns Figure 11 ns Figure 12 pC Figure 14 dB Figure 13 dB Figure 13 MHz Figure 16 % Figure 17 Capacitance Symbol Parameter Conditions TA= -40 to +85°C Units Figure Number Min. Typ. Max. Min. Max. CIN 0.0 1.5 pF Figure 15 f = 1Mhz 3.3 30.0 pF Figure 15 f = 1Mhz 3.3 126 pF Figure 15 Control Pin Input Capacitance f = 1Mhz COFF B Port Off Capacitance CON A Port On Capacitance © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267ARev. 1.0.5 www.fairchildsemi.com 8 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch FSA2267A AC Electrical Characteristics FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch Typical Characteristics Figure 9. RON at 2.7V for FSA2267 Figure 10. RON at 2.7V for FSA2267A © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267ARev. 1.0.5 www.fairchildsemi.com 9 CL includes Fixture and Stray Capacitance. Logic input waveforms are inverted for switches with opposite logic sense. Figure 11. Turn-On/Turn-Off Timing CL Includes Fixture and Stray Capacitance Figure 12. Break-Before-Make Timing Figure 13. Off Isolation and Crosstalk © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 10 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch AC Loading and Waveforms FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch AC Loading and Waveforms (Continued) Q = (DVOUT)(CL) Figure 14. Charge Injection Figure 15. On/Off Capacitance Measurement Setup Figure 16. Bandwidth Figure 17. Harmonic Distortion © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 11 1.62 B KEEPOUT ZONE, N OR VIAS ALLOWED (0.11) 0.56 1.12 1.60 IDENT IS ER THAN ER LINES 0.10 C 2X TOP VIEW (0.35) 10X (0.25) 10X 0.50 RECOMMENDED LAND PATTERN 0.55 MAX 0.05 C 0.05 C 0.05 0.00 (0.20) C 0.35 0.25 SIDE VIEW (0.15) D 0.65 0.55 AIL A 0.35 0.25 (0.36) 0.35 0.25 DETAIL A 2X SCALE 4 1 0.56 5 10 (0.29) 0.35 9X 0.25 6 9 0.50 0.25 9X 0.15 1.62 0.10 0.05 C A B C ALL FEATURES BOTTOM VIEW NOTES: A. PACKAGE CONFORMS TO JEDEC REGISTRATION MO-255, VARIATION UABD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. PRESENCE OF CENTER PAD IS PACKAGE SUPPLIER DEPENDENT. IF PRESENT IS NOT INTENDED TO BE SOLDERED A HAS A BLACK OXIDE FINISH. E. DRAWING FILENAME: MKT-MAC10Arev5. Figure 18. 10-Lead, MicroPak™, 1.6 x 2.1mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 12 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch Physical Dimensions 2X FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch Physical Dimensions Figure 19. Pb-Free, 10-Lead, Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area: http://www.fairchildsemi.com/products/analog/pdf/msop10_tr.pdf. © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 13 FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch © 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.5 www.fairchildsemi.com 14