LINER LTC4089 Usb power manager with high voltage switching charger Datasheet

LTC4089/LTC4089-5
USB Power Manager with
High Voltage Switching Charger
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
■
Seamless Transition Between Power Sources: Li-Ion
Battery, USB, and 6V to 36V External Supply
High Efﬁciency 1.2A Charger from 6V to 36V Input
with Adaptive Output Control (LTC4089)
Load Dependent Charging from USB Input
Guarantees Current Compliance
215m Internal Ideal Diode plus Optional External
Ideal Diode Controller Provides Low Loss Power
Path When External Supply/USB Not Present
Constant-Current/Constant-Voltage Operation with
Thermal Feedback to Maximize Charging Rate
without Risk of Overheating
Selectable 100% or 20% Current Limit (e.g., 500mA/
100mA) from USB Input
Preset 4.2V Charge Voltage with 0.8% Accuracy
C/10 Charge Current Detection Output
NTC Thermistor Input for Temperature Qualiﬁed
Charging
Tiny (6mm 3mm 0.75mm) 22-Pin DFN Package
U
APPLICATIO S
■
The LTC®4089/LTC4089-5 are USB power managers plus
high voltage Li-Ion battery chargers. These devices control
the total current used by the USB peripheral for operation
and battery charging. Battery charge current is automatically reduced such that the sum of the load current and
the charge current does not exceed the programmed input
current limit. The LTC4089/LTC4089-5 also accommodate
high voltage power supplies, such as 12V AC-DC wall
adapters, FireWire, or automotive power.
The LTC4089 provides an adaptive output that tracks the
battery voltage for high efﬁciency charging from the high
voltage input. The LTC4089-5 provides a ﬁxed 5V output
from the high voltage input to charge single cell Li-Ion
batteries. The charge current is programmable and an
end-of-charge status output (CHRG) indicates full charge.
Also featured is programmable total charge time, an NTC
thermistor input used to monitor battery temperature while
charging and automatic recharging of the battery.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Burst Mode is a registered trademark of Linear Technology Corporation.
Protected by U.S. Patents including 6522118 and 6700364.
Portable USB Devices—GPS Receivers, Cameras,
MP3 Players, PDAs
U
TYPICAL APPLICATIO
0.1µF
HIGH (6V-36V)
VOLTAGE INPUT
1µF
90
CC CURRENT = 970mA
85 NO OUTPUT LOAD
FIGURE 10 SCHEMATIC
80 WITH R
PROG = 52k
SW
BOOST
HVIN
LTC4089 High Voltage
Battery Charger Efﬁciency
10µH
10µF
HVEN
5V (NOM)
FROM USB
CABLE VBUS
IN
HVPR
LTC4089
4.7µF
1k
4.7µF
OUT
TO LDOs
REGS, ETC.
EFFICIENCY (%)
HVOUT
2k
75
70
65
LTC4089-5
60
55
BAT
HVIN = 8V
HVIN = 12V
HVIN = 24V
HVIN = 36V
50
TIMER
CLPROG GND PROG
0.1µF
LTC4089
45
100k
+
Li-Ion BATTERY
VOUT (TYP)
VBAT +0.3V
5V
5V
VBAT
AVAILABLE INPUT
HV INPUT (LTC4089)
HV INPUT (LTC4089-5)
USB ONLY
BAT ONLY
40
2.5
3.5
3
4
BATTERY VOLTAGE (V)
4.5
4089 TA01b
4089 TAO1
40895fb
1
LTC4089/LTC4089-5
W W
U
W
ABSOLUTE
AXI U RATI GS
U
W
U
PACKAGE/ORDER I FOR ATIO
(Notes 1, 2, 3, 4, 5)
TOP VIEW
Terminal Voltage
BOOST ...................................................... –0.3V to 50V
BOOST above SW .....................................................25V
HVIN, HVEN .............................................. –0.3V to 40V
IN, OUT, HVOUT
t < 1ms and Duty Cycle < 1% .................. –0.3V to 7V
DC............................................................ –0.3V to 6V
BAT .............................................................. –0.3V to 6V
NTC, TIMER, PROG, CLPROG .......–0.3V to (VCC + 0.3V)
CHRG, HPWR, SUSP, HVPR......................... –0.3V to 6V
Pin Current, DC
IN, OUT, BAT (Note 6) ..............................................2.5A
Operating Temperature Range
LTC4089E................................................. –40°C to 85°C
Maximum Operating Junction Temperature .......... 110°C
Storage Temperature Range................... –65°C to 125°C
GND
1
22 HVEN
GND
2
21 HVIN
HVOUT
3
20 BOOST
VC
4
19 SW
NTC
5
18 HVOUT
23
17 TIMER
VNTC
6
HVPR
7
16 SUSP
CHRG
8
15 HPWR
PROG
9
14 CLPROG
13 OUT
GATE 10
12 IN
BAT 11
DJC PACKAGE
22-LEAD (6mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 23) IS GND
(MUST BE SOLDERED TO PCB)
TJMAX = 110°C, JA = 40°C/W
ORDER PART NUMBER
DJC PART MARKING
LTC4089EDJC
LTC4089EDJC-5
4089
40895
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. HVIN = 12V, BOOST = 17V, VIN = 5V, VBAT = 3.7V, HVEN = 12V,
HPWR = 5V, RPROG = 100k, RCLPROG = 2k, SUSP = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
USB Input Current Limit
VIN
USB Input Supply Voltage
IN
●
IIN
Input Bias Current
IBAT = 0 (Note 7)
Suspend Mode; SUSP = 5V
●
●
ILIM
Current Limit
RCLPROG = 2k, HPWR = 5V
RCLPROG = 2k, HPWR = 0V
●
●
IIN(MAX)
Maximum Input Current Limit
(Note 8)
RON
ON Resistance VIN to VOUT
IOUT = 80mA Load
VCLPROG
CLPROG Pin Voltage
RCLPROG = 2k
RCLPROG = 1k
ISS
Soft-Start Inrush Current
IN
VCLEN
Input Current Limit Enable
Threshold Voltage (VIN – VOUT)
(VIN – VOUT) VIN Rising
(VIN – VOUT) VIN Falling
4.35
475
90
5.5
V
0.5
50
1
100
mA
µA
500
100
525
110
mA
mA
2.4
A
0.215
●
●
0.98
0.98
1.00
1.00
20
–80
50
–50
1.02
1.02
5
V
V
mA/µs
80
–20
mV
mV
40895fb
2
LTC4089/LTC4089-5
ELECTRICAL CHARACTERISTICS
The ● denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. HVIN = 12V, BOOST = 17V, VIN = 5V, VBAT = 3.7V, HVEN = 12V,
HPWR = 5V, RPROG = 100k, RCLPROG = 2k, SUSP = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VUVLO
Input Undervoltage Lockout
VIN Powers Part, Rising Threshold
dVUVLO
Input Undervoltage Lockout
Hysteresis
VIN Rising – VIN Falling
●
MIN
TYP
MAX
3.6
3.8
4
130
UNITS
V
mV
High Voltage Regulator
VHVIN
HVIN Supply Voltage
6
IHVIN
HVIN Bias Current
Not Switching
Shutdown; HVEN = 0V
VOUT
Output Voltage with HVIN Present
Assumes HVOUT to OUT Connection (LTC4089)
Assumes HVOUT to OUT Connection (LTC4089-5)
●
36
V
1.9
0.01
2.5
2
mA
µA
VBAT+0.3
5
4.6
5.15
V
V
4.7
5
V
685
750
35
815
88
95
1.5
1.95
3.45
4.85
VHVUVLO
High Voltage Input Undervoltage
Lockout
VHVIN Rising
fSW
Switching Frequency
VHVOUT > 3.95V
VHVOUT = 0V
DCMAX
Maximum Duty Cycle
ISW(MAX)
Switch Current Limit
(Note 9)
VSAT
Switch VCESAT
ISW = 1A
ILK
Switch Leakage Current
VSWD
Minimum Boost Voltage Above SW
ISW = 1A
1.85
2.2
V
IBST
BOOST Pin Current
ISW = 1A
30
50
mA
4.3
V
15
22
60
27
35
100
µA
µA
µA
4.165
4.158
4.200
4.200
4.235
4.242
V
V
●
465
900
500
1000
535
1080
mA
mA
●
kHz
kHz
%
2.3
330
A
mV
2
µA
Battery Management
VBAT
Input Voltage
BAT
IBAT
Battery Drain Current
VBAT = 4.3V, Charging Stopped
Suspend Mode; SUSP = 5V
VHVIN = VIN = 0V, BAT Powers OUT, No Load
VFLOAT
Regulated Output Voltage
IBAT = 2mA
IBAT = 2mA; (0°C – 85°C)
ICHG
Current Mode Charge Current
RPROG = 100k, No Load
RPROG = 50k, No Load; (0°C – 85°C)
●
●
●
ICHG(MAX)
Maximum Charge Current
(Note 8)
VPROG
PROG Pin Voltage
RPROG = 100k
RPROG = 50k
●
●
0.98
0.98
1.00
1.00
1.02
1.02
V
V
kEOC
Ratio of End-of-Charge Current to
Charge Current
VBAT = VFLOAT (4.2V)
●
0.085
0.1
0.11
mA/mA
ITRIKL
Trickle Charge Current
VBAT = 2V, RPROG = 100k
35
50
60
mA
VTRIKL
Trickle Charge Threshold Voltage
●
2.75
2.9
3
V
VCEN
Charger Enable Threshold Voltage
VRECHRG
Recharge Battery Threshold Voltage VFLOAT - VRECHRG
tTIMER
TIMER Accuracy
VBAT = 4.3V
Recharge Time
Percent of Total Charge Time
50
%
Low Battery Trickle Charge Time
Percent of Total Charge Time, VBAT < 2.8V
25
%
105
°C
TLIM
Junction Temperature in Constant
Temperature Mode
1.2
(VOUT – VBAT) Falling; VBAT = 4V
(VOUT – VBAT) Rising; VBAT = 4V
A
55
80
●
65
100
–10
mV
mV
135
mV
10
%
40895fb
3
LTC4089/LTC4089-5
ELECTRICAL CHARACTERISTICS
The ● denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. HVIN = 12V, BOOST = 17V, VIN = 5V, VBAT = 3.7V, HVEN = 12V,
HPWR = 5V, RPROG = 100k, RCLPROG = 2k, SUSP = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Internal Ideal Diode
RFWD
Incremental Resistance, VON
Regulation
IBAT = 100mA
125
RDIO,ON
ON Resistance VBAT to VOUT
IBAT = 600mA
215
VFWD
Voltage Forward Drop (VBAT - VOUT) IBAT = 5mA
IBAT = 100mA
IBAT = 600mA
VOFF
Diode Disable Battery Voltage
2.8
V
IFWD
Load Current Limit, for VON
Regulation
550
mA
ID(MAX)
Diode Current Limit
2.2
A
20
mV
●
10
30
55
160
m
m
50
mV
mV
mV
External Ideal Diode
VFWD, EXT
External Diode Forward Voltage
Logic
●
VOL
Output Low Voltage (CHRG, HVPR)
ISINK = 5mA
0.1
VIH
Input High Voltage
HVEN, SUSP, HPWR Pin Low to High
VIL
Input Low Voltage
HVEN, SUSP, HPWR Pin High to Low
IPULLDN
Logic Input Pull Down Current
SUSP, HPWR
2
IHVEN
HVEN Pin Bias Current
VHVEN = 2.3V
VHVEN = 0V
6
0.01
VCHG,SD
Charger Shutdown Threshold
Voltage on TIMER
ICHG,SD
Charger Shutdown Pull-Up Current
on TIMER
IVNTC
0.4
2.3
V
V
0.3
V
µA
20
0.1
µA
µA
0.4
V
●
0.14
VTIMER = 0V
●
5
14
VNTC Pin Current
VVNTC = 2.5V
●
1.4
2.5
VVNTC
VNTC Bias Voltage
IVNTC = 500µA
●
4.4
4.85
INTC
NTC Input Leakage Current
VNTC = 1V
VCOLD
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
0.74•VVNTC
0.02•VVNTC
V
V
VHOT
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
0.29•VVNTC
0.01•VVNTC
V
V
VDIS
NTC Disable Voltage
NTC Input Voltage to GND (Falling)
Hysteresis
µA
NTC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: VCC is the greater of VIN, VOUT or VBAT
Note 3: All voltage values are with respect to GND.
Note 4: This IC includes over-temperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 110°C when over-temperature protection is
active. Continuous operation above the speciﬁed maximum operating
junction temperature may result in device degradation or failure.
0
●
75
100
35
3.5
mA
V
±1
125
µA
mV
mV
Note 5: The LTC4089/LTC4089-5 are guaranteed to meet speciﬁed
performance from 0°C to 85°C and are designed, characterized and
expected to meet these extended temperature limits, but are not tested
at –40°C and 85°C.
Note 6: Guaranteed by long term current density limitations.
Note 7: Total input current is equal to this speciﬁcation plus 1.002 • IBAT
where IBAT is the charge current.
Note 8: Accuracy of programmed current may degrade for currents greater
than 1.5A.
Note 9: Current limit guaranteed by design and/or correlation to static test.
Slope compensation reduces current limit at high duty cycle.
40895fb
4
LTC4089/LTC4089-5
TYPICAL PERFORMANCE CHARACTERISTICS
Battery Regulation (Float)
Voltage vs Temperature
VFLOAT Load Regulation
4.30
TA = 25°C, unless otherwise speciﬁed.
4.220
RPROG = 34k
5
VIN = 5V
IBAT = 2mA
4.215
4.25
Battery Current and Voltage vs
Time (LTC4089)
4
VFLOAT (V)
4.200
4.195
4.10
4.190
0
200
400
600
IBAT (mA)
1000
800
4.180
–50
–25
0
50
25
TEMPERATURE (°C)
75
1250mAh
CELL
HVIN = 12V
RPROG = 50k
VBAT = 3.7V
900 VIN = 0V
800
700
IOUT (mA)
IBAT (mA)
200
300
200
HPWR = 0V
0
0.5
1
1.5
2 2.5
VBAT (V)
3
3.5
4
4.5
100
100
EFFICIENCY (%)
3000
2500
2000
–50°C
0°C
50°C
100°C
60
40
VFWD (mV)
80
0
100
4085 G17
50
100
VFWD (mV)
40895 G06
100
90
85
85
80
HVIN = 24V
70
HVIN = 36V
80
75
HVIN = 24V
HVIN = 36V
70
65
60
60
FIGURE 10 SCHEMATIC
VBAT = 4.21V (IBAT = 0)
55
50
HVIN = 8V
95 HVIN = 12V
90
75
200
150
LTC4089-5 High Voltage
Regulator Efﬁciency vs Output
Load
65
1500
20
0
125
HVIN = 8V
95 HVIN = 12V
3500
–50°C
0°C
50°C
100°C
100
LTC4089 High Voltage Regulator
Efﬁciency vs Output Load
VBAT = 3.7V
4500 VIN = 0V
Si2333 PFET
4000
0
400
40895 G05
5000
500
500
200
40895 G04
Ideal Diode Current vs Forward
Voltage and Temperature with
External Device
1000
600
300
100 VIN = 5V
VBAT = 3.5V
θJA = 50°C/W
0
50
25
75
–50 –25
0
TEMPERATURE (°C)
0
0
200
150
1000
400
100
100
40895 G03
500
300
50
TERMINATION 300
Ideal Diode Current vs Forward
Voltage and Temperature (No
External Device)
HPWR = 5V
400
600
TIME (MIN)
600
600
VIN = 5V
VOUT = NO LOAD
500 RPROG = 100k
RCLPROG = 2k
0
Charge Current vs Temperature
(Thermal Regulation)
Charging from USB, IBAT vs VBAT
IBAT (mA)
0
100
900
C/10
40895 G02
40895 G01
IOUT (mA)
2
4.185
4.00
0
3
1
4.05
EFFICIENCY (%)
VFLOAT (V)
4.205
1200
VBAT
VOUT
VCHRGB
IBAT
IBAT (mA)
4.15
VBAT, VOUT, VCHRGB (V)
4.210
4.20
1500
0
0.2
0.6
0.4
IOUT (A)
0.8
1.0
40895 G08
FIGURE 10 SCHEMATIC
VBAT = 4.21V (IBAT = 0)
55
50
0
0.2
0.6
0.4
IOUT (A)
0.8
1.0
40895 G09
40895fb
5
LTC4089/LTC4089-5
TYPICAL PERFORMANCE CHARACTERISTICS
High Voltage Regulator
Maximum Load Current, L = 10µH
TA = 25°C, unless otherwise speciﬁed.
High Voltage Regulator
Maximum Load Current, L = 33µH
1.6
1.8
1.5
1.6
550
500
TYPICAL
TYPICAL
450
1.5
1.4
1.3
1.2
MINIMUM
VCE(SW) (mV)
IOUT (A)
IOUT (A)
1.2
MINIMUM
TA = 25°C
350
300
TA = –40°C
250
200
150
1.1
100
1.0
1.0
0.9
0.9
5
10
15
20
VIN (V)
25
5
35
30
50
10
15
20
VIN (V)
25
30
High Voltage Regulator
Switch Frequency
0
High Voltage Regulator
Soft-Start
2.0
800
780
1.8
740
720
700
680
660
640
SWITCH CURRENT LIMIT (A)
SWITCHING FREQUENCY (kHz)
700
760
600
500
400
300
200
100
620
0
25 50 75 100 125 150
TEMPERATURE (°C)
0
0
1.9
6.8
1.8
6.6
1.7
6.4
INPUT VOLTAGE (V)
CURRENT LIMIT (A)
1.0
0.8
0.6
0.4
0
0
0.25 0.50 0.75 1 1.25 1.50 1.75
SHDN PIN VOLTAGE (V)
1.6
1.5
1.4
1.3
TA = –40°C
TA = –5°C
TA = 25°C
TA = 90°C
2
40895 G15
High Voltage Regulator
Typical Minimum Input Voltage
7.0
0
1.2
40895 G14
2.0
1.0
1.4
100 200 300 400 500 600 700 800
FEEDBACK VOLTAGE (mV)
High Voltage Switch Current Limit
1.1
1.6
0.2
40895 G13
1.2
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
SWITCH CURRENT (A)
40895 G12
High Voltage Regulator
Frequency Foldback
800
600
–50 –25
0
35
40895 G11
40895 G10
FREQUENCY (kHz)
TA = 85°C
400
1.4
1.3
1.1
High Voltage Regulator
Switch Voltage Drop
TO START
6.2
6.0
5.8
TO RUN
5.6
5.4
5.2
5.0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
40895 G16
1
10
100
LOAD CURRENT (mA)
1000
40895 G17
40895fb
6
LTC4089/LTC4089-5
TYPICAL PERFORMANCE CHARACTERISTICS
Input Disconnect Waveforms
Input Connect Waveforms
VIN
5V/DIV
VOUT
5V/DIV
VIN
5V/DIV
VOUT
5V/DIV
IIN
0.5A/DIV
IBAT
0.5A/DIV
IIN
0.5A/DIV
IBAT
0.5A/DIV
1ms/DIV
VBAT = 3.85V
IOUT = 100mA
TA = 25°C, unless otherwise speciﬁed.
HPWR
5V/DIV
IIN
0.5A/DIV
IBAT
0.5A/DIV
1ms/DIV
40895 G18
Response to HPWR
100µs/DIV
40895 G19
VBAT = 3.85V
IOUT = 100mA
VBAT = 3.85V
IOUT = 50mA
Wall Disconnect Waveforms
Wall Connect Waveforms
Response to Suspend
WALL
5V/DIV
WALL
5V/DIV
VOUT
5V/DIV
SUSP
5V/DIV
VOUT
5V/DIV
IWALL
0.5A/DIV
IBAT
0.5A/DIV
IWALL
0.5A/DIV
IBAT
0.5A/DIV
40895 G20
VOUT
5V/DIV
IIN
0.5A/DIV
IBAT
0.5A/DIV
1ms/DIV
VBAT = 3.85V
IOUT = 100mA
RPROG = 100k
40895 G21
1ms/DIV
40895 G22
VBAT = 3.85V
IOUT = 100mA
RPROG = 100k
High Voltage Regulator Load
Transient
40895 G23
High Voltage Regulator Load
Transient
HVOUT
50mV/DIV
HVOUT
50mV/DIV
IOUT
0.5A/DIV
IL
0.5A/DIV
20µS/DIV
100µs/DIV
VBAT = 3.85V
IOUT = 50mA
40895 G24
20µS/DIV
40895 G25
40895fb
7
LTC4089/LTC4089-5
U
U
U
PI FU CTIO S
GND (Pins 1, 2): Ground. Tie the GND pin to a local ground
plane below the LTC4089 and the circuit components.
battery. This feature is disabled if no power is present on
HVIN, IN or BAT (i.e., below UVLO thresholds).
HVOUT (Pins 3, 18): Voltage Output of the High Voltage
Regulator. When sufﬁcient voltage is present at HVOUT,
the low voltage power path from IN to OUT will be disconnected and the HVPR pin will be pulled low to indicate
that a high voltage wall adapter has been detected. The
LTC4089 high voltage regulator will maintain just enough
differential voltage between HVOUT and BAT to keep the
battery charger MOSFET out of dropout (typically 300mV
from OUT to BAT). The LTC4089-5 high voltage regulator will provide a ﬁxed 5V output to the battery charger
MOSFET. HVOUT should be bypassed with at least 10µF
to GND. Connect pins 3 and 18 with a resistance no
greater than 1 .
CHRG (Pin 8): Open-Drain Charge Status Output. When the
battery is being charged, the CHRG pin is pulled low by an
internal N-channel MOSFET. When the timer runs out or
the charge current drops below 10% of the programmed
charge current or the input supply is removed, the CHRG
pin is forced to a high impedance state.
VC (Pin 4): Leave the VC pin ﬂoating or bypass to ground
with a 10pF capacitor. This optional 10pF capacitor reduces
HVOUT ripple in discontinuous mode.
GATE (Pin 10): External ideal diode gate pin. This pin can
be used to drive the gate of an optional external PFET connected between BAT (drain) and OUT (source). By doing
so, the impedance of the ideal diode between BAT and
OUT can be reduced. When not in use, this pin should be
left ﬂoating. It is important to maintain a high impedance
on this pin and minimize all leakage paths.
NTC (Pin 5): Input to the NTC Thermistor Monitoring
Circuits. Under normal operation, tie a thermistor from
the NTC pin to ground and a resistor of equal value from
NTC to VNTC. When the voltage on this pin is above 0.74
• VVNTC (Cold, 0°C) or below 0.29 • VVNTC (Hot, 50°C)
the timer is suspended but not cleared, the charging is
disabled and the CHRG pin remains in its former state.
When the voltage on NTC comes back between 0.74 •
VVNTC and 0.29 • VVNTC, the timer continues where it
left off and charging is re-enabled if the battery voltage
is below the recharge threshold. There is approximately
3°C of temperature hysteresis associated with each of the
input comparators.
Connect the NTC pin to ground to disable this feature. This
will disable all of the LTC4089 NTC functions.
VNTC (Pin 6): Output Bias Voltage for NTC. A resistor from
this pin to the NTC pin will bias the NTC thermistor.
HVPR (Pin 7): High Voltage Present Output. Active low
open drain output pin. A low on this pin indicates that the
high voltage regulator has sufﬁcient voltage to charge the
PROG (Pin 9): Charge Current Program. Connecting a
resistor, RPROG, to ground programs the battery charge
current. The battery charge current is programmed
as follows:
50, 000 V
ICHG( A) =
RPROG
BAT (Pin 11): Connect to a single cell Li-Ion battery. This
pin is used as an output when charging the battery and as
an input when supplying power to OUT. When the OUT pin
potential drops below the BAT pin potential, an ideal diode
function connects BAT to OUT and prevents VOUT from
dropping more than 100mV below VBAT. A precision internal
resistor divider sets the ﬁnal ﬂoat (charging) potential on
this pin. The internal resistor divider is disconnected when
IN and HVIN are in undervoltage lockout.
IN (Pin 12): Input Supply. Connect to USB supply, VBUS.
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as determined by the state of the HPWR pin. Charge current
(to the BAT pin) supplied through the input is set to the
current programmed by the PROG pin but will be limited
by the input current limit if charge current is set greater
than the input current limit.
40895fb
8
LTC4089/LTC4089-5
U
U
U
PI FU CTIO S
OUT (Pin 13): Voltage Output. This pin is used to provide
controlled power to a USB device from either USB VBUS
(IN), an external high voltage supply (HVIN), or the battery
(BAT) when no other supply is present. The high voltage
supply is prioritized over the USB VBUS input. OUT should
be bypassed with at least 4.7µF to GND.
CLPROG (Pin 14): Current Limit Program and Input Current Monitor. Connecting a resistor, RCLPROG, to ground
programs the input to output current limit. The current
limit is programmed as follows:
1000 V
ICL ( A) =
R CLPROG
In USB applications, the resistor RCLPROG should be set
to no less than 2.1k. The voltage on the CLPROG pin is
always proportional to the current ﬂowing through the
IN to OUT power path. This current can be calculated
as follows:
V
IIN( A) = CLPROG • 1000
RCLPROG
HPWR (Pin 15): High Power Select. This logic input is used
to control the input current limit. A voltage greater than
2.3V on the pin will set the input current limit to 100% of
the current programmed by the CLPROG pin. A voltage
less than 0.3V on the pin will set the input current limit to
20% of the current programmed by the CLPROG pin. A
2µA pull-down current is internally connected to this pin
to ensure it is low at power up when the pin is not being
driven externally.
SUSP (Pin 16): Suspend Mode Input. Pulling this pin
above 2.3V will disable the power path from IN to OUT.
The supply current from IN will be reduced to comply
with the USB speciﬁcation for suspend mode. Both the
ability to charge the battery from HVIN and the ideal diode
function (from BAT to OUT) will remain active. Suspend
mode will reset the charge timer if VOUT is less than VBAT
while in suspend mode. If VOUT is kept greater than VBAT,
such as when the high voltage input is present, the charge
timer will not be reset when the part is put in suspend.
A 2µA pull-down current is internally applied to this pin
to ensure it is low at power-up when the pin is not being
driven externally.
TIMER (Pin 17): Timer Capacitor. Placing a capacitor,
CTIMER, to GND sets the timer period. The timer period is:
t TIMER (hours) =
C TIMER • R PROG • 3hours
0 . 1µF • 100k
Charge time is increased if charge current is reduced
due to undervoltage current limit, load current, thermal
regulation and current limit selection (HPWR).
Shorting the TIMER pin to GND disables the battery
charging functions.
SW (Pin 19): The SW pin is the output of the internal high
voltage power switch. Connect this pin to the inductor,
catch diode and boost capacitor.
BOOST (Pin 20): The BOOST pin is used to provide a
drive voltage, higher than the input voltage, to the internal
bipolar NPN power switch.
HVIN (Pin 21): The HVIN pin supplies current to the internal high voltage regulator and to the internal high voltage
power switch. The presence of a high voltage input takes
priority over the USB VBUS input (i.e., when a high voltage input supply is detected, the USB IN to OUT path is
disconnected). This pin must be locally bypassed.
HVEN (Pin 22): The HVEN pin is used to disable the high
voltage input path. Tie to ground to disable the high voltage
input or tie to at least 2.3V to enable the high voltage path.
If this feature is not used, tie to the HVIN pin. This pin can
also be used to soft-start the high voltage regulator; see
the Applications Information section.
EXPOSED PAD (Pin 23): Ground. The exposed package
pad is ground and must be soldered to the PC board for
proper functionality and for maximum heat transfer (use
several vias directly under the LTC4089).
40895fb
9
LTC4089/LTC4089-5
W
BLOCK DIAGRA
D2
BOOST
10
C3
HVIN
L1
SW
Q1
+
+
D1
–
R
S
–
Q
Q
VSET PART NUMBER
3.6V
LTC4089
5V
LTC4089-5
DRIVER
DRIVER
OSCILLATOR
10
HVOUT
–
VC
GM
10pF
+
+
1.8V
+
–
ENABLE
350mV
(LTC4089)
R3
10
–
VSET
C1
+
+
–
75mV (RISING)
25mV (FALLING)
HVEN
+
C4
–
4.25V (RISING)
3.15V (FALLING)
HVPR
19
CURRENT LIMIT
22
1V
+
CLPROG
DIE
TEMP
13
ENABLE
21
–
2k
HPWR
ILIM CNTL
ILIM
CURRENT CONTROL
CL
IN
CC/CV REGULATOR
CHARGER
ENABLE
105°C
500mA/100mA
+
–
2µA
25mV
+
EDA
IN OUT BAT
21
21
BAT
+
ICHG
SOFT-START2
1V
GATE
–
BAT
CHARGE CONTROL
OUT
25mV
IDEAL
DIODE
TA
+
+
–
IIN
1000
SOFT-START
+
–
10
IN
–
0.25V
+
2.8V
BATTERY
UVLO
CHG
–
23
PROG
–
100k
VOLTAGE DETECT
15
VNTC
+
UVLO
TOO COLD
14
RECHRG
NTCERR
+
NTC
–
BAT UV
–
10k
4.1V
RECHARGE
TIMER
OSCILLATOR
21
CONTROL LOGIC
HOLD
NTC
–
100k
RESET
CHRG
CLK
18
STOP
COUNTER
TOO HOT
+
C/10 EOC
+
NTC ENABLE
2µA
0.1V
–
16
GND
11
SUSP
4089 TA01
40895fb
10
LTC4089/LTC4089-5
(Refer to Block Diagram)
The LTC4089/LTC4089-5 is a complete PowerPath™
controller for battery powered USB applications. The
LTC4089/LTC4089-5 is designed to receive power from a
low voltage source (e.g., USB or 5V wall adapter), a high
voltage source (e.g., FireWire/IEEE1394, automotive battery, 12V wall adapter, etc.), and a single-cell Li-Ion battery.
It can then deliver power to an application connected to the
OUT pin and a battery connected to the BAT pin (assuming
that an external supply other than the battery is present). Power supplies that have limited current resources
(such as USB VBUS supplies) should be connected to the
IN pin which has a programmable current limit. Battery
charge current will be adjusted to ensure that the sum of
the charge current and load current does not exceed the
programmed input current limit (see Figure 1).
An ideal diode function provides power from the battery
when output / load current exceeds the input current limit or
when input power is removed. Powering the load through
the ideal diode instead of connecting the load directly to
the battery allows a fully charged battery to remain fully
charged until external power is removed. Once external
power is removed the output drops until the ideal diode is
forward biased. The forward biased ideal diode will then
provide the output power to the load from the battery.
The LTC4089/LTC4089-5 also includes a high voltage
switching regulator which has the ability to receive power
from a high voltage input. This input takes priority over the
USB VBUS input (i.e., if both HVIN and IN are present, load
current and charge current will be delivered via the high
voltage path). When enabled, the high voltage regulator
regulates the HVOUT voltage using a 750kHz constant
frequency, current mode regulator. An external PFET between HVOUT (drain) and OUT (source) is turned on via
the HVPR pin allowing OUT to charge the battery and/or
supply power to the application. The LTC4089 maintains
approximately 300mV between the OUT pin and the BAT
pin, while the LTC4089-5 provides a ﬁxed 5V output.
Input Current Limit
Whenever the input power path is enabled (i.e., SUSP =
0V and HVIN = 0V) and power is available at IN, power
is delivered to OUT. The current limit and charger control
circuits of the LTC4089/LTC4089-5 are designed to limit
PowerPath is a registered trademark of Linear Technology Corporation.
SW
HVIN
L1
Q1
D1
HIGH VOLTAGE
BUCK REGULATOR
HVOUT
C1
+
4.25V (RISING)
3.15V (FALLING)
–
HVPR
19
+
–
+
–
ENABLE
LOAD
75mV (RISING)
25mV (FALLING)
OUT
21
USB CURRENT LIMIT
+
–
IN
25mV
CC/CV REGULATOR
CHARGER
+
–
U
OPERATIO
25mV
+
EDA
IDEAL
DIODE
OUT
21
GATE
–
BAT
21
4089 F01
BAT
+
LI-ION
Figure 1. Simpliﬁed PowerPath Block Diagram
40895fb
11
LTC4089/LTC4089-5
U
OPERATIO
input current as well as control battery charge current
as a function of IOUT. The input current limit, ICL, can be
programmed using the following formula:
⎡ 1000
⎤ 1000 V
ICL = ⎢
• VCLPROG ⎥ =
⎣ RCLPROG
⎦ RCLPROG
where VCLPROG is the CLPROG pin voltage (typically 1V)
and RCLPROG is the total resistance from the CLPROG pin
to ground. For best stability over temperature and time,
1% metal ﬁlm resistors are recommended.
The programmed battery charge current, ICHG, is
deﬁned as:
⎡ 50, 000
⎤ 50, 000 V
ICHG = ⎢
• VPROG ⎥ =
⎣ RPROG
⎦ RPROG
Input current, IIN, is equal to the sum of the BAT pin
output current and the OUT pin output current. VCLPROG
will typically servo to 1V, however, if IOUT + IBAT < ICL
then VCLPROG will track the input current according to the
following equation:
V
IIN = IOUT + IBAT = CLPROG • 1000
RCLPROG
The current limiting circuitry in the LTC4089/LTC4089-5
can and should be conﬁgured to limit current to 500mA
for USB applications (selectable using the HPWR pin and
programmed using the CLPROG pin).
IIN
500
The LTC4089/LTC4089-5 reduces battery charge current
such that the sum of the battery charge current and the
load current does not exceed the programmed input current
limit (one-ﬁfth of the programmed input current limit when
HPWR is low, see Figure 2). The battery charge current
goes to zero when load current exceeds the programmed
input current limit (one-ﬁfth of the limit when HPWR is
low). Even if the battery charge current is set to exceed
the allowable USB current, the USB speciﬁcation will not
be violated. The battery charger will reduce its current as
needed to ensure that the USB speciﬁcation is not exceeded.
If the load current is greater than the current limit, the
output voltage will drop to just under the battery voltage
where the ideal diode circuit will take over and the excess
load current will be drawn from the battery.
In USB applications, the minimum value for RCLPROG
should be 2.1k. This will prevent the input current from
exceeding 500mA due to LTC4089/LTC4089-5 tolerances
and quiescent currents. A 2.1k CLPROG resistor will give a
typical current limit of 476mA in high power mode (HPWR
= 1) or 95mA in low power mode (HPWR = 0).
When SUSP is driven to a logic high, the input power
path is disabled and the ideal diode from BAT to OUT will
supply power to the application.
IIN
100
500
IIN
80
300
200
100
400
ILOAD
60
40
20
IBAT
4089 G01
300
200
IBAT = ICL = IOUT
100
0
200
IBAT = ICHG
IBAT
(CHARGING)
(CHARGING)
0
100
ILOAD
300
IBAT
(CHARGING)
0
CURRENT (mA)
ILOAD
CURRENT (mA)
CURRENT (mA)
400
400
500
IBAT
ILOAD(mA)
(IDEAL DIODE)
(a) High Power Mode/Full Charge
RPROG = 100k and RCLPROG = 2k
0
0
4089 G02
20
40
60
80
100
IBAT
ILOAD(mA)
(IDEAL DIODE)
(b) Low Power Mode/Full Charge
RPROG = 100k and RCLPROG = 2k
0
4089 G03
100
200
300
400
500
IBAT
ILOAD (mA)
(IDEAL DIODE)
(c) High Power Mode with
ICL = 500mA and ICHG = 250mA
RPROG = 200k and RCLPROG = 2k
Figure 2. Input and Battery Currents as a Function of Load Current
40895fb
12
LTC4089/LTC4089-5
U
OPERATIO
High Voltage Step Down Regulator
Ideal Diode from BAT to OUT
The power delivered from HVIN to HVOUT is controlled
by a 750kHz constant frequency, current mode step down
regulator. An external P-channel MOSFET directs this
power to OUT and prevents reverse conduction from OUT
to HVOUT (and ultimately HVIN).
The LTC4089/LTC4089-5 has an internal ideal diode as
well as a controller for an optional external ideal diode. If
a battery is the only power supply available, or if the load
current exceeds the programmed input current limit, then
the battery will automatically deliver power to the load via
an ideal diode circuit between the BAT and OUT pins. The
ideal diode circuit (along with the recommended 4.7µF
capacitor on the OUT pin) allows the LTC4089/LTC4089-5
to handle large transient loads and wall adapter or USB
VBUS connect/disconnect scenarios without the need for
large bulk capacitors. The ideal diode responds within
a few microseconds and prevents the OUT pin voltage
from dropping signiﬁcantly below the BAT pin voltage.
A comparison of the I-V curve of the ideal diode and a
Schottky diode can be seen in Figure 3.
An internal regulator provides power to the control circuitry.
This regulator includes an undervoltage lockout to prevent
switching when HVIN is less than about 4.7V. The HVEN
pin is used to disable the high voltage regulator. HVIN
input current is reduced to less than 2µA and the external
P-channel MOSFET disconnects HVOUT from OUT when
the high voltage regulator is disabled.
The switch driver operates from either the high voltage
input or from the BOOST pin. An external capacitor and
diode are used to generate a voltage at the BOOST pin that
is higher than the input supply. This allows the driver to
fully saturate the internal bipolar NPN power switch for
efﬁcient operation.
When HVOUT is below 3.95V the operating frequency
is reduced. This frequency foldback helps to control the
regulator output current during start-up and overload.
If the input current increases beyond the programmed
input current limit additional current will be drawn from the
battery via the internal ideal diode. Furthermore, if power
to IN (USB VBUS) or HVIN (high voltage input) is removed,
then all of the application power will be provided by the
battery via the ideal diode. A 4.7µF capacitor at OUT is
sufﬁcient to keep a transition from input power to battery
power from causing signiﬁcant output voltage droop. The
ideal diode consists of a precision ampliﬁer that enables a
large P-channel MOSFET transistor whenever the voltage
at OUT is approximately 20mV (VFWD) below the voltage
at BAT. The resistance of the internal ideal diode is approximately 200m . If this is sufﬁcient for the application
LTC4089
CONSTANT
I0N
SLOPE: 1/RDIO(ON)
CONSTANT
R0N
IMAX
CURRENT (A)
A 750kHz oscillator enables an RS ﬂip-ﬂop, turning on the
internal 1.95A power switch Q1. An ampliﬁer and comparator monitor the current ﬂowing between the HVIN and SW
pins, turning the switch off when this current reaches a
level determined by the voltage at VC. An error ampliﬁer
servos the VC node to maintain approximately 300mV
between OUT and BAT (LTC4089). By keeping the voltage
across the battery charger low, efﬁciency is optimized
because power lost to the battery charger is minimized
and power available to the external load is maximized. If
the BAT pin voltage is less than approximately 3.3V, then
the error ampliﬁer will servo the VC node to provide a
constant HVOUT output voltage of about 3.6V. An active
clamp on the VC node provides current limit. The VC node
is also clamped to the voltage on the HVEN pin; soft-start
is implemented by a voltage ramp at the HVEN pin using
an external resistor and capacitor.
IFWD
SLOPE: 1/RFWD
SCHOTTKY
DIODE
CONSTANT
V0N
0
FORWARD VOLTAGE (V)
VFWD
4089 F03
Figure 3. LTC4089/LTC4089-5 Versus
Schottky Diode Forward Voltage Drop
40895fb
13
LTC4089/LTC4089-5
U
OPERATIO
then no external components are necessary. However,
if more conductance is needed, an external P-channel
MOSFET can be added from BAT to OUT. The GATE pin
of the LTC4089/LTC4089-5 drives the gate of the PFET for
automatic ideal diode control. The source of the external
MOSFET should be connected to OUT and the drain should
be connected to BAT. In order to help protect the external
MOSFET in over-current situations, it should be placed in
close thermal contact to the LTC4089/LTC4089-5.
Battery Charger
The battery charger circuits of the LTC4089/LTC4089-5
are designed for charging single cell lithium-ion batteries. Featuring an internal P-channel power MOSFET, the
charger uses a constant-current/constant-voltage charge
algorithm with programmable current and a programmable timer for charge termination. Charge current can be
programmed up to 1.2A. The ﬁnal ﬂoat voltage accuracy
is ±0.8% typical. No blocking diode or sense resistor is
required when powering either the IN or the HVIN pins.
The CHRG open-drain status output provides information
regarding the charging status of the LTC4089/LTC4089-5
at all times. An NTC input provides the option of charge
qualiﬁcation using battery temperature.
level for charging. The charger goes into the fast charge
constant-current mode once the voltage on the BAT pin
rises above 2.8V. In constant current mode, the charge
current is set by RPROG. When the battery approaches the
ﬁnal ﬂoat voltage, the charge current begins to decrease
as the LTC4089/LTC4089-5 switches to constant-voltage
mode. When the charge current drops below 10% of the
programmed charge current while in constant-voltage
mode the CHRG pin assumes a high impedance state.
An external capacitor on the TIMER pin sets the total
minimum charge time. When this time elapses the
charge cycle terminates and the CHRG pin assumes a
high impedance state, if it has not already done so. While
charging in constant current mode, if the charge current
is decreased by thermal regulation or in order to maintain
the programmed input current limit the charge time is
automatically increased. In other words, the charge time is
extended inversely proportional to the actual charge current
delivered to the battery. For Li-Ion and similar batteries that
require accurate ﬁnal ﬂoat potential, the internal bandgap
reference, voltage ampliﬁer and the resistor divider provide
regulation with ±0.8% accuracy.
Trickle Charge and Defective Battery Detection
An internal thermal limit reduces the programmed charge
current if the die temperature attempts to rise above a
preset value of approximately 105°C. This feature protects
the LTC4089/LTC4089-5 from excessive temperature, and
allows the user to push the limits of the power handling
capability of a given circuit board without risk of damaging the LTC4089/LTC4089-5. Another beneﬁt of the
LTC4089/LTC4089-5 thermal limit is that charge current
can be set according to typical, not worst-case, ambient
temperatures for a given application with the assurance
that the charger will automatically reduce the current in
worst-case conditions.
At the beginning of a charge cycle, if the battery voltage is low (below 2.8V) the charger goes into trickle
charge reducing the charge current to 10% of the fullscale current. If the low battery voltage persists for one
quarter of the total charge time, the battery is assumed
to be defective, the charge cycle is terminated and the
CHRG pin output assumes a high impedance state. If
for any reason the battery voltage rises above ~2.8V the
charge cycle will be restarted. To restart the charge cycle
(i.e., when the dead battery is replaced with a discharged
battery), simply remove the input voltage and reapply it
or cycle the TIMER pin to 0V.
The charge cycle begins when the voltage at the OUT
pin rises above the battery voltage and the battery voltage is below the recharge threshold. No charge current
actually ﬂows until the OUT voltage is 100mV above
the BAT voltage. At the beginning of the charge cycle, if
the battery voltage is below 2.8V, the charger goes into
trickle charge mode to bring the cell voltage up to a safe
Programming Charge Current
The formula for the battery charge current is:
V
ICHG = IPROG • 50, 000 = PROG • 50, 000
RPROG
where VPROG is the PROG pin voltage and RPROG is the total
resistance from the PROG pin to ground. Keep in mind that
40895fb
14
LTC4089/LTC4089-5
U
OPERATIO
when the LTC4089/LTC4089-5 is powered from the IN pin,
the programmed input current limit takes precedent over
the charge current. In such a scenario, the charge current
cannot exceed the programmed input current limit.
For example, if typical 500mA charge current is required,
calculate:
1V
RPROG =
• 50, 000 = 100k
500mA
For best stability over temperature and time, 1% metal ﬁlm
resistors are recommended. Under trickle charge conditions,
this current is reduced to 10% of the full-scale value.
The Charge Timer
The programmable charge timer is used to terminate the
charge cycle. The timer duration is programmed by an
external capacitor at the TIMER pin. The charge time is
typically:
C
•R
• 3hours
t TIMER (hours) = TIMER PROG
0 . 1µF • 100k
The timer starts when an input voltage greater than the
undervoltage lockout threshold level is applied or when
leaving shutdown and the voltage on the battery is less than
the recharge threshold. At power-up or exiting shutdown
with the battery voltage less than the recharge threshold
the charge time is a full cycle. If the battery is greater than
the recharge threshold the timer will not start and charging
is prevented. If after power-up the battery voltage drops
below the recharge threshold, or if after a charge cycle
the battery voltage is still below the recharge threshold,
the charge time is set to one-half of a full cycle.
The LTC4089/LTC4089-5 has a feature that extends charge
time automatically. Charge time is extended if the charge
current in constant current mode is reduced due to load
current or thermal regulation. This change in charge time
is inversely proportional to the change in charge current.
As the LTC4089/LTC4089-5 approaches constant voltage
mode the charge current begins to drop. This change in
charge current is due to normal charging operation and
does not affect the timer duration.
Consider, for example, a USB charge condition where
RCLPROG = 2k, RPROG = 100k and CTIMER = 0.1µF. This
corresponds to a three hour charge cycle. However, if the
HPWR input is set to a logic low, then the input current
limit will be reduced from 500mA to 100mA. With no additional system load, this means the charge current will
be reduced to 100mA. Therefore, the termination timer
will automatically slow down by a factor of ﬁve until the
charger reaches constant voltage mode (i.e. VBAT = 4.2V)
or HPWR is returned to a logic high. The charge cycle is
automatically lengthened to account for the reduced charge
current. The exact time of the charge cycle will depend on
how long the charger remains in constant-current mode
and/or how long the HPWR pin remains a logic low.
Once a time-out occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.
Connecting the TIMER pin to ground disables the battery
charger.
CHRG Status Output Pin
When the charge cycle starts, the CHRG pin is pulled to
ground by an internal N-channel MOSFET capable of driving an LED. When the charge current drops below 10%
of the programmed full charge current while in constant
voltage mode, the pin assumes a high impedance state,
but charge current continues to ﬂow until the charge
time elapses. If this state is not reached before the end
of the programmable charge time, the pin will assume a
high impedance state when a time-out occurs. The CHRG
current detection threshold can be calculated by the following equation:
IDETECT =
0 . 1V
5000 V
• 50, 000 =
RPROG
RPROG
For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the CHRG pin will
change state at a battery charge current of 50mA.
Note: The end-of-charge (EOC) comparator that monitors the charge current latches its decision. Therefore,
the ﬁrst time the charge current drops below 10% of the
programmed full charge current while in constant voltage mode, it will toggle CHRG to a high impedance state.
40895fb
15
LTC4089/LTC4089-5
U
OPERATIO
If, for some reason the charge current rises back above
the threshold, the CHRG pin will not resume the strong
pull-down state. The EOC latch can be reset by a recharge
cycle (i.e., VBAT drops below the recharge threshold) or
toggling the input power to the part.
NTC Thermistor—Battery Temperature Charge
Qualiﬁcation
The battery temperature is measured by placing a negative temperature coefﬁcient (NTC) thermistor close to the
battery pack. The NTC circuitry is shown in Figure 4.
To use this feature, connect the NTC thermistor (RNTC)
between the NTC pin and ground and a resistor (RNOM) from
the NTC pin to VNTC. RNOM should be a 1% resistor with
a value equal to the value of the chosen NTC thermistor at
25°C (this value is 10k for a Vishay NTHS0603N02N1002J
thermistor). The LTC4089/LTC4089-5 goes into hold mode
when the resistance (RHOT) of the NTC thermistor drops
to 0.41 times the value of RNOM, or approximately 4.1k,
which should be at 50°C. The hold mode freezes the timer
and stops the charge cycle until the thermistor indicates a
return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4089/
LTC4089-5 is designed to go into hold mode when the
value of the NTC thermistor increases to 2.82 times the
value of RNOM. This resistance is RCOLD. For a Vishay
NTHS0603N02N1002J thermistor, this value is 28.2k
which corresponds to approximately 0°C. The hot and cold
comparators each have approximately 3°C of hysteresis
to prevent oscillation about the trip point. Grounding the
NTC pin will disable the NTC function.
Current Limit Undervoltage Lockout
UVLO comparator is tripped, the current limit circuits will
not come out of shutdown until VOUT falls 50mV below
the VIN voltage.
Charger Undervoltage Lockout
An internal undervoltage lockout circuit monitors the VOUT
voltage and disables the battery charger circuits until
VOUT rises above the undervoltage lockout threshold. The
battery charger UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current
in the power MOSFET, the charger UVLO circuit keeps the
charger shut down if VBAT exceeds VOUT. If the charger
UVLO comparator is tripped, the charger circuits will
not come out of shutdown until VOUT exceeds VBAT
by 50mV.
Suspend
The LTC4089/LTC4089-5 can be put in suspend mode by
forcing the SUSP pin greater than 2.3V. In suspend mode,
the ideal diode function from BAT to OUT is kept alive. If
power is applied to the HVIN pin, then charging will be
unaffected. Current drawn from the IN pin is reduced to
50µA. Suspend mode is intended to comply with the USB
power speciﬁcation mode of the same name.
VNTC
LTC4089
6
RNOM
10k
NTC
0.74 • VNTC
–
TOO_COLD
5
+
RNTC
10k
–
TOO_HOT
An internal undervoltage lockout circuit monitors the
input voltage and disables the input current limit circuits
until VIN rises above the undervoltage lockout threshold.
The current limit UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current in
the power MOSFET, the current limit UVLO circuit disables
the current limit (i.e., forces the input power path to a high
impedance state) if VOUT exceeds VIN. If the current limit
0.29 • VNTC
+
+
NTC_ENABLE
0.1V
–
4089 F04
Figure 4. NTC Circuit
40895fb
16
LTC4089/LTC4089-5
U
U
W
U
APPLICATIO S I FOR ATIO
USB and 5V Wall Adapter Power
Although the LTC4089/LTC4089-5 is designed to draw
power from a USB port, a higher power 5V wall adapter
can also be used to power the application and charge the
battery (higher voltage wall adapters can be connected
directly to HVIN). Figure 5 shows an example of combining
a 5V wall adapter and a USB power input. With its gate
grounded by 1k, P-channel MOSFET MP1 provides USB
power to the LTC4089/LTC4089-5 when 5V wall power is
not available. When 5V wall power is available, D1 both
supplies power to the LTC4089, pulls the gate of MN1 high
to increase the charge current (by increasing the input
current limit), and pulls the gate of MP1 high to disable it
and prevent conduction back to the USB port.
5V WALL
ADAPTER
850mA ICHG
ICHG
BAT
D1
LTC4089
USB POWER
500mA ICHG
IN
MP1
1k
+
PROG
CLPROG
MN1
2.87k
2k
Li-Ion
BATTERY
will be the programmed charge current plus the largest
expected application load current. For robust operation in
fault conditions, the saturation current should be ~2.3A. To
keep efﬁciency high, the series resistance (DCR) should
be less than 0.1 . Table 1 lists several vendors and types
that are suitable.
Table 1: Inductor Vendors
VENDOR
Sumida
URL
PART
SERIES
INDUCTANCE
(µH)
SIZE
(mm)
8.2, 10
6 6 3
CDRH6D38
10
7 7 4
www.sumida.com CDRH5D28
TDK
www.tdk.com
SLF6028T
10
6 6 2.8
Toko
www.toko.com
D63LCB
10
6.3 6.3 3
Catch Diode
Depending on load current, a 1A to 2A Schottky diode is
recommended for the D1 catch diode. The diode must
have a reverse voltage rating equal to, or greater than,
the maximum input voltage. The ON Semiconductor
MBRM140 and the Diodes Inc. DFLS140/160/240 are
good choices.
59k
High Voltage Regulator Capacitor Selection
4089 F05
Figure 5. USB or 5V Wall Adapter Power
Inductor Selection and Maximum Output Current
A good choice for the inductor value is L = 10µH. With this
value the maximum load current will be 1A. The RMS current
rating of the inductor must be greater than the maximum
load current and its saturation current should be about
30% higher. Note that the maximum load current
Bypass the HVIN pin of the LTC4089/LTC4089-5 circuit
with a 1µF, or higher value ceramic capacitor of X7R or
X5R type. Y5V types have poor performance over temperature and applied voltage and should not be used. A 1µF
ceramic is adequate to bypass the high voltage input and
will easily handle the ripple current. However, if the input
power source has high impedance, or there is signiﬁcant
inductance due to long wires or cables, additional bulk
capacitance may be necessary. This can be provided with
a low performance electrolytic capacitor.
40895fb
17
LTC4089/LTC4089-5
U
U
W
U
APPLICATIO S I FOR ATIO
The high voltage regulator output capacitor controls output
ripple, supplies transient load currents, and stabilizes the
regulator control loop. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. A good value is 10µF. Use X5R or
X7R types, and note that a ceramic capacitor biased with
VHVOUT will have less than its nominal capacitance. Table
2 lists several capacitor vendors.
PHONE
Panasonic (714) 373-7366
URL
www.panasonic.com
PART
SERIES
COMMENTS
(864) 963-6300
www.kemet.com
Ceramic,
Tantalum
T494,
T495
Sanyo
(408) 749-9714
www.sanyovideo.com
Ceramic,
Polymer,
Tantalum
POSCAP
Murata
(404) 436-1300
www.murata.com
Ceramic
www.avxcorp.com
Ceramic,
Tantalum
www.taiyo-yuden.com
Ceramic
Taiyo
Yuden
(864) 963-6300
TPS
Series
BOOST Pin Considerations
Capacitor C3 and diode D2 (see Block Diagram) are used
to generate a boost voltage that is higher than the input
voltage. In most cases, a 0.1µF capacitor and fast-switching diode (such as the 1N4148 or 1N914) will work well.
The BOOST pin must be at least 2.2V above the SW pin
for proper operation.
High Voltage Regulator Soft-Start
The HVEN pin can be used to soft-start the high voltage
regulator and reduce the maximum input current during
LTC4089
HVEN
0.1µF
Ceramic, EEF Series
Polymer,
Tantalum
Kemet
AVX
RUN
15k
Table 2: Capacitor Vendors
VENDOR
start-up. A voltage ramp at the HVEN pin can be created
by driving the pin through an external RC ﬁlter (see Figure
6). By choosing a large RC time constant, the peak start-up
current will not overshoot the current that is required to
regulate the output. Choose the value of the resistor so that
it can supply 20µA when the HVEN pin reaches 2.3V.
GND
4089 F06
Figure 6. Using the HVEN Pin to Soft-Start the
High Voltage Regulator.
Alternate NTC Thermistors
The LTC4089/LTC4089-5 NTC trip points were designed
to work with thermistors whose resistance-temperature
characteristics follow Vishay Dale’s “R-T Curve 2.” The
Vishay NTHS0603N02N1002J is an example of such a
thermistor. However, Vishay Dale has many thermistor
products that follow the “R-T Curve 2” characteristic in a
variety of sizes. Furthermore, any thermistor whose ratio
of RCOLD to RHOT is about 7.0 will also work (Vishay Dale
R-T Curve 2 shows a ratio of 2.815/0.4086 = 6.89).
Power conscious designs may want to use thermistors
whose room temperature value is greater than 10k. Vishay
Dale has a number of values of thermistor from 10k to 100k
that follow the “R-T Curve 2.” Using these as indicated
in the NTC Thermistor section will give temperature trip
points of approximately 3°C and 47°C, a delta of 44°C.
This delta in temperature can be moved in either direction by changing the value of RNOM with respect to RNTC.
40895fb
18
LTC4089/LTC4089-5
U
W
U
U
APPLICATIO S I FOR ATIO
Increasing RNOM will move both trip points to lower
temperatures. Likewise, a decrease in RNOM with respect
to RNTC will move the trip points to higher temperatures.
To calculate RNOM for a shift to lower temperature, for
example, use the following equation:
RNOM
R
= COLD • RNTC at 25 °C
2 . 815
where RCOLD is the resistance ratio of RNTC at the desired
cold temperature trip point. To shift the trip points to higher
temperatures use the following equation:
RNOM =
RHOT
• RNTC at 25 °C
0 . 4086
where RHOT is the resistance ratio of RNTC at the desired
hot temperature trip point.
The following example uses a 100K R-T Curve 1 Thermistor
from Vishay Dale. The difference between the trip points is
44°C, from before—and the desired cold trip point of 0°C,
would put the hot trip point at 44°C. The RNOM needed is
calculated as follows:
R
RNOM = COLD • RNTC at 25°C =
2.815
3.266
• 100kΩ = 116kΩ
2.815
The nearest 1% value for RNOM is 115k. This is the value
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 44°C, respectively. To
extend the delta between the cold and hot trip points, a
resistor (R1) can be added in series with RNTC (see Figure
7). The values of the resistors are calculated as follows:
RNOM
R
− RHOT
= COLD
2 . 815 − 0 . 4086
where RNOM is the value of the bias resistor, RHOT and
RCOLD are the values of RNTC at the desired temperature
trip points. Continuing the forementioned example with
a desired hot trip point of 50°C:
RNOM =
=
R COLD − R HOT
2 . 815 − 0 . 4086
100k • (3 . 266 − 0 . 3 6 02)
2 . 815 − 0 . 4086
= 120 . 8k,121k nearest 1 %
⎤
⎡⎛
0 . 4086
⎞
⎥
⎢⎜⎝ 2 . 815 − 0 . 4086 ⎟⎠ •
R1 = 10 0k • ⎢
⎥
⎢⎣( 3 . 266 − 0 . 3602) − 0 . 3602 ⎥⎦
= 13 . 3k,13 . 3k is nearest 1 %
The ﬁnal solution is shown in Figure 7, where
RNOM = 121k, R1 = 13.3k and RNTC = 100k at 25°C
VNTC
LTC4089
15
RNOM
121k
NTC
0.74 • VNTC
–
TOO_COLD
14
+
R1
13.3k
–
TOO_HOT
0.29 • VNTC
RNTC
100k
+
+
NTC_ENABLE
0 . 4086
⎡
⎤
R1 = ⎢
⎥ • [RCOLD − RHOT ] − RHOT
⎣ 2 . 815 − 0 . 4086 ⎦
0.1V
–
4089 F07
Figure 7. Modiﬁed NTC Circuit
40895fb
19
LTC4089/LTC4089-5
U
W
U
U
APPLICATIO S I FOR ATIO
Power Dissipation and High Temperature
Considerations
The die temperature of the LTC4089/LTC4089-5 must
be lower than the maximum rating of 110°C. This is
generally not a concern unless the ambient temperature
is above 85°C. The total power dissipated inside the
LTC4089/LTC4089-5 depends on many factors, including
input voltage (IN or HVIN), battery voltage, programmed
charge current, programmed input current limit, and load
current.
In general, if the LTC4089/LTC4089-5 is being powered
from IN the power dissipation can be calculated as follows:
PD = ( VIN − VBAT ) • IBAT + ( VIN − VOUT ) • IOUT
where PD is the power dissipated, IBAT is the battery
charge current, and IOUT is the application load current.
For a typical application, an example of this calculation
would be:
PD = (5V − 3 . 7 V) • 0 . 4A + (5V − 4 . 75V) • 0 . 1A =
545mW
This example assumes VIN = 5V, VOUT = 4.75V, VBAT =
3.7V, IBAT = 400mA, and IOUT = 100mA resulting in slightly
more than 0.5W total dissipation.
If the LTC4089 is being powered from HVIN, the power
dissipation can be estimated by calculating the regulator
power loss from an efﬁciency measurement, and subtracting the catch diode loss.
PD = (1 − η) • ( VHVOUT • (IBAT + IOUT )) − VD •
⎛
VHVOUT ⎞
⎜⎝ 1 − V
⎟ • (IBAT + IOUT ) + 0 . 3V • IBAT
HV IN ⎠
where is the efﬁciency of the high voltage regulator and
VD is the forward voltage of the catch diode at I = IBAT
+ IOUT. The ﬁrst term corresponds to the power lost in
converting VHVIN to VHVOUT, the second term subtracts
the catch diode loss, and the third term is the power dis-
sipated in the battery charger. For a typical application,
an example of this calculation would be:
PD = (1− 0 . 87) • [ 4V • (0 . 7A + 0 . 3A)] − 0 . 4V •
4V ⎞
⎛
⎜⎝ 1− 12V ⎟⎠ • (0 . 7A + 0 . 3A) + 0 . 3V • 0 . 7A = 463mW
This example assumes 87% efﬁciency, VHVIN = 12V, VBAT
= 3.7V (VHVOUT is about 4V), IBAT = 700mA, IOUT = 300mA
resulting in less than 0.5W total dissipation.
If the LTC4089-5 is being powered from HVIN, the power
dissipation can be estimated by calculating the regulator
power loss from an efﬁciency measurement and subtracting the catch diode loss.
PD = (1− η) • (5V • (IBAT + IOUT ))
⎛
5V ⎞
− VD • ⎜ 1−
• (IBAT + IOUT )
⎝ VHVIN ⎠⎟
+(5V − VBAT ) • IBAT
The difference between this equation and the LTC4089 is
the last term which represents the power dissipation in
the battery charger. For a typical application, an example
of this calculation would be:
PD = (1− 0.87) • (5V • (0.7 A + 0.3A))
5V
−0.4V • (1−
) • (0.7 A + 0.3A)
12V
+(5V − 3.7 V) • 0.7 A = 1327
, mW
Like the LTC4089 example, this example assumes 87%
efﬁciency, VHVIN = 12V, VBAT = 3.7V, IBAT = 700mA, IOUT
= 300mA resulting in 1.3W total dissipation.
To prevent power dissipation of this magnitude from
causing high die temperature, it is important to solder the
exposed backside of the package to a ground plane. This
ground should be tied to other copper layers below with
thermal vias; these layers will spread the heat dissipated
by the LTC4089. Additional vias should be placed near the
catch diodes. Adding more copper to the top and bottom
layers, and tying this copper to the internal planes with
vias, can reduce thermal resistance further. With these
steps, the thermal resistance from die (i.e., junction) to
ambient can be reduced to JA = 40°C/W.
40895fb
20
LTC4089/LTC4089-5
U
W
U
U
APPLICATIO S I FOR ATIO
The power dissipation in the other power components—catch diodes, MOSFETs, boost diodes and inductors—causes additional copper heating and can further
increase the “ambient” temperature of the IC.
Board Layout Considerations
As discussed in the previous section, it is critical that
the exposed metal pad on the backside of the LTC4089/
LTC4089-5 package be soldered to the PC board ground.
Furthermore, proper operation and minimum EMI requires
a careful printed circuit board (PCB) layout. Note that large,
switched currents ﬂow in the power switch (between the
HVIN and SW pins), the catch diode and the HVIN input
capacitor. These components, along with the inductor and
output capacitor, should be placed on the same side of
the circuit board, and their connections should be made
on that layer. Place a local, unbroken ground plane below
these components. The loop formed by these components
should be as small as possible. Additionally, the SW and
BOOST nodes should be kept as small as possible. Figure
8 shows the recommended component placement with
trace and via locations.
High frequency currents, such as the high voltage input
current of the LTC4089, tend to ﬁnd their way along
the ground plane on a mirror path directly beneath the
incident path on the top of the board. If there are slits or
cuts in the ground plane due to other traces on that layer,
the current will be forced to go around the slits. If high
frequency currents are not allowed to ﬂow back through
their natural least-area path, excessive voltage will build
up and radiated emissions will occur. See Figure 9.
4089 F09
Figure 9. Ground Currents Follow Their Incident Path
at High Speed. Slices in the Ground Plane Cause High
Voltage and Increased Emissions.
VIN and VHVIN Bypass Capacitor
C1 AND D1
GND PADS
SIDE-BY-SIDE
AND SEPERATED
WITH C3 GND PAD
MINIMIZE D1, L1,
C3, U1, SW PIN LOOP
Many types of capacitors can be used for input bypassing,
however, caution must be exercised when using multilayer
ceramic capacitors. Because of the self-resonant and high
Q characteristics of some types of ceramic capacitors,
high voltage transients can be generated under some
start-up conditions, such as from connecting the charger
input to a hot power source. For more information, refer
to Application Note 88.
Battery Charger Stability Considerations
U1 THERMAL PAD
SOLDERED TO PCB.
VIAS CONNECTED TO ALL
GND PLANES WITHOUT
THERMAL RELIEF.
MINIMIZE TRACE LENGTH
The constant-voltage mode feedback loop is stable without
any compensation when a battery is connected with low
impedance leads. Excessive lead length, however, may add
enough series inductance to require a bypass capacitor
of at least 1µF from BAT to GND. Furthermore, a 4.7µF
capacitor with a 0.2 to 1 series resistor to GND is
recommended at the BAT pin to keep ripple voltage low
when the battery is disconnected.
Figure 8. Suggested Board Layout
40895fb
21
LTC4089/LTC4089-5
U
U
W
U
APPLICATIO S I FOR ATIO
D2
SD101AWS
VIN
6V
TO 36V
VIN
E1
20
21
+
E2
GND
C9
22µF
50V
R1
1M
1%
HVIN
BOOST
SW
19
L1
C2
10µH
0.1µF
6.3V SLF6028T-100M1R3
C1
1µF
50V
E16
HVOUT
C3
22µF
6.3V
D1
DLFS160
JP1
VIN
1
ON
LTC4089
22
2
OFF
12
JP2
CURRENT
1
2
3
100mA
E8
HPWR
JP3
USB ON/OFF
1
OFF
2
3
ON
HVOUT
HVPR
USB E3
4.35V
TO 5.5V
USB
500mA
HVEN
C7
1000pF
50V
3
HVOUT
C5
4.7µF
6.3V
R2
1Ω
15
16
IN
OUT
HPWR
SUSP
GATE
C4
0.1µF
10%
17
R3
2.1k
1%
R4
71.5k
1%
BAT
TIMER
CHRG
14
CLPROG
VNTC
9
NTC
PROG
VC
4
GND
GND
2
1
3
R7
680
18
7
13
Q1
Si2333DS
R6
1k
1%
10
D3
HVPR
RED
E4
OUT
C6
4.7µF
6.3V
Q2
Si2333DS
GND
11
8
R8
680
6
5
D4
CHGR
GRN
E6
LI-ION+
C8
4.7µF
6.3V
R9
1Ω
E7
GND
R5
10k
1%
E9
CHGR
E11
NTC
JP4
NTC
10pF
4089 F10
1
E13
SUSP
2
E10
CLPROG
3
R10
10k
1%
E12
PROG
EXT
INT
Figure 10. Typical Application Diagram
40895fb
22
LTC4089/LTC4089-5
U
PACKAGE DESCRIPTIO
DJC Package
22-Lead Plastic DFN (6mm 3mm)
(Reference LTC DWG # 05-08-1714)
0.889
0.70 ±0.05
R = 0.10
0.889
3.60 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
5.35 ± 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. APPLY SOLDER MASK TO AREAS THAT
ARE NOT SOLDERED
3. DRAWING IS NOT TO SCALE
6.00 ±0.10
(2 SIDES)
0.889
R = 0.10
TYP
3.00 ±0.10
(2 SIDES)
R = 0.115
TYP
0.40 ± 0.05
12
22
0.889
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
11
0.200 REF
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.00 – 0.05
5.35 ± 0.10
(2 SIDES)
PIN #1 NOTCH
R0.30 TYP OR
0.25mm × 45°
CHAMFER
(DJC) DFN 0605
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WXXX)
IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
40895fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4089/LTC4089-5
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1733
Monolithic Lithium-Ion Linear Battery
Charger
Standalone Charger with Programmable Timer, Up to 1.5A Charge Current
LTC1734
Lithium-Ion Linear Battery Charger in
ThinSOTTM
Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed
LTC4002
Switch Mode Lithium-Ion Battery
Charger
Standalone, 4.7V ≤ VIN ≤ 24V, 500kHz Frequency, 3 Hour Charge Termination
LTC4053
USB Compatible Monolithic Li-Ion
Battery Charger
Standalone Charger with Programmable Timer, Up to 1.25A Charge Current
LTC4054
Standalone Linear Li-Ion Battery
Charger with Integrated Pass Transistor
in ThinSOT
Thermal Regulation Prevents Overheating, C/10 Termination, C/10 Indicator, Up to 800mA
Charge Current
LTC4057
Lithium-Ion Linear Battery Charger
Up to 800mA Charge Current, Thermal Regulation, ThinSOT Package
LTC4058
Standalone 950mA Lithium-Ion Charger C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy
in DFN
LTC4059
900mA Linear Lithium-Ion Battery
Charger
Battery Chargers
2mm 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output
LTC4065/LTC4065A Standalone Li-Ion Battery Chargers
in 2 2 DFN
4.2V, ±0.6% Float Voltage, Up to 750mA Charge Current, 2mm 2mm DFN,
“A” Version has ACPR Function.
LTC4411/LTC4412
Low Loss PowerPath Controller in
ThinSOT
Automatic Switching Between DC Sources, Load Sharing, Replaces ORing Diode
LTC4412HV
High Voltage Power Path Controllers in
ThinSOT
VIN = 3V to 36V, More Efﬁcient than Diode ORing, Automatic Switching Between DC
Sources, Simpliﬁed Load Sharing, ThinSOT Package.
Power Management
LTC3405/LTC3405A 300mA (IOUT), 1.5MHz, Synchronous
Step-Down DC/DC Converter
95% Efﬁciency, VIN = 2.7V to 6V, VOUT = 0.8V, IQ = 20µA, ISD < 1µA, ThinSOT Package
LTC3406/LTC3406A 600mA (IOUT), 1.5MHz, Synchronous
Step-Down DC/DC Converter
95% Efﬁciency, VIN = 2.5V to 5.5V, VOUT = 0.6V, IQ = 20µA, ISD < 1µA, ThinSOT Package
LTC3411
1.25A (IOUT), 4MHz, Synchronous
Step-Down DC/DC Converter
95% Efﬁciency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60µA, ISD < 1µA, MS10 Package
LTC3440
600mA (IOUT), 2MHz, Synchronous
Buck-Boost DC/DC Converter
95% Efﬁciency, VIN = 2.5V to 5.5V, VOUT = 2.5V, IQ = 25µA, ISD < 1µA, MS Package
LTC3455
Dual DC/DC Converter with USB Power
Manager and Li-Ion Battery Charger
Seamless Transition Between Power Sources: USB, Wall Adapter and Battery; 95%
Efﬁcient DC/DC Conversion
LT3493
1.2A, 750kHz Step-Down Switching
Regulator
88% Efficiency, VIN = 3.6V to 36V (40V Maximum), VOUT = 0.8V, ISD < 2µA, 2mm 3mm
DFN Package
LTC4055
USB Power Controller and Battery
Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,
200m Ideal Diode, 4mm 4mm QFN16 Package
LTC4066
USB Power Controller and Li-Ion Battery Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation, 50m
Charger with Low-Loss Ideal Diode
Ideal Diode, 4mm 4mm QFN24 Package
LTC4085
USB Power Manager with Ideal Diode
Controller and Li-Ion Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,
200m Ideal Diode with <50m Option, 4mm 3mm DFN14 Package
ThinSOT is a trademark of Linear Technology Corporation.
40895fb
24 Linear Technology Corporation
LT/LWI 0706 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2006

Open as PDF

Similar pages