MC100EPT21 Differential LVPECL to LVTTL Translator The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal. The VBB output allows the EPT21 to also be used in a single–ended input mode. In this mode the VBB output is tied to the D0 input for a non–inverting buffer or the D0 input for an inverting buffer. If used, the VBB pin should be bypassed to ground via a 0.01µF capacitator. • • • • • • • • • • • • • • 1.4ns Typical Propagation Delay 275MHz Fmax (Clock bit stream, not pseudo–random) Differential LVPECL inputs Small Outline SOIC Package 24mA TTL outputs Flow Through Pinouts Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D Q Output will default LOW with inputs open or at GND ESD Protection: >1500V HBM, >100V MM VBB Output New Differential Input Common Mode Range Moisture Sensitivity Level 1, Indefinite Time Out of Drypack. For Additional Information, See Application Note AND8003/D Flammability Rating: UL–94 code V–0 @ 1/8”, Oxygen Index 28 to 34 Transistor Count = 81 devices NC 1 D 2 D 3 LVTTL 8 VCC 7 Q 6 NC 4 8 1 SO–8 D SUFFIX CASE 751 MARKING DIAGRAM 8 A L Y W KPT21 ALYW 1 *For additional information, see Application Note AND8002/D PIN DESCRIPTION FUNCTION PIN Q LVTTL Output D, D Differential LVPECL Input Pair VCC VBB Output Reference Voltage GND Ground Positive Supply Device 5 = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION LVPECL VBB http://onsemi.com GND Package Shipping MC100EPT21D SOIC 98 Units/Rail MC100EPT21DR2 SOIC 2500 Tape & Reel Figure 1. 8–Lead Pinout (Top View) and Logic Diagram Semiconductor Components Industries, LLC, 1999 September, 1999 – Rev. 1.0 1 Publication Order Number: MC100EPT21/D MC100EPT21 MAXIMUM RATINGS* Value Unit VCC Symbol Power Supply (GND = 0V) Parameter 0 to 3.8 VDC VI Input Voltage (GND = 0V, VI not more positive than VCC) 0 to 3.8 VDC Iout Output Current 50 100 mA IBB VBB Sink/Source Current{ ± 0.5 mA TA Operating Temperature Range –40 to +85 °C Tstg Storage Temperature –65 to +150 °C θJA Thermal Resistance (Junction–to–Ambient) 190 130 °C/W θJC Thermal Resistance (Junction–to–Case) 41 to 44 ± 5% °C/W Tsol Solder Temperature (<2 to 3 Seconds: 245°C desired) 265 °C Continuous Surge Still Air 500lfpm * Maximum Ratings are those values beyond which damage to the device may occur. { Use for inputs of same package only. DC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V; TA = –40°C to 85°C) Symbol Characteristic Min Typ Max Unit 5.0 12 20 mA 8.0 18 26 mA 2420 mV ICCH Power Supply Current (Outputs set to HIGH) ICCL Power Supply Current (Outputs set to LOW) VIH Input HIGH Voltage (VCC = 3.3) (Note 1.) 2135 VIL Input LOW Voltage (VCC = 3.3) (Note 1.) 1490 1825 mV IIH Input HIGH Current 150 µA IIL Input LOW Current 0.5 µA D D VOH Output HIGH Voltage (IOH = –3.0mA) (Note 2.) VOL Output LOW Voltage (IOL = 24mA) (Note 2.) IOS Output Short Circuit Current –150 2.4 VIHCMR Input HIGH Voltage Common Mode Range (Note 3.) V 0.5 V –130 –80 mA 2.0 3.3 V VBB Output Voltage Reference 2.0 V NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 1. All values vary 1:1 with VCC. 2. All loading with 500 ohms to GND, CL = 20pF. 3. VIHCMR min varies 1:1 with GND, max varies 1:1 with VCC. AC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V) –40°C Symbol 25°C Max Min Typ 275 350 1000 1000 1450 1400 85°C Min Typ Maximum Toggle Frequency (Note 4.) 275 350 tPLH, tPHL Propagation Delay to Output Differential 1000 1000 1450 1400 tSK++ tSK– – tSKPP Output–to–Output Skew++ Output–to–Output Skew– – Part–to–Part Skew (Note 5.) 60 25 500 60 25 500 60 25 500 ps tJITTER Cycle–to–Cycle Jitter TBD TBD TBD ps VPP Input Voltage Swing (Diff.) fmax Characteristic Max Min Typ 275 350 1000 1000 1450 1400 Max Unit MHz 150 800 1800 1800 1200 150 800 tr Output Rise/Fall Times tf (0.8V – 2.0V) Q, Q 330 500 900 330 500 4. Fmax guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only. 5. Skews are measured between outputs under identical transitions. http://onsemi.com 2 1800 1800 1900 1900 1200 150 800 1200 900 330 500 900 ps mV ps MC100EPT21 PACKAGE DIMENSIONS SO–8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751–06 ISSUE T D A 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 M C B S A S DIM A A1 B C D E e H h L q http://onsemi.com 3 MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ MC100EPT21 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). 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