TI LM111H Lm111-n/lm211-n/lm311-n voltage comparator Datasheet

LM111-N, LM211-N, LM311-N
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SNOSBJ1E – MAY 1999 – REVISED MARCH 2013
LM111-N/LM211-N/LM311-N Voltage Comparator
Check for Samples: LM111-N, LM211-N, LM311-N
FEATURES
1
•
•
•
•
•
2
Operates From Single 5V Supply
Input Current: 150 nA Max. Over Temperature
Offset Current: 20 nA Max. Over Temperature
Differential Input Voltage Range: ±30V
Power Consumption: 135 mW at ±15V
DESCRIPTION
The LM111-N, LM211-N and LM311-N are voltage
comparators that have input currents nearly a
thousand times lower than devices like the LM106 or
LM710. They are also designed to operate over a
wider range of supply voltages: from standard ±15V
op amp supplies down to the single 5V supply used
for IC logic. Their output is compatible with RTL, DTL
and TTL as well as MOS circuits. Further, they can
drive lamps or relays, switching voltages up to 50V at
currents as high as 50 mA.
Both the inputs and the outputs of the LM111-N,
LM211-N or the LM311-N can be isolated from
system ground, and the output can drive loads
referred to ground, the positive supply or the negative
supply. Offset balancing and strobe capability are
provided and outputs can be wire OR'ed. Although
slower than the LM106 and LM710 (200 ns response
time vs 40 ns) the devices are also much less prone
to spurious oscillations. The LM111-N has the same
pin configuration as the LM106 and LM710.
The LM211-N is identical to the LM111-N, except that
its performance is specified over a −25°C to +85°C
temperature range instead of −55°C to +125°C. The
LM311-N has a temperature range of 0°C to +70°C.
Typical Applications
NOTE
Pin connections shown in Schematic Diagram and Typical Applications are for the LMC
TO-99 package.
Do Not Ground Strobe Pin. Output is turned off when current is
pulled from Strobe Pin.
Figure 1. Offset Balancing
Figure 2. Strobing
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM111-N, LM211-N, LM311-N
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Increases typical common mode slew from 7.0V/μs to 18V/μs.
Figure 3. Increasing Input Stage Current
Figure 4. Detector for Magnetic Transducer
*Absorbs inductive kickback of relay and protects IC from severe
voltage transients on V++ line.
Do Not Ground Strobe Pin.
Figure 5. Digital Transmission Isolator
Do Not Ground Strobe Pin.
Typical input current is 50 pA with inputs strobed off.
Pin connections shown in Schematic Diagram and Typical
Applications are for the LMC TO-99 package.
Figure 7. Strobing off Both Input and Output
Stages
2
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Figure 6. Relay Driver with Strobe
*Solid tantalum
Figure 8. Positive Peak Detector
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Figure 9. Zero Crossing Detector Driving MOS Logic
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings for the LM111-N/LM211-N (1) (2)
Total Supply Voltage (V84)
36V
Output to Negative Supply Voltage (V74)
50V
Ground to Negative Supply Voltage (V14)
30V
Differential Input Voltage
±30V
Input Voltage (3)
±15V
Output Short Circuit Duration
10 sec
Operating Temperature Range
LM111-N
−55°C to 125°C
LM211-N
−25°C to 85°C
Lead Temperature (Soldering, 10 sec)
260°C
Voltage at Strobe Pin
V+−5V
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
260°C
Small Outline Package
Vapor Phase (60 seconds)
215°C
Infrared (15 seconds)
220°C
ESD Rating (4)
(1)
(2)
(3)
(4)
300V
Refer to RETS111X for the LM111H, LM111J and LM111J-8 military specifications.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
This rating applies for ±15 supplies. The positive input voltage limit is 30V above the negative supply. The negative input voltage limit is
equal to the negative supply voltage or 30V below the positive supply, whichever is less.
Human body model, 1.5 kΩ in series with 100 pF.
Electrical Characteristics (1) for the LM111-N and LM211-N
Typ
Max
Units
Input Offset Voltage (2)
Parameter
TA=25°C, RS≤50k
0.7
3.0
mV
Input Offset Current
TA=25°C
4.0
10
nA
Input Bias Current
TA=25°C
60
100
Voltage Gain
TA=25°C
Response Time (3)
Saturation Voltage
Strobe ON Current
(4)
Output Leakage Current
Input Offset Voltage
(2)
Conditions
Min
40
nA
200
V/mV
TA=25°C
200
ns
VIN≤−5 mV, IOUT=50 mA
TA=25°C
0.75
1.5
V
TA=25°C
2.0
5.0
mA
VIN≥5 mV, VOUT=35V, TA=25°C,
ISTROBE=3 mA
0.2
10
nA
4.0
mV
20
nA
150
nA
13.8-14.7
13.0
V
V
RS≤50 k
Input Offset Current (2)
Input Bias Current
Input Voltage Range
V+=15V, V−=−15V, Pin 7 Pull-Up
May Go To 5V
Saturation Voltage
V+≥4.5V, V−=0, VIN≤−6 mV,
IOUT≤8 mA
0.23
0.4
Output Leakage Current
VIN≥5 mV, VOUT=35V
0.1
0.5
μA
Positive Supply Current
TA=25°C
5.1
6.0
mA
Negative Supply Current
TA=25°C
4.1
5.0
mA
(1)
(2)
(3)
(4)
4
−14.5
These specifications apply for VS=±15V and Ground pin at ground, and −55°C≤TA≤+125°C, unless otherwise stated. With the LM211-N,
however, all temperature specifications are limited to −25°C≤TA≤+85°C. The offset voltage, offset current and bias current specifications
apply for any supply voltage from a single 5V supply up to ±15V supplies.
The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with a
1 mA load. Thus, these parameters define an error band and take into account the worst-case effects of voltage gain and RS.
The response time specified (see definitions) is for a 100 mV input step with 5 mV overdrive.
This specification gives the range of current which must be drawn from the strobe pin to ensure the output is properly disabled. Do not
short the strobe pin to ground; it should be current driven at 3 to 5 mA.
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Absolute Maximum Ratings for the LM311-N (1) (2)
Total Supply Voltage (V84)
36V
Output to Negative Supply Voltage (V74)
40V
Ground to Negative Supply Voltage (V14)
30V
Differential Input Voltage
±30V
Input Voltage (3)
±15V
Power Dissipation (4)
500 mW
ESD Rating (5)
300V
Output Short Circuit Duration
10 sec
Operating Temperature Range
0° to 70°C
−65°C to 150°C
Storage Temperature Range
Lead Temperature (soldering, 10 sec)
260°C
Voltage at Strobe Pin
V+−5V
Soldering Information
(1)
(2)
(3)
(4)
(5)
Dual-In-Line Package
Soldering (10 seconds)
260°C
Small Outline Package
Vapor Phase (60 seconds)
215°C
Infrared (15 seconds)
220°C
“Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits.”
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
This rating applies for ±15V supplies. The positive input voltage limit is 30V above the negative supply. The negative input voltage limit
is equal to the negative supply voltage or 30V below the positive supply, whichever is less.
The maximum junction temperature of the LM311-N is 110°C. For operating at elevated temperature, devices in the LMC package must
be derated based on a thermal resistance of 165°C/W, junction to ambient, or 20°C/W, junction to case. The thermal resistance of the
dual-in-line package is 100°C/W, junction to ambient.
Human body model, 1.5 kΩ in series with 100 pF.
Electrical Characteristics
(1)
for the LM311-N
Parameter
(2)
Conditions
Min
Typ
Max
Units
TA=25°C, RS≤50k
2.0
7.5
mV
Input Offset Current (2)
TA=25°C
6.0
50
nA
Input Bias Current
TA=25°C
100
250
Voltage Gain
TA=25°C
Response Time (3)
Saturation Voltage
Input Offset Voltage
nA
200
V/mV
TA=25°C
200
ns
VIN≤−10 mV, IOUT=50 mA ,
TA=25°C
0.75
1.5
V
Strobe ON Current (4)
TA=25°C
2.0
5.0
mA
Output Leakage Current
VIN≥10 mV, VOUT=35V TA=25°C,
ISTROBE=3 mA V− = Pin 1 = −5V
0.2
50
nA
Input Offset Voltage (2)
RS≤50K
10
mV
Input Offset Current
40
(2)
70
nA
300
nA
13.8,−14.7
13.0
V
Input Bias Current
−14.5
Input Voltage Range
−
+
Saturation Voltage
V ≥4.5V, V =0, VIN≤−10 mV,
IOUT≤8 mA
0.23
0.4
V
Positive Supply Current
TA=25°C
5.1
7.5
mA
Negative Supply Current
TA=25°C
4.1
5.0
mA
(1)
(2)
(3)
(4)
These specifications apply for VS=±15V and Pin 1 at ground, and 0°C < TA < +70°C, unless otherwise specified. The offset voltage,
offset current and bias current specifications apply for any supply voltage from a single 5V supply up to ±15V supplies.
The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with
1 mA load. Thus, these parameters define an error band and take into account the worst-case effects of voltage gain and RS.
The response time specified (see definitions) is for a 100 mV input step with 5 mV overdrive.
This specification gives the range of current which must be drawn from the strobe pin to ensure the output is properly disabled. Do not
short the strobe pin to ground; it should be current driven at 3 to 5 mA.
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Typical Performance Characteristics LM111-N/LM211-N
6
Input Bias Current
Input Bias Current
Figure 10.
Figure 11.
Input Bias Current
Input Bias Current
Figure 12.
Figure 13.
Input Bias Current
Input Bias Current
Figure 14.
Figure 15.
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Typical Performance Characteristics LM111-N/LM211-N (continued)
Input Bias Current
Input Overdrives
Input Bias Current
Input Overdrives
Figure 16.
Figure 17.
Input Bias Current
Response Time for Various
Input Overdrives
Figure 18.
Figure 19.
Response Time for Various
Input Overdrives
Output Limiting Characteristics
Figure 20.
Figure 21.
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Typical Performance Characteristics LM111-N/LM211-N (continued)
Supply Current
Supply Current
Figure 22.
Figure 23.
Leakage Currents
Figure 24.
8
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Typical Performance Characteristics LM311-N
Input Bias Current
Input Offset Current
Figure 25.
Figure 26.
Offset Error
Input Characteristics
Figure 27.
Figure 28.
Common Mode Limits
Transfer Function
Figure 29.
Figure 30.
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Typical Performance Characteristics LM311-N (continued)
10
Response Time for Various
Input Overdrives
Response Time for Various
Input Overdrives
Figure 31.
Figure 32.
Output Saturation Voltage
Response Time for Various
Input Overdrives
Figure 33.
Figure 34.
Response Time for Various
Input Overdrives
Output Limiting Characteristics
Figure 35.
Figure 36.
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Typical Performance Characteristics LM311-N (continued)
Supply Current
Supply Current
Figure 37.
Figure 38.
Leakage Currents
Figure 39.
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APPLICATION HINTS
CIRCUIT TECHNIQUES FOR AVOIDING
OSCILLATIONS IN COMPARATOR APPLICATIONS
When a high-speed comparator such as the LM111-N is used with fast input signals and low source impedances,
the output response will normally be fast and stable, assuming that the power supplies have been bypassed (with
0.1 μF disc capacitors), and that the output signal is routed well away from the inputs (pins 2 and 3) and also
away from pins 5 and 6.
However, when the input signal is a voltage ramp or a slow sine wave, or if the signal source impedance is high
(1 kΩ to 100 kΩ), the comparator may burst into oscillation near the crossing-point. This is due to the high gain
and wide bandwidth of comparators like the LM111-N. To avoid oscillation or instability in such a usage, several
precautions are recommended, as shown in Figure 40 below.
1. The trim pins (pins 5 and 6) act as unwanted auxiliary inputs. If these pins are not connected to a trim-pot,
they should be shorted together. If they are connected to a trim-pot, a 0.01 μF capacitor C1 between pins 5
and 6 will minimize the susceptibility to AC coupling. A smaller capacitor is used if pin 5 is used for positive
feedback as in Figure 40.
2. Certain sources will produce a cleaner comparator output waveform if a 100 pF to 1000 pF capacitor C2 is
connected directly across the input pins.
3. When the signal source is applied through a resistive network, RS, it is usually advantageous to choose an
RS′ of substantially the same value, both for DC and for dynamic (AC) considerations. Carbon, tin-oxide, and
metal-film resistors have all been used successfully in comparator input circuitry. Inductive wirewound
resistors are not suitable.
4. When comparator circuits use input resistors (eg. summing resistors), their value and placement are
particularly important. In all cases the body of the resistor should be close to the device or socket. In other
words there should be very little lead length or printed-circuit foil run between comparator and resistor to
radiate or pick up signals. The same applies to capacitors, pots, etc. For example, if RS=10 kΩ, as little as 5
inches of lead between the resistors and the input pins can result in oscillations that are very hard to damp.
Twisting these input leads tightly is the only (second best) alternative to placing resistors close to the
comparator.
5. Since feedback to almost any pin of a comparator can result in oscillation, the printed-circuit layout should be
engineered thoughtfully. Preferably there should be a groundplane under the LM111-N circuitry, for example,
one side of a double-layer circuit card. Ground foil (or, positive supply or negative supply foil) should extend
between the output and the inputs, to act as a guard. The foil connections for the inputs should be as small
and compact as possible, and should be essentially surrounded by ground foil on all sides, to guard against
capacitive coupling from any high-level signals (such as the output). If pins 5 and 6 are not used, they should
be shorted together. If they are connected to a trim-pot, the trim-pot should be located, at most, a few inches
away from the LM111-N, and the 0.01 μF capacitor should be installed. If this capacitor cannot be used, a
shielding printed-circuit foil may be advisable between pins 6 and 7. The power supply bypass capacitors
should be located within a couple inches of the LM111-N. (Some other comparators require the power-supply
bypass to be located immediately adjacent to the comparator.)
6. It is a standard procedure to use hysteresis (positive feedback) around a comparator, to prevent oscillation,
and to avoid excessive noise on the output because the comparator is a good amplifier for its own noise. In
the circuit of Figure 41, the feedback from the output to the positive input will cause about 3 mV of
hysteresis. However, if RS is larger than 100Ω, such as 50 kΩ, it would not be reasonable to simply increase
the value of the positive feedback resistor above 510 kΩ. The circuit of Figure 42 could be used, but it is
rather awkward. See the notes in paragraph 7 below.
7. When both inputs of the LM111-N are connected to active signals, or if a high-impedance signal is driving the
positive input of the LM111-N so that positive feedback would be disruptive, the circuit of Figure 40 is ideal.
The positive feedback is to pin 5 (one of the offset adjustment pins). It is sufficient to cause 1 to 2 mV
hysteresis and sharp transitions with input triangle waves from a few Hz to hundreds of kHz. The positivefeedback signal across the 82Ω resistor swings 240 mV below the positive supply. This signal is centered
around the nominal voltage at pin 5, so this feedback does not add to the VOS of the comparator. As much as
8 mV of VOS can be trimmed out, using the 5 kΩ pot and 3 kΩ resistor as shown.
8. These application notes apply specifically to the LM111-N, LM211-N, LM311-N, and LF111 families of
comparators, and are applicable to all high-speed comparators in general, (with the exception that not all
comparators have trim pins).
12
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Pin connections shown are for LM111H in the LMC hermetic package.
Figure 40. Improved Positive Feedback
Pin connections shown are for LM111H in the LMC hermetic package.
Figure 41. Conventional Positive Feedback
Figure 42. Positive Feedback with High Source Resistance
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Typical Applications
(Pin numbers refer to LMC package)
Figure 43. Zero Crossing Detector Driving MOS Switch
*TTL or DTL fanout of two
Figure 44. 100 kHz Free Running Multivibrator
*Adjust for symmetrical square wave time when VIN = 5 mV
†Minimum capacitance 20 pF Maximum frequency 50 kHz
Figure 45. 10 Hz to 10 kHz Voltage Controlled Oscillator
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*Input polarity is reversed when using pin 1 as output.
Figure 46. Driving Ground-Referred Load
Figure 47. Using Clamp Diodes to Improve Response
*Values shown are for a 0 to 30V logic swing and a 15V threshold.
†May be added to control speed and reduce susceptibility to noise spikes.
Figure 48. TTL Interface with High Level Logic
Figure 49. Crystal Oscillator
Figure 50. Comparator and Solenoid Driver
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*Solid tantalum
†Adjust to set clamp level
Figure 51. Precision Squarer
*Solid tantalum
Figure 52. Low-Voltage Adjustable Reference Supply
*Solid tantalum
Figure 53. Positive Peak Detector
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Figure 54. Zero Crossing Detector Driving MOS Logic
*Solid tantalum
Figure 55. Negative Peak Detector
*R2 sets the comparison level. At comparison, the photodiode has less than 5 mV across it, decreasing leakages by
an order of magnitude.
Figure 56. Precision Photodiode Comparator
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Figure 57. Switching Power Amplifier
Figure 58. Switching Power Amplifier
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Schematic Diagram
NOTE
Pin connections shown in the schematic diagram are for the LMC package.
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Pin Diagrams
Top View
Figure 59. 8-Pin TO-99
See LMC Package
Top View
Top View
Figure 60. 8-Pin CDIP (See NAB Package)
8-Pin SOIC (See D Package)
8-Pin PDIP (See P Package)
Figure 61. 14-Pin CDIP (See J Package)
14-Pin PDIP (See NFF Package)
Top View
Figure 62. LM111W/883, LM111WG/883
10-Pin CLGA (See NAD Package)
10-Pin CLGA (See NAC Package)
20
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REVISION HISTORY
Changes from Revision D (March 2013) to Revision E
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 20
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PACKAGE OPTION ADDENDUM
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1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM111H
ACTIVE
TO-99
LMC
8
500
TBD
Call TI
Call TI
-55 to 125
LM111H
LM111H/NOPB
ACTIVE
TO-99
LMC
8
500
Green (RoHS
& no Sb/Br)
POST-PLATE
Level-1-NA-UNLIM
-55 to 125
LM111H
LM111J-8
ACTIVE
CDIP
NAB
8
40
TBD
Call TI
Call TI
-55 to 125
LM111J-8
LM311H
ACTIVE
TO-99
LMC
8
500
TBD
Call TI
Call TI
0 to 70
LM311H
LM311H/NOPB
ACTIVE
TO-99
LMC
8
500
Green (RoHS
& no Sb/Br)
POST-PLATE
Level-1-NA-UNLIM
0 to 70
LM311H
LM311M
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
0 to 70
LM
311M
LM311M/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LM
311M
LM311MX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
0 to 70
LM
311M
LM311MX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LM
311M
LM311N
NRND
PDIP
P
8
40
TBD
Call TI
Call TI
0 to 70
LM
311N
LM311N/NOPB
ACTIVE
PDIP
P
8
40
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-1-NA-UNLIM
0 to 70
LM
311N
MLM311P
NRND
PDIP
P
8
40
TBD
Call TI
Call TI
0 to 70
LM
311N
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM311MX
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM311MX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM311MX
SOIC
D
8
2500
367.0
367.0
35.0
LM311MX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NAB0008A
J08A (Rev M)
www.ti.com
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