Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY54/74FCT163T 4-Bit Binary Counter SCCS015 - May 1994 - Revised February 2000 Features • Sink current • Function, pinout, and drive compatible with FCT and F logic • FCT-C speed at 5.8 ns max. (Com’l), • Reduced VOH (typically = 3.3V) versions of equivalent FCT functions • Edge-rate control circuitry for significantly improved noise characteristics • Power-off disable feature • ESD > 2000V • Matched rise and fall times • Fully compatible with TTL input and output logic levels • Extended commercial range of −40˚C to +85˚C Logic Block Diagram 64 mA (Com’l), 32 mA (Mil) 32 mA (Com’l), 12 mA (Mil) Source current Functional Description The FCT163T is a high-speed synchronous modulo-16 binary counter. It is synchronously presettable for application in programmable dividers and has two types of count enable inputs plus a terminal count output for versatility in forming synchronous multi-staged counters. The FCT163T has a Synchronous Reset input that overrides counting and parallel loading and allows the outputs to be simultaneously reset on the rising edge of the clock. The outputs are designed with a power-off disable feature to allow for live insertion of boards. P0 P1 P2 P3 PE CEP CET TC CP CP CP D CP D Q Q Q0 Detail A Detail A Detail A Q0 Detail A SR Q0 Q1 Q2 Q3 Pin Configurations 8 CET 3 2 1 20 19 12 13 14 1516 17 18 Q0 PE 9 10 11 NC Q1 NC 7 6 5 4 Q3 Q2 CEP GND SOIC/QSOP Top View P0 P3 P2 NC P1 LCC Top View CP SR NC VCC TC SR 1 16 VCC CP 2 15 TC P0 3 14 Q0 P1 4 13 Q1 P2 5 12 Q2 P3 6 11 Q3 CEP 7 10 CET GND 8 9 PE Copyright © 2000, Texas Instruments Incorporated CY54/74FCT163T Maximum Ratings[2,3] Function Table[1] Inputs SR PE CET CEP L H H H H X L H H H X X H L X X X H X L (Above which the useful life may be impaired. For user guidelines, not tested.) Action on the Rising Clock Edge(s) Storage Temperature ..................................... −65°C to +150°C Reset (Clear) Load (Pn Qn) Count (Incremental) No Charge (Hold) No Charge (Hold) Ambient Temperature with Power Applied .................................................. −65°C to +135°C Supply Voltage to Ground Potential..................−0.5V to +7.0V DC Input Voltage .................................................−0.5V to +7.0V DC Output Voltage ..............................................−0.5V to +7.0V Pin Description DC Output Current (Maximum Sink Current/Pin) ...... 120 mA Name Description Power Dissipation .......................................................... 0.5W CEP Count Enable Parallel Input CET Count Enable Trickle Input CP Clock Pulse Input (Active Rising Edge) SR Synchronous Reset Input (Active LOW) P Parallel Data Inputs PE Parallel Enable Input (Active LOW) Q Flip-Flop Outputs TC Terminal Count Output Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) Operating Range Range Range Ambient Temperature VCC Commercial All −40°C to +85°C 5V ± 5% Military[4] All −55°C to +125°C 5V ± 10% Electrical Characteristics Over the Operating Range Parameter VOH VOL Description Output HIGH Voltage Output LOW Voltage Test Conditions Min. Typ.[5] Max. Unit VCC=Min., IOH=−32 mA Com’l 2.0 V VCC=Min., IOH=−15 mA Com’l 2.4 3.3 V VCC=Min., IOH=−12 mA Mil 2.4 3.3 V VCC=Min., IOL=64 mA Com’l 0.3 0.55 V VCC=Min., IOL=32 mA Mil 0.3 0.55 V VIH Input HIGH Voltage 2.0 V VIL Input LOW Voltage VH Hysteresis[6] All inputs 0.2 VIK Input Clamp Diode Voltage VCC=Min., IIN=−18 mA −0.7 II Input HIGH Current IIH 0.8 V V −1.2 V VCC=Max., VIN=VCC 5 µA Input HIGH Current VCC=Max., VIN=2.7V ±1 µA IIL Input LOW Current VCC=Max., VIN=0.5V IOS Output Short Circuit Current[7] VCC=Max., VOUT=0.0V IOFF Power-Off Disable VCC=0V, VOUT=4.5V −60 −120 ±1 µA −225 mA ±1 µA Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. 2. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. TA is the “instant on” case temperature. 5. Typical values are at VCC=5.0V, TA=+25˚C ambient. 6. This parameter is specified but not tested. 7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 2 CY54/74FCT163T Capacitance[6] Parameter Description Typ.[5] Max. Unit CIN Input Capacitance 5 10 pF COUT Output Capacitance 9 12 pF Power Supply Characteristics Parameter ICC Description Quiescent Power Supply Current Test Conditions VCC=Max., VIN≤0.2V, VIN≥VCC−0.2V Typ.[5] Max. Unit 0.1 0.2 mA ∆ICC Quiescent Power Supply Current (TTL inputs HIGH) VCC=Max., VIN=3.4V, f1=0, Outputs Open 0.2 2.0 mA ICCD Dynamic Power Supply Current[9] VCC=Max., One Bit Toggling, Load Mode, 50% Duty Cycle, Outputs Open, CEP=CET=PE=GND, SR=VCC, VIN≤0.2V or VIN≥VCC−0.2V 0.06 0.12 mA/MHz IC Total Power Supply Current[10] VCC=Max., f0=10 MHz, Load Mode, 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, CEP=CET=PE=GND, SR=VCC, VIN≤0.2V or VIN≥VCC−0.2V 0.7 1.4 mA VCC=Max., f0=10 MHz, Load Mode, 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, CEP=CET=PE=GND, SR=VCC, VIN=3.4V or VIN=GND 1.2 3.4 mA VCC=Max., f0=10 MHz, Load Mode, 50% Duty Cycle, Outputs Open, Four Bits Toggling at f1=5 MHz, CEP=CET=PE=GND, SR=VCC, VIN≤0.2V or VIN≥VCC−0.2V 1.6 3.2[11] mA VCC=Max., f0=10 MHz, Load Mode, 50% Duty Cycle, Outputs Open, Four Bits Toggling at f1=5 MHz, CEP=CET=PE=GND, SR=VCC, VIN=3.4V or VIN=GND 2.9 8.2[11] mA [8] Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. = IQUIESCENT + IINPUTS + IDYNAMIC 10. IC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) = Duty Cycle for TTL inputs HIGH DH = Number of TTL inputs at DH NT ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 3 CY54/74FCT163T Switching Characteristics Over the Operating Range CY54FCT163T Military Parameter Description CY74FCT163CT Commercial Min.[12] Max. Min.[12] Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay CP to Q (PE Input HIGH) 2.0 11.5 1.5 5.8 ns 1, 5 tPLH tPHL Propagation Delay CP to TC (PE Input LOW) 2.0 10.0 1.5 5.2 ns 1, 5 tPLH tPHL Propagation Delay CP to TC 2.0 16.5 1.5 7.8 ns 1, 5 tPLH tPHL Propagation Delay CET to TC 1.5 9.0 1.5 4.4 ns 1, 5 tS Set-Up Time, HIGH or LOW P to CP 5.5 3.5 ns 4 tH Hold Time, HIGH or LOW P to CP 2.0 1.5 ns 4 tSU Set-Up Time HIGH or LOW PE or SR to CP 13.5 7.6 ns 4 tH Hold Time HIGH or LOW PE or SR to CP 1.5 1.0 ns 4 tSU Set-Up Time HIGH or LOW CEP or CET to CP 13.0 7.6 ns 4 tH Hold Time HIGH or LOW CEP or CET to CP 0 0 ns 4 tW Clock Pulse Width (Load) HIGH or LOW 5.0 4.0 ns 5 tW Clock Pulse Width(Count) HIGH or LOW 8.0 5.0 ns 5 Notes: 12. Minimum limits are specified but not tested on Propagation Delays. 13. See “Parameter Measurement Information” in the General Information section. Ordering Information Speed (ns) 5.8 11.5 Ordering Code Package Name Package Type CY74FCT163CTQCT Q1 16-Lead (150-Mil) QSOP CY74FCT163CTSOC/SOCT S1 16-Lead (300-Mil) Molded SOIC CY54FCT163TLMB L61 20-Square Leadless Chip Carrier Document #: 38−00285−B 4 Operating Range Commercial Military CY54/74FCT163T Package Diagrams 20-Pin Square Leadless Chip Carrier L61 MIL−STD−1835 C−2A 16-Lead Quarter Size Outline Q1 5 CY54/74FCT163T Package Diagrams (continued) 16-Lead Molded SOIC S1 6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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