MP2259 1A, 16V, 1.4MHz Step-Down Converter The Future of Analog IC Technology FEATURES DESCRIPTION The MP2259 is a monolithic integrated stepdown switch mode converter with an internal power MOSFET. It achieves 1A continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. The MP2259 requires a minimum number of readily available standard external components. The MP2259 is available in TSOT23-6 and SOT23-6 packages. • • • • • • • • • • • 1A Output Current 0.5Ω Internal Power MOSFET Switch Stable with Low ESR Output Ceramic Capacitors Up to 92% Efficiency 0.1μA Shutdown Mode Fixed 1.4MHz Frequency Thermal Shutdown Cycle-by-Cycle Over Current Protection Wide 4.5V to 16V Operating Input Range Output Adjustable from 0.81V to 14V Available in TSOT23-6 and SOT23-6 Packages APPLICATIONS • • • Hand Disk Drive xDSL Modems Cable Set-Top Box For MPS green status, please visit MPS website under Quality Assurance “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION Efficiency vs Load Current 5 IN BST 12V 4 EN GND 2 SW 6 D1 B230A FB 3 VOUT = 5V 95 CB 10nF MP2259 OFF ON 100 1 90 VOUT 3.3V @ 1A EFFICIENCY (%) VIN 85 80 VOUT = 3.3V 75 70 65 60 VIN = 12V 55 50 10 100 1000 LOAD CURRENT (mA) MP2259-EC01 MP2259 Rev. 0.92 9/15/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 1 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER ORDERING INFORMATION Part Number Package Top Marking Temperature MP2259DJ* TSOT23-6 J9 –40°C to +85°C Part Number Package Top Marking Temperature MP2259DT** SOT23-6 K1 –40°C to +85°C * For Tape & Reel, add suffix –Z (eg. MP2259DJ–Z); For RoHS compliant packaging, add suffix –LF. (eg. MP2259DJ–LF–Z) * * For Tape & Reel, add suffix –Z (eg. MP2259DT–Z); For RoHS compliant packaging, add suffix –LF (eg. MP2259DT–LF–Z) PACKAGE REFERENCE TOP VIEW TOP VIEW BST 1 6 SW BST 1 6 SW GND 2 5 IN GND 2 5 IN FB 3 4 EN FB 3 4 EN MP2259_PD01_TSOT23 MP2259_PD02_SOT23 TSOT23-6 SOT23-6 ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Supply Voltage VIN ....................................... 20V VSW ............................................................... 21V VBS ....................................................... VSW + 6V All Other Pins .................................–0.3V to +6V Continuous Power Dissipation (TA = +25°C)(2) TSOT23-6 ................................................ 0.57W SOT23-6 .................................................. 0.57W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature.............. –65°C to +150°C TSOT23-6.............................. 220 .... 110.. °C/W SOT23-6 ................................ 220 .... 110.. °C/W Recommended Operating Conditions (3) Supply Voltage VIN ...........................4.5V to 16V Output Voltage VOUT ......................... 0.81 to 14V Maximum Junction Temp. (TJ) .............. +125°C MP2259 Rev. 0.92 9/15/2011 (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 2 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS VIN = 12V, TA = +25°C, unless otherwise noted. Parameters Symbol Condition Feedback Voltage VFB Feedback Current IFB Switch-On Resistance Switch Leakage 4.5V ≤ VIN ≤ 16V VFB = 0.8V VFB = 2V Min Typ Max Units 0.790 0.810 0.830 V 10 nA µA Ω μA 10 2 0.5 RDS(ON) VEN = 0V, VSW = 0V Current Limit (5) Oscillator Frequency Fold-back Frequency Maximum Duty Cycle Minimum On-Time Under Voltage Lockout Threshold Rising Under Voltage Lockout Threshold Hysteresis EN Input Low Voltage En Input High Voltage fSW VFB = 0.6V VFB = 0V VFB = 0.6V tON EN Input Current Supply Current (Shutdown) Supply Current (Quiescent) Thermal Shutdown 2.5 1.8 A 1.4 460 85 100 2.8 200 MHz KHz % ns V mV V V 3.1 0.4 VEN = 5V VEN = 0V VEN = 0V VEN = 2V, VFB = 1V 1.2 3 -1 7 1 0.1 1.0 150 μA μA mA °C Note: 5) Slope compensation changes current limit above 40% duty cycle. PIN FUNCTIONS Pin # Name Description 1 BST 2 GND 3 FB 4 EN 5 IN 6 SW MP2259 Rev. 0.92 9/15/2011 Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply voltage. It is connected between SW and BS pins to form a floating supply across the power switch driver. Ground. This pin is the voltage reference for the regulated output voltage. For this reason care must be taken in its layout. This node should be placed outside of the D1 to C1 ground path to prevent switching current spikes from inducing voltage noise into the part. Feedback. An external resistor divider from the output to GND, tapped to the FB pin sets the output voltage. To prevent current limit run away during a short circuit fault condition the frequency foldback comparator lowers the oscillator frequency when the FB voltage is below 250mV. On/Off Control Input. Pull above 1.2V to turn the device on. Supply Voltage. The MP2259 operates from a +4.5V to +16V unregulated input. C1 is needed to prevent large voltage spikes from appearing at the input. Switch Output. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 3 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT = 3.3V, L = 4.7µH, C1 = 10µF, C2 = 22µF, TA = +25ºC, unless otherwise noted. Current Limit vs Duty Cycle Steady State Test IOUT = 0.5A 3.0 CURRENT LIMIT (A) 2.5 VOUT 20mV/div. VOUT AC Coupled 50mV/div. 2.0 1.5 1.0 IL 500mA/div. ILOAD 1A/div. 0.5 0 VSW 10V/div. IL 1A/div. 0 20 40 60 80 DUTY CYCLE (%) 400ns/div. 100 Short Circuit Entry Short Circuit Recovery Start-up through Enable No Load VEN 5V/div. VOUT 1V/div. VOUT 1V/div. IL 1A/div. VOUT 1V/div. VSW 10V/div. IL 500mA/div. IL 1A/div. Shut-down through Enable Start-up through Enable VEN 5V/div. VEN 5V/div. VOUT 2V/div. IL 1A/div. MP2259 Rev. 0.92 9/15/2011 IOUT = 1A Resistive Load VEN 5V/div. VOUT 2V/div. VOUT 1V/div. VSW 10V/div. Shut-down through Enable No Load IOUT = 1A Resistive Load VSW 10V/div. IL 1A/div. VSW 10V/div. IL 1A/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 4 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER OPERATION The MP2259 is a current mode buck regulator. with EA output voltage proportional to the peak inductor current. At the beginning of a cycle, M1 is off. The EA output voltage is higher than the current sense amplifier output, and the current comparator’s output is low. The rising edge of the 1.4MHz CLK signal sets the RS Flip-Flop. Its output turns on M1 then connects the SW pin and inductor to the input supply. The increasing inductor current is sensed and amplified by the Current Sense Amplifier. Ramp compensation is summed to Current Sense Amplifier output and compared to the Error Amplifier output by the PWM Comparator. When the sum of the Current Sense Amplifier output and the Slope Compensation signal exceeds the EA output voltage, the RS FlipFlop is reset and M1 is turned off. The external Schottky rectifier diode (D1) conducts the inductor current. If the sum of the Current Sense Amplifier output and the Slope Compensation signal does not exceed the EA output for a whole cycle, then the falling edge of the CLK resets the Flip-Flop. The output of the Error Amplifier integrates the voltage difference between the feedback and the 0.8V bandgap reference. The polarity is such that a FB pin voltage lower than 0.8V increases the EA output voltage. Since the EA output voltage is proportional to the peak inductor current, an increase in its voltage increases current delivered to the output. IN 5 CURRENT SENSE AMPLIFIER + -- x20 REGULATOR EN 4 REGULATOR OSCILLATOR 1.4MHz S + -1pF REFERENCE FB 3 Q 1 BST 6 SW M1 DRIVER R CURRENT LIMIT COMPARATOR R 27pF +EA -- ERROR AMPLIFIER + -- PWM COMPARATOR GND 2 MP2259_F01_BD01 Figure 1—Functional Block Diagram MP2259 Rev. 0.92 9/15/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 5 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER APPLICATION INFORMATION Setting the Output Voltage The external resistor divider is used to set the output voltage (see the schematic on front page). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Figure 1). R2 can be determined by: R2 = R1 VOUT −1 0.81V Table 1—Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) 1.8 2.5 3.3 5 80.6 (1%) 49.9 (1%) 49.9 (1%) 49.9 (1%) 64.9 (1%) 23.7 (1%) 16.2 (1%) 9.53 (1%) Selecting the Inductor A 1µH to 10µH inductor is recommended for most applications. For highest efficiency, the inductor’s DC resistance should be less than 200mΩ. For most designs, the required inductance value can be derived from the following equation: L= VOUT × ( VIN − VOUT ) VIN × ΔIL × f OSC Where ΔIL is the inductor ripple current. Choose an inductor with a rating current higher than the maximum load current. The maximum inductor peak current can be calculated from: IL(MAX ) = ILOAD + ΔI L 2 with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 4.7µF capacitor is sufficient. Selecting the Output Capacitor The output capacitor (C2) keeps output voltage ripple small and ensures loop stability. The output capacitor impedance should be low at the switching frequency. Ceramic capacitors with X5R or X7R dielectrics are recommended for their low ESR characteristics. A 10µF~ 22µF capacitor is good for most applications. PCB Layout Guide PCB layout is very important to achieve stable operation. Please follow these guidelines and take Figure2 for references. 1) Keep the path of switching current short and minimize the loop area formed by Input cap, high-side MOSFET and schottky diode. 2) Keep the connection of schottky diode between SW pin and input power ground as short and wide as possible. 3) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route SW away from sensitive analog areas such as FB. 5) Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. For single layer, do not solder exposed pad of the IC. Under light load conditions below 100mA, a larger inductance is recommended for improved efficiency. Selecting the Input Capacitor The input capacitor (C1) reduces the surge current drawn from the input and the switching noise from the device. The input capacitor impedance at the switching frequency should be less than the input source impedance to prevent high frequency switching current from passing through the input. Ceramic capacitors MP2259 Rev. 0.92 9/15/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 6 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER R2 R1 SGND C3 1 BST SW 6 EN 4 2 GND IN 5 3 FB R3 L1 C1 D1 C2 PGND Figure2―PCB Layout External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external BST diode are: z VOUT=5V or 3.3V; and z Duty cycle is high: D= VOUT >65% VIN In these cases, an external BST diode is recommended from the output of the voltage regulator to BST pin, as shown in Fig.3 External BST Diode IN4148 BST CBST MP2259 SW L + COUT 5V or 3.3V Figure 3—Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1~1µF. MP2259 Rev. 0.92 9/15/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 7 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER PACKAGE INFORMATION TSOT23-6 6 See Note 7 EXAMPLE TOP MARK 4 AAAA PIN 1 0.95 BSC 0.60 TYP 2.80 3.00 1 1.20 TYP 1.50 1.70 2.60 3.00 2.60 TYP 3 TOP VIEW RECOMMENDED LAND PATTERN 0.84 0.90 1.00 MAX 0.09 0.20 SEATING PLANE 0.30 0.50 0.95 BSC 0.00 0.10 SEE DETAIL "A" FRONT VIEW SIDE VIEW NOTE: GAUGE PLANE 0.25 BSC 0o-8o DETAIL 揂 MP2259 Rev. 0.92 9/15/2011 0.30 0.50 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AB. 6) DRAWING IS NOT TO SCALE. 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 8 MP2259 – 1A, 16V, 1.4MHz STEP-DOWN CONVERTER SOT23-6 6 See Note 7 EXAMPLE TOP MARK 4 AAAA PIN 1 0.95 BSC 0.60 TYP 2.80 3.00 1 1.20 TYP 1.50 1.70 2.60 3.00 2.60 TYP 3 TOP VIEW RECOMMENDED LAND PATTERN 0.90 1.30 1.45 MAX 0.09 0.20 SEATING PLANE 0.30 0.50 0.95 BSC 0.00 0.15 SEE DETAIL "A" FRONT VIEW SIDE VIEW NOTE: GAUGE PLANE 0.25 BSC 0o-8o DETAIL 揂 0.30 0.55 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AB. 6) DRAWING IS NOT TO SCALE. 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK) NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2259 Rev. 0.92 9/15/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 9