IDT IDT71V256SA Lower power 3.3v cmos fast sram Datasheet

Lower Power
3.3V CMOS Fast SRAM
256K (32K x 8-Bit)
Features
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IDT71V256SA
Description
Ideal for high-performance processor secondary cache
Commercial (0°C to +70°C) and Industrial (–40°C to +85°C)
temperature range options
Fast access times:
– Commercial and Industrial: 12/15/20ns
Low standby current (maximum):
– 2mA full standby
Small packages for space-efficient layouts:
– 28-pin 300 mil SOJ
– 28-pin TSOP Type I
Produced with advanced high-performance CMOS
technology
Inputs and outputs are LVTTL-compatible
Single 3.3V(±0.3V) power supply
Green parts available, see ordering information
The IDT71V256SA is a 262,144-bit high-speed static RAM organized as 32K x 8. It is fabricated using a high-performance, high-reliability
CMOS technology.
The IDT71V256SA has outstanding low power characteristics while
at the same time maintaining very high performance. Address access
times of as fast as 12ns are ideal for 3.3V secondary cache in 3.3V
desktop designs.
When power management logic puts the IDT71V256SA in standby
mode, its very low power characteristics contribute to extended battery life.
By taking CS HIGH, the SRAM will automatically go to a low power standby
mode and will remain in standby as long as CS remains HIGH. Furthermore, under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to always be less than 6.6mW and typically will be much
smaller.
The IDT71V256SA is packaged in a 28-pin 300 mil SOJ and a 28-pin
300 mil TSOP Type I.
Functional Block Diagram
A0
VCC
262,144 BIT
MEMORY ARRAY
ADDRESS
DECODER
GND
A14
I/O0
I/O CONTROL
INPUT
DATA
CIRCUIT
I/O7
CS
OE
WE
,
CONTROL
CIRCUIT
3101 drw 01
AUGUST 2015
1
©2015 Integrated Device Technology, Inc.
DSC-3101/11
IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit)
Commercial and Industrial Temperature Ranges
Truth Table(1)
Pin Configurations
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I /O 0
I /O 1
I /O 2
GN D
1
28
2
27
3
26
4
25
5
24
6
23
7
SO2 8
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
DIP/SOJ
Top View
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
V CC
WE
A13
A8
A9
A11
OE
A10
CS
I /O 7
I /O 6
I /O 5
I /O 4
I /O 3
CS
OE
I/O
X
H
X
High-Z
Standby (ISB)
X
VHC
X
High-Z
Standby (ISB1)
H
L
H
High-Z
Output Disable
H
L
L
DOUT
Read
L
L
X
DIN
Write
3101 tbl 02
Absolute Maximum Ratings(1)
3 1 01 d r w 0 2
Symbol
21
23
20
24
19
25
18
26
17
27
16
28
15
SO28
Function
NOTE:
1. H = VIH, L = VIL, X = Don’t Care
22
1
WE
14
2
13
3
12
4
11
5
10
6
9
7
8
TSOP
Top View
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
Rating
Com'l.
Unit
VCC
Supply Voltage
Relative to GND
-0.5 to +4.6
V
VTERM(2)
Terminal Voltage
Relative to GND
-0.5 to VCC+0.5
V
TBIAS
Temperature Under Bias
-55 to +125
o
C
TSTG
Storage Temperature
-55 to +125
o
C
PT
Power Dissipation
1.0
W
IOUT
DC Output Current
50
mA
3101 tbl 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2. Input, Output, and I/O terminals; 4.6V maximum.
3101 drw 03
Pin Descriptions
Capacitance
Name
Description
A0 - A14
Addresses
I/O0 - I/O7
Data Input/Output
CS
Chip Select
CIN
Input Capacitance
WE
Write Enable
COUT
Output Capacitance
OE
Output Enable
GND
Ground
VCC
Power
(TA = +25°C, f = 1.0MHz, SOJ package)
Parameter(1)
Symbol
Conditions
Max.
Unit
VIN = 3dV
6
pF
VOUT = 3dV
7
pF
3101 tbl 04
NOTE:
1. This parameter is determined by device characterization, but is not production
tested.
Recommended Operating
Temperature and Supply Voltage
3101 tbl 01
Grade
Commercial
Industrial
Temperature
GND
Vcc
0OC to +70OC
0V
3.3V ± 0.3V
-40OC to +85OC
0V
3.3V ± 0.3V
3101 tbl 05
2
IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit)
Commercial and Industrial Temperature Ranges
Recommended DC Operating
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
3.0
3.3
3.6
V
0
0
0
V
VCC
Supply Voltage
GND
Ground
VIH
Input High Voltage - Inputs
2.0
____
VCC +0.3
V
VIH
Input High Voltage - I/O
2.0
____
VCC +0.3
V
____
0.8
V
VIL
Input Low Voltage
(1)
-0.3
NOTE:
1. VIL (min.) = –2.0V for pulse width less than 5ns, once per cycle.
3101 tbl 06
DC Electrical Characteristics(1)
(VCC = 3.3V ± 0.3V, VLC = 0.2V, VHC = VCC - 0.2V, Commercial and Industrial Temperature Ranges)
Symbol
Parameter
71V256SA12
71V256SA15
71V256SA20
Unit
ICC
Dynamic Operating Current CS < V IL, Outputs
Open, V CC = Max., f = fMAX(2)
90
85
85
mA
ISB
Standby Power Supply Current (TTL Level)
CS = V IH, V CC = Max., Outputs Open, f = fMAX(2)
20
20
20
mA
ISB1
Full Standby Power Supply Current (CMOS Level)
CS > V HC, V CC = Max., Outputs Open, f = 0(2),
V IN < V LC or V IN > V HC
2
2
2
mA
3101 tbl 07
NOTES:
1. All values are maximum guaranteed values.
2. fMAX = 1/tRC, only address inputs cycling at fMAX; f = 0 means that no inputs are cycling.
DC Electrical Characteristics
(VCC = 3.3V± 0.3V)
IDT71V256SA
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
|ILI|
Input Leakage Current
VCC = Max., VIN = GND to VCC
___
___
2
µA
|ILO|
Output Leakage Current
VCC = Max., CS = VIH, VOUT = GND to V CC
___
___
2
µA
VOL
Output Low Voltage
IOL = 8mA, VCC = Min.
___
___
0.4
V
VOH
Output High Voltage
IOH = -4mA, VCC = Min.
2.4
___
___
V
3101 tbl 08
6.42
3
IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit)
Commercial and Industrial Temperature Ranges
AC Test Conditions
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
3ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
AC Test Load
See Figures 1 and 2
3101 tbl 09
3.3V
3.3V
320Ω
320Ω
DATA OUT
350Ω
DATA OUT
30pF*
,
350Ω
5pF*
3101 drw 04
,
3101 drw 05
Figure 1. AC Test Load
*Includes scope and jig capacitances
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, tWHZ)
AC Electrical Characteristics
(VCC = 3.3V ± 0.3V, Commercial and Industrial Temperature Ranges)
Symbol
Parameter
71V256SA12
71V256SA15
71V256SA20
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
12
____
15
____
20
____
ns
tAA
Address Access Time
____
12
____
15
____
20
ns
tACS
Chip Select Access Time
____
12
____
15
____
20
ns
tCLZ(1)
Chip Select to Output in Low-Z
5
____
5
____
5
____
ns
tCHZ(1)
Chip Select to Output in High-Z
tOE
Output Enable to Output Valid
0
8
0
9
0
10
ns
____
6
____
7
____
8
ns
____
0
____
0
____
ns
(1)
Output Enable to Output in Low-Z
3
(1)
tOHZ
Output Disable to Output in High-Z
2
6
0
7
0
8
ns
tOH
Output Hold from Address Change
3
____
3
____
3
____
ns
tOLZ
Write Cycle
tWC
Write Cycle Time
12
____
15
____
20
____
ns
tAW
Address Valid to End-of-Write
9
____
10
____
15
____
ns
tCW
Chip Select to End-of-Write
9
____
10
____
15
____
ns
tAS
Address Set-up Time
0
____
0
____
0
____
ns
tWP
Write Pulse Width
9
____
10
____
15
____
ns
tWR
Write Recovery Time
0
____
0
____
0
____
ns
tDW
Data to Write Time Overlap
6
____
7
____
8
____
ns
tDH
Data Hold from Write Time
0
____
0
____
0
____
ns
tOW(1)
Output Active from End-of-Write
4
____
4
____
4
____
ns
tWHZ(1)
Write Enable to Output in High-Z
1
8
1
9
1
10
ns
3101 tbl 10
NOTE:
1. This parameter guaranteed with the AC test load (Figure 2) by device characterization, but is not production tested.
4
IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit)
Commercial and Industrial Temperature Ranges
Timing Waveform of Read Cycle No. 1(1)
t RC
ADDRESS
t AA
t OH
OE
t OE
t OLZ
(2)
t OHZ
(2)
t CHZ
(2)
CS
t ACS
t CLZ
(2)
DATAOUT
DATA VALID
3101 drw 06
,
NOTES:
1. WE is HIGH for Read cycle.
2. Transition is measured ±200mV from steady state.
Timing Waveform of Read Cycle No. 2(1,2,4)
t RC
ADDRESS
t AA
t OH
DATAOUT
t OH
PREVIOUS DATA VALID
DATA VALID
3101 drw 07
,
Timing Waveform of Read Cycle No. 3(1,3,4)
CS
t ACS
t CLZ
t CHZ
(5)
(5)
DATA VALID
DATAOUT
3101 drw 08
NOTES:
1. WE is HIGH for Read cycle.
2. Device is continuously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. OE is LOW.
5. Transition is measured ±200mV from steady state.
6.42
5
,
IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit)
Commercial and Industrial Temperature Ranges
Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,4,6)
t WC
ADDRESS
t OHZ
(5)
OE
t AW
CS
t WP (6)
t AS
t WR
WE
t WHZ (5)
DATAOUT
t OW (5)
(3)
(3)
t DW
t DH
DATA VALID
DATAIN
3101 drw 09
,
NOTES:
1. A write occurs during the overlap of a LOW CS and a LOW WE.
2. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle.
3. During this period, I/O pins are in the output state so that the input signals must not be applied.
4. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state.
5. Transition is measured ±200mV from steady state.
6. If OE is LOW during a WE controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data to be
placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse can be as short as the
spectified tWP.
Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,2,3,4)
t WC
ADDRESS
t AW
CS
tAS
t CW
(5)
tWR
WE
t DW
t DH
DATA VALID
DATAIN
3101 drw 10
NOTES:
1. WE or CS must be HIGH during all address transitions.
2. A write occurs during the overlap of a LOW CS and a LOW WE.
3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle.
4. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state.
5. If OE is LOW during a WE controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data to be
placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse can be as short as the
spectified tWP.
6
,
IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit)
Commercial and Industrial Temperature Ranges
Ordering Information — Commercial and Industrial
71V256
SA
XX
X
Device
Type
Power
Speed
Package
X
X
X
Process/
Temperature
Range
Blank
8
Tube or Tray
Tape & Reel
Blank
I(1)
Commercial (0°C to +70°C)
Industrial (–40°C to +85°C)
G(2)
Green
Y
PZ
300 mil SOJ (SO28)
TSOP Type I (SO28)
12
15
20*
Speed in nanoseconds
* Available in TSOP package only.
3101 drw 11
NOTES:
1. Contact your local sales office for industrial temp. range for other speeds, packages and powers.
2. Green parts available. For specific speeds, packages and powers contact your local sales office.
6.42
7
IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit)
Commercial and Industrial Temperature Ranges
Datasheet Document History
1/7/00
Pg. 1, 3, 4, 7
Pg. 1, 2, 7
Pg. 6
Pg. 7
Pg. 8
08/09/00
02/01/01
06/21/02
01/30/04
02/20/09
06/11/12
07/24/14
08/18/15
Pg. 7
Pg. 7
Pg. 7
Pg. 3
Pg. 7
Pg. 7
Pg.7
Pg.1 & 7
Pg.2 & 7
Pg. 3 & 4
Pg.7
Updated to new format
Expanded Industrial Temperature offerings
Removed 28-pin 300 mil plastic DIP package offering
Removed Note No. 1 from Write Cycle No. 1 diagram; renumbered notes and footnotes
Revised Ordering Information
Added Datasheet Document History
Not recommended for new designs
Removed "Not recommended for new designs"
Added tape and reel option to the ordering information
Added "restricted hazardous substance device" to order information.
Removed "IDT" from ordering parts
Corrected Recommended DC Operation Conditions Max VIH from 5.0 to Vcc+0.3V
Added Green designator to ordering information
Corrected footnote in the ordering information from "available in SOJ package only" to
"available in TSOP package only"
Added tube or tray to the ordering information
Removed commercial 10ns speed offering & added green parts available to features
Removed "-X"extensions from all pin configurations SOJ28 & TSOP28
Removed commercial 10ns speed offering columns from the DC & AC Elec tables
Updated the Industrial and Green footnotes in the Ordering Information
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
800-345-7015 or
408-284-8200
fax: 408-284-2775
www.idt.com
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
8
for Tech Support:
[email protected]
408-284-4532